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path: root/arch/arm/include/asm/pgtable.h
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2010-12-22ARM: pgtable: provide RDONLY page table bit rather than WRITE bitRussell King1-19/+19
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-22ARM: pgtable: invert L_PTE_EXEC to L_PTE_XNRussell King1-22/+22
The hardware page tables use an XN bit 'execute never'. Historically, we've had a Linux 'execute allow' bit, in the positive sense. Get rid of this artifact as future hardware will continue to have the XN sense. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-22ARM: pgtable: remove FIRST_USER_PGD_NRRussell King1-2/+1
FIRST_USER_PGD_NR is now unnecessary, as this has been replaced by FIRST_USER_ADDRESS except in the architecture code. Fix up the last usage of FIRST_USER_PGD_NR, and remove the definition. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-22ARM: pgtable: collect up identity mapping functionsRussell King1-0/+3
We have two places where we create identity mappings - one when we bring secondary CPUs online, and one where we setup some mappings for soft- reboot. Combine these two into a single implementation. Also collect the identity mapping deletion function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-22ARM: pgtable: switch order of Linux vs hardware page tablesRussell King1-16/+15
This switches the ordering of the Linux vs hardware page tables in each page, thereby eliminating some of the arithmetic in the page table walks. As we now place the Linux page table at the beginning of the page, we can deal with the offset in the pgt by simply masking it away, along with the other control bits. This also makes the arithmetic all be positive, rather than a mixture. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26ARM: pgtable: introduce pteval_t to represent a pte valueRussell King1-20/+21
This makes everywhere dealing with pte values use the same type. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26ARM: pgtable: use phys_addr_t for physical addressesRussell King1-1/+1
Ensure that physical addresses are typed as phys_addr_t Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26ARM: pgtable: directly pass pgd/pmd/pte to their error functionsRussell King1-6/+6
Rather than passing the pte value to __pte_error, pass the raw pte_t cookie instead. Do the same for pmd and pgd functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26ARM: pgtable: group pte functions togetherRussell King1-59/+51
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26ARM: pgtable: group pgd functions and data togetherRussell King1-21/+23
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26ARM: pgtable: move pgprot functions to one placeRussell King1-22/+21
Rather than scattering them throughout the file, group them together. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-21ARM: improve compiler's ability to optimize page tablesRussell King1-0/+3
Allow the compiler to better optimize the page table walking code by avoiding over-complex pmd_addr_end() calculations. These calculations prevent the compiler spotting that we'll never iterate over the PMD table, causing it to create double nested loops where a single loop will do. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-27mm: remove pte_*map_nested()Peter Zijlstra1-8/+6
Since we no longer need to provide KM_type, the whole pte_*map_nested() API is now redundant, remove it. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: Chris Metcalf <cmetcalf@tilera.com> Cc: David Howells <dhowells@redhat.com> Cc: Hugh Dickins <hughd@google.com> Cc: Rik van Riel <riel@redhat.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Miller <davem@davemloft.net> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-10-19Merge branches 'at91', 'dcache', 'ftrace', 'hwbpt', 'misc', 'mmci', 's3c', ↵Russell King1-3/+27
'st-ux' and 'unwind' into devel
2010-09-19ARM: 6383/1: Implement phys_mem_access_prot() to avoid attributes aliasingCatalin Marinas1-0/+4
ARMv7 onwards requires that there are no aliases to the same physical location using different memory types (i.e. Normal vs Strongly Ordered). Access to SO mappings when the unaligned accesses are handled in hardware is also Unpredictable (pgprot_noncached() mappings in user space). The /dev/mem driver requires uncached mappings with O_SYNC. The patch implements the phys_mem_access_prot() function which generates Strongly Ordered memory attributes if !pfn_valid() (independent of O_SYNC) and Normal Noncacheable (writecombine) if O_SYNC. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-09-19ARM: 6380/1: Introduce __sync_icache_dcache() for VIPT cachesCatalin Marinas1-3/+23
On SMP systems, there is a small chance of a PTE becoming visible to a different CPU before the current cache maintenance operations in update_mmu_cache(). To avoid this, cache maintenance must be handled in set_pte_at() (similar to IA-64 and PowerPC). This patch provides a unified VIPT cache handling mechanism and implements the __sync_icache_dcache() function for ARMv6 onwards architectures. It is called from set_pte_at() and replaces the update_mmu_cache(). The latter is still used on VIVT hardware where a vm_area_struct is required. Tested-by: Rabin Vincent <rabin.vincent@stericsson.com> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-05-17ARM: Optionally allow ARMv6 to use 'normal, bufferable' memory for DMARussell King1-1/+1
Provide a configuration option to allow the ARMv6 to use normal bufferable memory for coherent DMA. This option is forced to 'y' for ARMv7, and offered as a configuration option on ARMv6. Enabling this option requires drivers to have the necessary barriers to ensure that data in DMA coherent memory is visible prior to the DMA operation commencing. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-24ARM: dma-mapping: switch ARMv7 DMA mappings to retain 'memory' attributeRussell King1-2/+12
On ARMv7, it is invalid to map the same physical address multiple times with different memory types. Since system RAM is already mapped as 'memory', subsequent remapping of it must retain this attribute. However, DMA memory maps it as "strongly ordered". Fix this by introducing 'pgprot_dmacoherent()' which provides the necessary page table bits for DMA mappings. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Greg Ungerer <gerg@uclinux.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
2009-08-17ARM: implement highpteRussell King1-4/+13
Add the ARM implementation of highpte, which allows PTE tables to be placed in highmem. Unfortunately, we do not offer highpte support when support for L2 cache is enabled. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-11[ARM] pgtable: rearrange file PTE bit allocationRussell King1-9/+9
For future compatibility, we need to ensure that swap and file Linux PTEs conform with the hardware PTEs "fault" encoding. Swap PTEs already fit in with this, but file PTEs do not. Shift them by one bit to ensure that they conform, using bit 2 to distinguish between swap and file PTEs. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-11[ARM] remove L_PTE_BUFFERABLE and L_PTE_CACHEABLERussell King1-2/+0
These old symbols are meaningless now that we have memory type support implemented. The entire memory type field needs to be modified rather than just a few bits twiddled. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-05[ARM] pgtable: file pte layout documentationRussell King1-9/+14
Document the layout of our file PTE entries. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-07-05[ARM] pgtable: swp pte layout documentation, definitions, and checkRussell King1-5/+25
Document the layout of our swp PTE entries, adding definitions for the bit masks/shifts/sizes, and implement MAX_SWAPFILES_CHECK() such that we fail to build if we are unable to properly encode the swp type field. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-04-26[ARM] Convert pmd_page() to be highmem safeRussell King1-1/+1
In the long run, we may want to place page tables in highmem. However, pmd_page() has traditionally been coded to convert the physical address to a virtual one, which won't work with highmem pages. Instead, translate the physical address to a PFN, and then convert the PFN to a struct page instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-10Merge branch 'ptebits' into develRussell King1-29/+54
Conflicts: arch/arm/Kconfig
2008-10-01[ARM] Improve non-executable supportRussell King1-20/+27
Add support for detecting non-executable stack binaries, and adjust permissions to prevent execution from data and stack areas. Also, ensure that READ_IMPLIES_EXEC is enabled for older CPUs where that is true, and for any executable-stack binary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Remove MT_DEVICE_IXP2000 and associated definitionsRussell King1-1/+0
As of the previous commit, MT_DEVICE_IXP2000 encodes to the same PTE bit encoding as MT_DEVICE, so it's now redundant. Convert MT_DEVICE_IXP2000 to use MT_DEVICE instead, and remove its aliases. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Convert ARMv6 and ARMv7 to use new memory typesRussell King1-6/+2
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Convert Xscale and Xscale3 to use new memory typesRussell King1-2/+2
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Introduce new PTE memory type bitsRussell King1-5/+28
Provide L_PTE_MT_xxx definitions to describe the memory types that we use in Linux/ARM. These definitions are carefully picked such that: 1. their LSBs match what is required for pre-ARMv6 CPUs. 2. they all have a unique encoding, including after modification by build_mem_type_table() (the result being that some have more than one combination.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-10-01[ARM] Re-jig Linux PTE bits to allow room for 4 memory type bitsRussell King1-4/+4
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-09-30[ARM] 5271/1: get rid of pages_to_mb()Nicolas Pitre1-5/+0
There is no use of this in the whole tree. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-07[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/machRussell King1-1/+1
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-03[ARM] move include/asm-arm to arch/arm/include/asmRussell King1-0/+401
Move platform independent header files to arch/arm/include/asm, leaving those in asm/arch* and asm/plat* alone. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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