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path: root/arch/arm/boot/dts/tegra30-ouya.dts
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2022-06-24ARM: tegra: Align gpio-keys node names with dtschemaKrzysztof Kozlowski1-1/+1
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24ARM: tegra: Fix ethernet node namesOleksij Rempel1-1/+1
The node name of Ethernet controller should be "ethernet" instead of "asix" or "smsc" as required by Ethernet controller devicetree schema: Documentation/devicetree/bindings/net/ethernet-controller.yaml This patch can potentially affect boot loaders patching against full node path instead of using device aliases. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: tegra: Add back gpio-ranges propertiesStefan Agner1-4/+0
The properties have been commented out to prevent a regression a while ago. The first regression should be resolved by commit 44af7927316e ("spi: Map SPI OF client IRQ at probe time"). The second regression is probably addressed by commit 494fd7b7ad10 ("PM / core: fix deferred probe breaking suspend resume order") and/or maybe others. Readd the gpio-ranges properties to see whether regressions still get reported. This reverts commit 4f1d841475e1 ("ARM: tegra: Comment out gpio-ranges properties"). Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: drop redundant gpio-ranges from Ouya DTS file] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: tegra: Add OPP tables and power domains to Tegra30 device-treesDmitry Osipenko1-0/+1
Add OPP tables and power domains to all peripheral devices which support power management on Tegra30 SoC. Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30 Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30 Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Avoid phandle indirection on OuyaThierry Reding1-3934/+4202
Move the default state pinmux definition into the pinmux node. There's no need for the indirection via the phandle. Note that the phandle indirection is kept for the EMC operating performance point tables because they reference nodes that are defined in an external file. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Remove stray #reset-cells propertyThierry Reding1-1/+0
The Ouya board specifies the #reset-cells property for the GPIO controller. Since the GPIO controller doesn't provide reset controls this is not needed, so they can be dropped. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14ARM: tegra: Rename CPU and EMC OPP table device-tree nodesDmitry Osipenko1-2/+2
OPP table name now should start with "opp-table" and OPP entries shouldn't contain commas and @ signs in accordance to the new schema requirement. Reorganize CPU and EMC OPP table device-tree nodes. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14ARM: tegra: Drop reg-shift for Tegra HS UARTThierry Reding1-1/+2
When the Tegra High-Speed UART is used instead of the regular UART, the reg-shift property is implied from the compatible string and should not be explicitly listed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-04ARM: tegra: Update Broadcom Bluetooth device-tree nodesDmitry Osipenko1-1/+4
The host-wakeup GPIO is now marked as deprecated in the broadcom-bluetooth device-tree binding, it's replaced with the host-wakeup interrupt. Update Tegra device-trees to the recent version of the Bluetooth binding. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-08-13ARM: tegra: ouya: Add interrupt to temperature sensor nodeDmitry Osipenko1-7/+6
The TEMP_ALERT pin of LM90 temperature sensor is connected to Tegra SoC. Add interrupt property to the temperature sensor and enable it in pinmux, for completeness. Tested-by: Matt Merhar <mattmerhar@protonmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-31ARM: tegra: ouya: Enable memory frequency thermal throttling using ACTMONDmitry Osipenko1-1/+3
The ACTMON module monitors activity of memory clients and then devfreq driver makes decisions about a required memory frequency based on info from ACTMON. Add ACTMON device to the thermal zone of Ouya in order to use it as a cooling device which throttles memory freq on overheat. Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Matt Merhar <mattmerhar@protonmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24ARM: tegra: Specify tps65911 as wakeup sourceDmitry Osipenko1-0/+1
Specify TPS65911 as wakeup source on Tegra devices in order to allow its RTC to wake up system from suspend by default instead of requiring wakeup to be enabled manually via sysfs. Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30 Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30 Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24ARM: tegra: ouya: Specify all CPU cores as cooling devicesDmitry Osipenko1-4/+11
If CPU0 is unplugged the cooling device can not rebind to CPU1. And if CPU0 is plugged in again, the cooling device may fail to initialize. If the CPUs are mapped with the physical CPU0 to Linux numbering CPU1, the cooling device mapping will fail. Hence specify all CPU cores as a cooling devices in the device-tree. Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Matt Merhar <mattmerhar@protonmail.com> Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-01-29ARM: tegra: ouya: Fix eMMC on specific bootloadersPeter Geis1-2/+2
Ouya fails to detect the eMMC module when booted via certain bootloaders. Fastboot and hard-kexec bootloaders fail while u-boot does not. It was discovered that the issue manifests if the sdmmc4 alternate configuration clock pin is input disabled. Ouya uses sdmmc4 in the primary pin configuration. It is unknown why this occurs, though it is likely related to other eMMC limitations experienced on Ouya. For now, fix it by enabling input on cam_mclk_pcc0. Fixes: d7195ac5c9c5 ("ARM: tegra: Add device-tree for Ouya") Reported-by: Matt Merhar <mattmerhar@protonmail.com> Tested-by: Matt Merhar <mattmerhar@protonmail.com> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON ↵Dmitry Osipenko1-0/+8
device-tree nodes Add EMC OPP tables and interconnect paths that will be used for dynamic memory bandwidth scaling based on memory utilization statistics. Update board device-trees by removing unsupported EMC OPPs. Note that ACTMON watches all memory interconnect paths, but we use a single CPU-READ interconnect path for driving memory bandwidth, for simplicity. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: tegra: Add device-tree for OuyaPeter Geis1-0/+4511
The Ouya was the sole device produced by Ouya Inc in 2013. It was a game console originally running Android 5 on top of Linux 3.1.10. This patch adds the device tree supporting the Ouya. It has been tested on the original variant with Samsung ram. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>