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2013-12-19ARM: tegra: set up /aliases entries for RTCsStephen Warren1-0/+5
This ensures that the PMIC RTC provides the system time, rather than the on-SoC RTC, which is not battery-backed. tegra124-venice2.dts isn't touched yet since we haven't added any off- SoC RTC device to its device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-17ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl definesLaxman Dewangan1-17/+17
Use Tegra pinconrol dt-binding macro to set the values of different pinmux properties of Tegra20 platforms. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-17ARM: tegra: convert device tree files to use key definesLaxman Dewangan1-1/+2
Use key code macros for all key code refernced for keys. For tegra20-seaboard.dts and tegra20-harmony.dts: The key comment for key (16th row and 1st column) is KEY_KPSLASH but code is 0x004e which is the key code for KEY_KPPLUS. As there other key exist with KY_KPPLUS, I am assuming key code is wrong and comment is fine. With this assumption, I am keeping the key code as KEY_KPSLASH. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-17ARM: tegra: add missing unit addresses to DTStephen Warren1-6/+6
DT node names should include a unit address iff the node has a reg property. For Tegra DTs at least, we were previously applying a different rule, namely that node names only needed to include a unit address if it was required to make the node name unique. Consequently, many unit addresses are missing. Add them. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-09-07Merge tag 'dt-for-linus' of ↵Linus Torvalds1-2/+30
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Olof Johansson: "Device tree and bindings updates for 3.12. General additions of various on-chip and on-board peripherals on various platforms as support gets added. Some of the bigger changes are: - Addition of (new) PCI-e support on Tegra. - More Tegra4 support, including PMC configuration for Dalmore. - Addition of a new board for Exynos4 (trats2) and more bindings for 4x12 IP. - Addition of Allwinner A20 and A31 SoC and board files. - Move of the ST Ericsson device tree files to now use ste-* prefix. - More move of hardware description of shmobile platforms to DT. - Two new board dts files for Freescale MXs" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (177 commits) dts: Rename DW APB timer compatible strings dts: Deprecate ALTR as a vendor prefix of: add vendor prefix for Altera Corp. ARM: at91/dt: sam9x5ek: add sound configuration ARM: at91/dt: sam9x5ek: enable SSC ARM: at91/dt: sam9x5ek: add WM8731 codec ARM: at91/dt: sam9x5: add SSC DMA parameters ARM: at91/dt: add at91rm9200 PQFP package version ARM: at91: at91rm9200: set default mmc0 pinctrl-names ARM: at91: at91sam9n12: correct pin number of gpio-key ARM: at91: at91sam9n12: add qt1070 support ARM: at91: at91sam9n12: add pinctrl of TWI ARM: at91: Add PMU support for sama5d3 ARM: at91: at91sam9260: add missing pinctrl-names on mmc ARM: tegra: configure power off for Dalmore ARM: DT: binding fixup to align with vendor-prefixes.txt (DT) ARM: dts: add sdio blocks to bcm28155-ap board ARM: dts: align sdio numbers to HW definition ARM: sun7i: Add Olimex A20-Olinuxino-Micro support ARM: sun7i: Add Allwinner A20 DTSI ...
2013-09-03Merge tag 'usb-3.12-rc1' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB patches from Greg KH: "Here's the big USB driver pull request for 3.12-rc1 Lots of USB driver fixes and updates. Nothing major, just the normal xhci, gadget, and other driver changes. Full details in the shortlog" * tag 'usb-3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (352 commits) usbcore: fix incorrect type in assignment in descriptors_changed() usbcore: compare and release one bos descriptor in usb_reset_and_verify_device() ehci: remove debugging statement with ehci statistics in ehci_stop() ehci: remove duplicate debug_async_open() prototype in ehci-dbg.c ehci: enable debugging code when CONFIG_DYNAMIC_DEBUG is set ehci: remove ehci_vdbg() verbose debugging statements Documentation sysfs-bus-usb: Document which files are used by libusb Documentation sysfs-bus-usb: Document the speed file used by libusb Documentation sysfs-bus-usb: Move files with known users to stable USB: fix build error when CONFIG_PM_SLEEP isn't enabled usb: r8a66597-hcd: use platform_{get,set}_drvdata() usb: phy-tegra-usb: use platform_{get,set}_drvdata() usb: acm gadget: Null termintate strings table dma: cppi41: off by one in desc_to_chan() xhci: Fix warning introduced by disabling runtime PM. dev-core: fix build break when DEBUG is enabled USB: OHCI: Allow runtime PM without system sleep usb: ohci-at91: remove unnecessary dev_set_drvdata() usb: renesas_usbhs: use platform_{get,set}_drvdata() usb: fotg210-udc: use platform_{get,set}_drvdata() ...
2013-08-22ARM: tegra: always enable USB VBUS regulatorsStephen Warren1-0/+2
This fixes a regression exposed during the merge window by commit 9f310de "ARM: tegra: fix VBUS regulator GPIO polarity in DT"; namely that USB VBUS doesn't get turned on, so USB devices are not detected. This affects the internal USB port on TrimSlice (i.e. the USB->SATA bridge, to which the SSD is connected) and the external port(s) on Seaboard/ Springbank and Whistler. The Tegra DT as written in v3.11 allows two paths to enable USB VBUS: 1) Via the legacy DT binding for the USB controller; it can directly acquire a VBUS GPIO and activate it. 2) Via a regulator for VBUS, which is referenced by the new DT binding for the USB controller. Those two methods both use the same GPIO, and hence whichever of the USB controller and regulator gets probed first ends up owning the GPIO. In practice, the USB driver only supports path (1) above, since the patches to support the new USB binding are not present until v3.12:-( In practice, the regulator ends up being probed first and owning the GPIO. Since nothing enables the regulator (the USB driver code is not yet present), the regulator ends up being turned off. This originally caused no problem, because the polarity in the regulator definition was incorrect, so attempting to turn off the regulator actually turned it on, and everything worked:-( However, when testing the new USB driver code in v3.12, I noticed the incorrect polarity and fixed it in commit 9f310de "ARM: tegra: fix VBUS regulator GPIO polarity in DT". In the context of v3.11, this patch then caused the USB VBUS to actually turn off, which broke USB ports with VBUS control. I got this patch included in v3.11-rc1 since it fixed a bug in device tree (incorrect polarity specification), and hence was suitable to be included early in the rc series. I evidently did not test the patch at all, or correctly, in the context of v3.11, and hence did not notice the issue that I have explained above:-( Fix this by making the USB VBUS regulators always enabled. This way, if the regulator owns the GPIO, it will always be turned on, even if there is no USB driver code to request the regulator be turned on. Even ignoring this bug, this is a reasonable way to configure the HW anyway. If this patch is applied to v3.11, it will cause a couple pretty trivial conflicts in tegra20-{trimslice,seaboard}.dts when creating v3.12, since the context right above the added lines changed in patches destined for v3.12. Reported-by: Kyle McMartin <kmcmarti@redhat.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-13ARM: tegra: trimslice: Initialize PCIe from DTThierry Reding1-0/+28
With the device tree support in place, probe the PCIe controller from the device tree and remove the corresponding workaround in the board file. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-12ARM: tegra: enable LP1 suspend modeJoseph Lo1-1/+1
Enabling the LP1 suspend mode for Tegra devices. Tested-by: Marc Dietrich <marvin24@gmx.de> # paz00 board Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-01ARM: tegra: use TEGRA_GPIO() in a couple more placesStephen Warren1-1/+1
A couple of references to Tegra GPIO numbers were missed when cleaning up the Tegra DT files. Convert them now. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-07-29arm: tegra: Remove obsolete nvidia,vbus-gpio propertiesMikko Perttunen1-1/+0
USB VBUS regulators are now specified with the vbus-supply property instead of nvidia,vbus-gpio, so remove the obsolete properties. The equivalent vbus-supply properties were already added in patch "ARM: tegra: update device trees for USB binding rework". Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-03ARM: tegra: fix VBUS regulator GPIO polarity in DTStephen Warren1-0/+1
Commit 4c94c8b "ARM: tegra: update device trees for USB binding rework" added regulator definitions for GPIO-controlled USB VBUS. However, none of these contained the essential DT property enable-active-high. Add this so that the regulator definitions are correct. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-05-29ARM: tegra20: convert device tree files to use CLK definesHiroshi Doyu1-1/+3
Use the Tegra20 CAR binding header (tegra20-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-29ARM: tegra: convert device tree files to use GPIO definesStephen Warren1-8/+11
Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties, and some interrupts properties. Use standard GPIO flag defines too. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-29ARM: tegra: use #include for all device treesStephen Warren1-1/+1
Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as the IDs and flags in GPIO specifiers. Use of those features will increase the readability of the device tree files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-18ARM: tegra: update device trees for USB binding reworkVenu Byravarasu1-0/+19
This patch updates all Tegra board files so that they contain all the properties required by the updated USB DT binding. Note that this patch only adds the new properties and does not yet remove the old properties, in order to maintain bisectability. The old properties will be removed once the driver has been updated to assume the new bindings. Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> [swarren: fixed some newly added regulator-name properties to better match schematic, avoided duplicate regulator-name on Whistler.] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-18ARM: tegra: modify ULPI reset GPIO propertiesVenu Byravarasu1-5/+5
1. All Tegra20 ULPI reset GPIO DT properties are modified to indicate active low nature of the GPIO. 2. Placed USB PHY DT node immediately below the EHCI controller DT nodes and corrected reg value in the name of USB PHY DT node. Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-05clk: tegra: Fix cdev1 and cdev2 IDsPrashant Gaikwad1-1/+1
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: split into separate driver and device-tree patches] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-05ARM: dts: tegra: add the PM configurations of PMCJoseph Lo1-0/+9
Adding the PM configuration of PMC when the platform support suspend function. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-05ARM: tegra: add power gpio keys to DTJoseph Lo1-0/+11
This adds the power gpio key to DT and enable the wakeup of the gpio key for the device. The Seaboard and paz00 already had the power gpio key binding and the power key of Whistler was on KBC. So these boards' device tree didn't include in this patch. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-05ARM: tegra: add clocks property to sound nodesStephen Warren1-0/+3
Audio-related clocks need to be represented in the device tree. Update bindings to describe which clocks are needed, and DT files to include those clocks. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04ARM: tegra: add clock source of PMC to device treesJoseph Lo1-0/+13
Adding the bindings of the clock source of PMC in DT. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-12ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc hostJoseph Lo1-1/+1
The GPIO pin of SD slot card detection should active low. Signed-off-by: Joseph Lo <josephl@nvidia.com> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-06Merge tag 'tegra-for-3.9-dt' of ↵Olof Johansson1-1/+10
git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt From Stephen Warren: ARM: tegra: device tree updates Numerous updates to the various Tegra device trees are made: * Addition of NVIDIA Beaver (Tegra30) and Toradex Colibri T20 and Iris carrier boards. * Enablement of the HDMI connector on most boards. * Enablement of the keyboard controller on a few boards. * Addition of the AC'97 controller to Tegra20. * Addition of a GPIO poweroff node for TrimSlice. * Changes to support the new "high speed UART" (DMA-capable) driver for Tegra serial ports, and enablement for Cardhu's UART C. * A few cleanups, such as compatible flag fixes, node renames, node ordering fixes, commonizing properties into SoC .dtsi files, etc.. This pull request is based on (most of) the previous pull request with tag tegra-for-3.9-soc-t114. * tag 'tegra-for-3.9-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (22 commits) ARM: dt: tegra30: Rename "smmu" to "iommu" ARM: dt: tegra20: Rename "gart" to "iommu" ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi ARM: tegra: Add Toradex Iris carrier board DT with T20 512MB COM ARM: tegra: Add Colibri T20 512MB COM device tree ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsi ARM: tegra: harmony: enable keyboard in DT ARM: tegra: whistler: enable keyboard in DT ARM: tegra: cardhu: register UARTC ARM: tegra: seaboard: enable keyboard in DT ARM: tegra: add DT entry for KBC controller ARM: tegra: swap cache-/interrupt-ctrlr nodes in DT ASoC: tegra: add ac97 host controller to device tree ARM: DT: tegra: Add Tegra30 Beaver board support ARM: DT: tegra: Add board level compatible properties ARM: tegra: paz00: enable HDMI port ARM: tegra: ventana: enable HDMI port ARM: tegra: seaboard: enable HDMI port ARM: tegra: trimslice: add gpio-poweroff node to DT ARM: DT: tegra: Unify the description of Tegra20 boards ...
2013-01-28ARM: tegra: Add reset GPIO information to PHY DT nodeVenu Byravarasu1-0/+4
As reset GPIO information is PHY specific detail, adding it to PHY DT node. Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsiLucas Stach1-1/+0
No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28ARM: tegra: trimslice: add gpio-poweroff node to DTStephen Warren1-0/+10
... and disable tri-state from the pingroup that contains the poweroff GPIO. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: trimslice: enable HDMI portThierry Reding1-4/+40
Enable host1x, and the HDMI output. Harmony also has a DVI port with an HDMI form-factor connector, driven by Tegra's LVDS output. This isn't enabled yet, due to potential issues with having multiple outputs enabled. Correct DDC I2C frequency to 100KHz. Add dummy/fixed regulators to satisfy the HDMI driver. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> [swarren: add commit description, remove enable of DVI port] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: trimslice: enable SPI flashStephen Warren1-0/+10
TrimSlice contains a 1MiB SPI flash. Represent this in the device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-07-26ARM: dt: tegra trimslice: enable USB2 portStephen Warren1-0/+1
This was accidentally disabled by commit 2a5fdc9 "ARM: dt: tegra: invert status=disable vs status=okay". Cc: <stable@vger.kernel.org> # v3.5 (file is named tegra-trimslice.dts there) Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-07-26ARM: dt: tegra trimslice: add vbus-gpio propertyStephen Warren1-0/+1
On TrimSlice, Tegra's USB1 port may be routed to either an external micro USB port, or an internal USB->SATA bridge for SSD or HDD. This muxing is controlled by a GPIO. Whilst not strictly a VBUS GPIO, the TrimSlice board files caused this GPIO to be set appropriately to enable the SATA bridge by passing it as the VBUS GPIO to the USB driver. Echo this same configuration in device tree to enable the SATA bridge. An alternative might be to implement a full USB bus mux driver. However, that seems over-complex right now. Cc: <stable@vger.kernel.org> # v3.5 (file is named tegra-trimslice.dts there) Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-06-20ARM: dt: tegra: rename board files to match SoCStephen Warren1-0/+306
Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This change modifies the Tegra board files to be named the same way for consistency. Once a related change is made in U-Boot, this will cause both U-Boot and the kernel to use the same names for the .dts files and SoC identifiers, thus allowing U-Boot's recently added "soc" and "board" environment variables to be used to construct the name of Tegra .dtb files, and hence allow board-generic U-Boot bootcmd scripts to be written. Signed-off-by: Stephen Warren <swarren@nvidia.com>