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2014-04-28ARM: sun7i: Fix i2c4 base addressMaxime Ripard1-2/+2
For some reason, the base address of the fifth I2C adapter in the A20 was incorrect. Change this to the actual base address. Reported-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-04-14ARM: sun7i: fix PLL4 clock and add PLL8Emilio López1-1/+9
Allwinner reworked the PLL4 clock in sun7i; so we need to change the compatible. Additionally, PLL8 is compatible with this new PLL4 implementation, so let's add a node for it as well. Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-04-06Merge tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds1-37/+265
Pull ARM SoC device tree changes from Arnd Bergmann: "A large part of the arm-soc patches are nowadays DT changes, adding support for new SoCs, boards and devices without changing kernel source. The plan is still to move the devicetree files out of the kernel tree and reduce the amount of churn going on here, but we keep finding reasons to delay doing that. Changes are really all over the place, with little sticking out particularly. We have contributions from a total of 116 people in this branch. Unfortunately, the size of this branch also causes a significant number of conflicts at the moment, typically when subsystem maintainers merge patches that change the driver at the same time as the dts files. In most cases this could be avoided because the dts changes are supposed to be compatible in both ways, and we are asking everyone to send ARM dts changes through our tree only" * tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (541 commits) dts: stmmac: Document the clocks property in the stmmac base document dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac. ARM: STi: stih41x: Add support for the FSM Serial Flash Controller ARM: STi: stih416: Add support for the FSM Serial Flash Controller ARM: tegra: fix Dalmore pinctrl configuration ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND ARM: dts: Build all keystone dt blobs ARM: dts: keystone: Fix control register range for clktsip ARM: dts: keystone: Fix domain register range for clkfftc1 ARM: dts: bcm28155-ap: leave camldo1 on to fix reboot ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap ARM: dts: bcm21664: Add device tree files. ARM: DT: bcm21664: Device tree bindings ARM: efm32: properly namespace i2c location property ARM: efm32: fix unit address part in USART2 device nodes' names ARM: mvebu: Enable NAND controller in Armada 385-DB ARM: mvebu: Add support for NAND controller in Armada 38x SoC ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs ...
2014-04-01Merge branch 'irq-core-for-linus' of ↵Linus Torvalds1-0/+8
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq code updates from Thomas Gleixner: "The irq department proudly presents: - Another tree wide sweep of irq infrastructure abuse. Clear winner of the trainwreck engineering contest was: #include "../../../kernel/irq/settings.h" - Tree wide update of irq_set_affinity() callbacks which miss a cpu online check when picking a single cpu out of the affinity mask. - Tree wide consolidation of interrupt statistics. - Updates to the threaded interrupt infrastructure to allow explicit wakeup of the interrupt thread and a variant of synchronize_irq() which synchronizes only the hard interrupt handler. Both are needed to replace the homebrewn thread handling in the mmc/sdhci code. - New irq chip callbacks to allow proper support for GPIO based irqs. The GPIO based interrupts need to request/release GPIO resources from request/free_irq. - A few new ARM interrupt chips. No revolutionary new hardware, just differently wreckaged variations of the scheme. - Small improvments, cleanups and updates all over the place" I was hoping that that trainwreck engineering contest was a April Fools' joke. But no. * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (68 commits) irqchip: sun7i/sun6i: Disable NMI before registering the handler ARM: sun7i/sun6i: dts: Fix IRQ number for sun6i NMI controller ARM: sun7i/sun6i: irqchip: Update the documentation ARM: sun7i/sun6i: dts: Add NMI irqchip support ARM: sun7i/sun6i: irqchip: Add irqchip driver for NMI controller genirq: Export symbol no_action() arm: omap: Fix typo in ams-delta-fiq.c m68k: atari: Fix the last kernel_stat.h fallout irqchip: sun4i: Simplify sun4i_irq_ack irqchip: sun4i: Use handle_fasteoi_irq for all interrupts genirq: procfs: Make smp_affinity values go+r softirq: Add linux/irq.h to make it compile again m68k: amiga: Add linux/irq.h to make it compile again irqchip: sun4i: Don't ack IRQs > 0, fix acking of IRQ 0 irqchip: sun4i: Fix a comment about mask register initialization irqchip: sun4i: Fix irq 0 not working genirq: Add a new IRQCHIP_EOI_THREADED flag genirq: Document IRQCHIP_ONESHOT_SAFE flag ARM: sunxi: dt: Convert to the new irq controller compatibles irqchip: sunxi: Change compatibles ...
2014-04-01Merge branch 'timers-core-for-linus' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer changes from Thomas Gleixner: "This assorted collection provides: - A new timer based timer broadcast feature for systems which do not provide a global accessible timer device. That allows those systems to put CPUs into deep idle states where the per cpu timer device stops. - A few NOHZ_FULL related improvements to the timer wheel - The usual updates to timer devices found in ARM SoCs - Small improvements and updates all over the place" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (44 commits) tick: Remove code duplication in tick_handle_periodic() tick: Fix spelling mistake in tick_handle_periodic() x86: hpet: Use proper destructor for delayed work workqueue: Provide destroy_delayed_work_on_stack() clocksource: CMT, MTU2, TMU and STI should depend on GENERIC_CLOCKEVENTS timer: Remove code redundancy while calling get_nohz_timer_target() hrtimer: Rearrange comments in the order struct members are declared timer: Use variable head instead of &work_list in __run_timers() clocksource: exynos_mct: silence a static checker warning arm: zynq: Add support for cpufreq arm: zynq: Don't use arm_global_timer with cpufreq clocksource/cadence_ttc: Overhaul clocksource frequency adjustment clocksource/cadence_ttc: Call clockevents_update_freq() with IRQs enabled clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI sh: Remove Kconfig entries for TMU, CMT and MTU2 ARM: shmobile: Remove CMT, TMU and STI Kconfig entries clocksource: armada-370-xp: Use atomic access for shared registers clocksource: orion: Use atomic access for shared registers clocksource: timer-keystone: Delete unnecessary variable clocksource: timer-keystone: introduce clocksource driver for Keystone ...
2014-03-26ARM: sun7i/sun6i: dts: Add NMI irqchip supportCarlo Caione1-0/+8
This patch adds DTS entries for NMI controller as child of GIC. Signed-off-by: Carlo Caione <carlo@caione.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-sunxi@googlegroups.com Cc: mark.rutland@arm.com Cc: hdegoede@redhat.com Acked-by: maxime.ripard@free-electrons.com Link: http://lkml.kernel.org/r/1395256879-8475-3-git-send-email-carlo@caione.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-17Merge tag 'sunxi-dt-for-3.15-2' of https://github.com/mripard/linux into next/dtArnd Bergmann1-1/+61
Pull "Allwinner DT additions for 3.15, take 2" from Maxime Ripard: - Two new boards: INet 97F Rev 02 and A10-OLinuXino-LIME - Addition of the I2C for the A31 - Addition USB Host mode for the A10, A10s, A13 and A20 - Addition of SATA support for the A10 and A20 - Change of compatible for the watchdog * tag 'sunxi-dt-for-3.15-2' of https://github.com/mripard/linux: (23 commits) ARM: sunxi: dt: Update the watchdog compatibles ARM: sun6i: colombus: Enable the I2C controllers ARM: sun6i: Enable the I2C muxing options ARM: sun6i: Enable the I2C controllers ARM: sun4i: dt: Add support for the INet-97F_Rev_02 board ARM: sun4i: dt: Add support for the A10-OLinuXino-LIME board ARM: sun7i: dt: Add USB host nodes to a20-olinuxino-micro dts ARM: sun7i: dt: Add USB host nodes to cubieboard2 dts ARM: sun7i: dt: Add USB host nodes to cubietruck dts ARM: sun5i: dt: Add USB host nodes to a13-olinuxino-micro ARM: sun5i: dt: Add USB host nodes to a10s-olinuxino-micro ARM: sun5i: dt: Add USB host nodes to A13-Olinuxino ARM: sun4i: dt: Add USB host nodes to pcduino.dts ARM: sun4i: dt: Add USB host nodes to mini-xplus dts ARM: sun4i: dt: Add USB host nodes to hackberry dts ARM: sun4i: dt: Add USB host nodes to cubieboard dts ARM: sun4i: dt: Add USB host nodes to Mele A1000 dts ARM: sun7i: dt: Add USB host bindings ARM: sun5i: dt: Add USB host bindings ARM: sun4i: dt: Add USB host bindings ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-13ARM: sunxi: dt: Update the watchdog compatiblesMaxime Ripard1-1/+1
The watchdog compatibles were following a different pattern than the one found in the other devices. Now that the driver supports the right pattern, switch to it in the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-03-12ARM: sunxi: dt: Convert to the new clocksource compatibleMaxime Ripard1-1/+1
Switch the device tree to the new compatibles introduced in the timer driver to have a common pattern accross all Allwinner SoCs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-03-09Merge tag 'sunxi-dt-for-3.15' of https://github.com/mripard/linux into next/dtOlof Johansson1-36/+204
Allwinner DT patches for 3.15, take 1 from Maxime Ripard: - Add SPI controllers for all the SoCs - Add various missing aliases - Add USB clocks nodes - Addition of the GMAC support - Introduction of the pcDuino board - A few DT cleanup patches: change of compatibles, * tag 'sunxi-dt-for-3.15' of https://github.com/mripard/linux: (33 commits) ARM: sun6i: dt: Fix mod0 compatible ARM: dts: sun7i: Enable the SPI controllers of the A20-olinuxino-micro ARM: dt: sun7i: Add SPI muxing options ARM: dt: sun5i: Add A13 SPI controller nodes ARM: dt: sun5i: Add A10s SPI controller nodes ARM: dt: sun4i: Add A10 SPI controller nodes ARM: dt: sun7i: Add A20 SPI controller nodes ARM: sun4i: dt: Remove grouping + simple-bus compatible for regulators ARM: sunxi: dt: Convert to the new clock compatibles ARM: sun7i: add arch timer node ARM: sun7i: dt: Add bindings for USB clocks ARM: sun5i: dt: Add bindings for USB clocks ARM: sun4i: dt: Add bindings for USB clocks ARM: dts: sun7i: Add ethernet alias for GMAC ARM: dts: sun7i: a20-olinuxino-micro: Enable GMAC instead of EMAC ARM: dts: sun7i: cubieboard2: Enable GMAC instead of EMAC ARM: dts: sun7i: cubietruck: Enable the GMAC ARM: dts: sun7i: Add pin muxing options for the GMAC ARM: dts: sun7i: Add GMAC controller node to sun7i DTSI ARM: dts: sun7i: Add GMAC clock node to sun7i DTSI ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-03-09Merge tag 'sunxi-fixes-for-3.14' of https://github.com/mripard/linux into fixesOlof Johansson1-6/+6
Allwinner fixes from Maxime Ripard: Two fixes for device trees additions that got added in 3.14. One fixes the interrupt types of some IPs, the other fixes up a compatible that got introduced during 3.14 * tag 'sunxi-fixes-for-3.14' of https://github.com/mripard/linux: ARM: sunxi: dt: Change the touchscreen compatibles ARM: sun7i: dt: Fix interrupt trigger types Signed-off-by: Olof Johansson <olof@lixom.net>
2014-03-04ARM: sun7i: dt: Add USB host bindingsRoman Byshko1-0/+52
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers. Signed-off-by: Roman Byshko <rbyshko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-03-04ARM: sun7i: dt: Add ahci / sata supportHans de Goede1-0/+8
This patch adds sunxi sata support to A20 boards that have such a connector. Some boards also feature a regulator via a GPIO and support for this is also added. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-24ARM: dt: sun7i: Add SPI muxing optionsMaxime Ripard1-0/+14
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-24ARM: dt: sun7i: Add A20 SPI controller nodesMaxime Ripard1-0/+44
The A20 has 4 SPI controllers compatible with the one found in the A10. Add them in the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-18ARM: sunxi: dt: Convert to the new clock compatiblesMaxime Ripard1-27/+27
Switch the device tree to the new compatibles introduced in the clock drivers to have a common pattern accross all Allwinner SoCs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-18ARM: sun7i: add arch timer nodeMarc Zyngier1-0/+8
The Allwinner A20 SoC is built around a pair of Cortex-A7 cores, which have the usual generic timers. Report this in the DT. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-18ARM: sun7i: dt: Add bindings for USB clocksRoman Byshko1-0/+9
Signed-off-by: Roman Byshko <rbyshko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-10ARM: dts: sun7i: Add ethernet alias for GMACChen-Yu Tsai1-1/+1
All Allwinner A20 boards we support can only use either EMAC or GMAC, as they share the same pins. As we have switched all supported to GMAC, we should alias GMAC (the active controller) as ethernet0, so u-boot will insert the MAC address for the correct controller. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-10ARM: dts: sun7i: Add pin muxing options for the GMACChen-Yu Tsai1-0/+26
The A20 has EMAC and GMAC muxed on the same pins. Add pin sets with gmac function for MII and RGMII mode to the DTSI. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-10ARM: dts: sun7i: Add GMAC controller node to sun7i DTSIChen-Yu Tsai1-0/+15
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-10ARM: dts: sun7i: Add GMAC clock node to sun7i DTSIChen-Yu Tsai1-0/+28
The GMAC uses 1 of 2 sources for its transmit clock, depending on the PHY interface mode. Add both sources as dummy clocks, and as parents to the GMAC clock node. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-08ARM: sunxi: dt: Change the touchscreen compatiblesMaxime Ripard1-1/+1
Switch the device tree touchscreen compatibles to have a common pattern accross all Allwinner SoCs. Since the touchscreen driver has not been merged yet, it has no side effect. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-08ARM: sun7i: dt: Fix interrupt trigger typesMaxime Ripard1-5/+5
The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The GIC can work on several interrupt triggers, and the A20 was actually setting it up to use a rising edge as a trigger, while it was actually a level high trigger, leading to some interrupts that would be completely ignored if the edge was missed. Fix this for the remaining DT nodes that slipped through. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: stable@vger.kernel.org
2014-02-07ARM: dts: sun7i: rename clock node names to clk@NChen-Yu Tsai1-8/+17
Device tree naming conventions state that node names should match node function. Change fully functioning clock nodes to match and add clock-output-names to all sunxi clock nodes. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-07ARM: sunxi: dt: Convert to the new net compatiblesMaxime Ripard1-2/+2
Switch the device tree to the new compatibles introduced in the ethernet and mdio drivers to have a common pattern accross all Allwinner SoCs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-02-03ARM: dts: sun7i: add pin muxing options for UART2Chen-Yu Tsai1-0/+7
UART2 is used on CubieTruck to connect to the Bluetooth module. Add the pin set used in this case. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-02-03ARM: sun7i: Add missing serial aliasesMaxime Ripard1-0/+8
Some UART aliases have been defined, but not all of them. Add the remaining ones to be consistent and to ease the parsing of the DT by the bootloaders. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-01-24Merge tag 'dt-for-linus' of ↵Linus Torvalds1-12/+210
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Olof Johansson: "DT and DT-conversion-related changes for various ARM platforms. Most of these are to enable various devices on various boards, etc, and not necessarily worth enumerating. New boards and systems continue to come in as new devicetree files that don't require corresponding C changes any more, which is indicating that the system is starting to work fairly well. A few things worth pointing out: * ST Ericsson ux500 platforms have made the major push to move over to fully support the platform with DT * Renesas platforms continue their conversion over from legacy platform devices to DT-based for hardware description" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (327 commits) ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6 ARM: dts: sirf: add lost minigpsrtc device node ARM: dts: sirf: add clock, frequence-voltage table for CPU0 ARM: dts: sirf: add lost bus_width, clock and status for sdhci ARM: dts: sirf: add lost clocks for cphifbg ARM: dts: socfpga: add pl330 clock ARM: dts: socfpga: update L2 tag and data latency arm: sun7i: cubietruck: Enable the i2c controllers ARM: dts: add support for EXYNOS4412 based TINY4412 board ARM: dts: Add initial support for Arndale Octa board ARM: bcm2835: add USB controller to device tree ARM: dts: MSM8974: Add MMIO architected timer node ARM: dts: MSM8974: Add restart node ARM: dts: sun7i: external clock outputs ARM: dts: sun7i: Change 32768 Hz oscillator node name to clk@N style ARM: dts: sun7i: Add pin muxing options for clock outputs ARM: dts: sun7i: Add rtp controller node ARM: dts: sun5i: Add rtp controller node ARM: dts: sun4i: Add rtp controller node ...
2014-01-14Merge branch 'clockevents/3.14' of ↵Ingo Molnar1-0/+10
git://git.linaro.org/people/daniel.lezcano/linux into timers/core Pull clocksource/clockevent updates from Daniel Lezcano: * Axel Lin removed an unused structure defining the ids for the bcm kona driver. * Ezequiel Garcia enabled the timer divider only when the 25MHz timer is not used for the armada 370 XP. * Jingoo Han removed a pointless platform data initialization for the sh_mtu and sh_mtu2. * Laurent Pinchart added the clk_prepare/clk_unprepare for sh_cmt. * Linus Walleij added a useful warning in clk_of when no clocks are found while the old behavior was to silently hang at boot time. * Maxime Ripard added the high speed timer drivers for the Allwinner SoCs (A10, A13, A20). He increased the rating, shared the irq across all available cpus and fixed the clockevent's irq initialization for the sun4i. * Michael Opdenacker removed the usage of the IRQF_DISABLED for the all the timers driver located in drivers/clocksource. * Stephen Boyd switched to sched_clock_register for the arm_global_timer, cadence_ttc, sun4i and orion timers. Conflicts: drivers/clocksource/clksrc-of.c Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-01-02ARM: dts: sun7i: external clock outputsChen-Yu Tsai1-0/+28
This commit adds the two external clock outputs available on A20 to its device tree. A dummy fixed factor clock is also added to serve as the first input of the clock outputs, which according to AW's A20 user manual, is the 24MHz oscillator divided by 750. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-01-02ARM: dts: sun7i: Change 32768 Hz oscillator node name to clk@N styleChen-Yu Tsai1-1/+2
Device tree naming conventions state that node names should match the nodes function. Change external low speed oscillator node name to match. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-01-02ARM: dts: sun7i: Add pin muxing options for clock outputsChen-Yu Tsai1-0/+14
This patch adds the clock output pin options on the A20. The 2 pins can output a configurable clock to be used by external modules. This is used on the CubieTruck, to supply a 32768 Hz low power clock to the onboard Wifi+BT module. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-01-02ARM: dts: sun7i: Add rtp controller nodeHans de Goede1-0/+6
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-12-30Merge tag 'sunxi-clk-3.14-for-maxime' of ↵Maxime Ripard1-11/+150
https://bitbucket.org/emiliolopez/linux into sunxi/dt-for-3.14 Allwinner sunXi SoCs DT changes for clocks This contains the DT parts of the "[PATCH v3 00/13] clk: sunxi: add PLL5 and PLL6 support" series. It adds DT nodes for PLL4/5/6 and mod0 clocks on most sunxi platforms.
2013-12-29ARM: sunxi: dt: add nodes for the mbus clockEmilio López1-0/+8
mbus is the memory bus clock, and it is present on both sun5i and sun7i machines. Its register layout is compatible with the mod0 one. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-12-29ARM: sun7i: dt: mod0 clocksEmilio López1-0/+120
This commit adds all the mod0 clocks available on A20 to its device tree. This list was created by looking at AW's code release. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-12-29ARM: sunxi: add PLL5 and PLL6 supportEmilio López1-12/+16
This commit adds PLL5 and PLL6 nodes to the sun4i, sun5i and sun7i device trees. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-12-29ARM: sunxi: add PLL4 supportEmilio López1-0/+7
This commit adds the PLL4 definition to the sun4i, sun5i and sun7i device trees. PLL4 is compatible with PLL1. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-12-12ARM: sun7i: dt: Fix interrupt trigger typesMaxime Ripard1-21/+21
The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The GIC can work on several interrupt triggers, and the A20 was actually setting it up to use a rising edge as a trigger, while it was actually a level high trigger, leading to some interrupts that would be completely ignored if the edge was missed. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Cc: stable@vger.kernel.org #3.12+ Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-11ARM: sun7i: a20: Add support for the High Speed TimersMaxime Ripard1-0/+10
The Allwinner A20 has support for four high speed timers. Apart for the number of timers (4 vs 2), it's basically the same logic than the high speed timers found in the sun5i chips. Now that we have a driver to support it, we can enable them in the device tree. [dlezcano] : Fixed conflict with 428abbb8 "Enable the I2C controllers" Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-11-23ARM: sunxi: dt: add EMAC aliasesEmilio López1-0/+4
U-Boot uses the ethernet0 alias to locate the right node to fill in the MAC address of the first ethernet interface. This patch adds the alias on all the sunxi SoCs with EMAC. In this way, people using ethernet in U-Boot (eg, for tftp) can keep a consistent address on both U-Boot and Linux with no additional effort. Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-11-23ARM: dts: sun4i/sun7i: add RTC nodeCarlo Caione1-0/+6
Add the RTC node to DTS for Allwinner A10 and Allwinner A20. Signed-off-by: Carlo Caione <carlo.caione@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-09-18ARM: sun7i: Add the pin muxing options for the I2C controllersMaxime Ripard1-0/+21
The A20 boards we currently have share the same pins for the i2c controllers they share. Add them to the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-09-18ARM: sun7i: Enable the I2C controllersMaxime Ripard1-0/+45
The Allwinner A20 shares the same I2C controller than the one that could be found on earlier SoCs from Allwinner. There is only a few more of these controllers. Add all of them in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-09-17ARM: sunxi: dt: Add sunxi-sid to dts for sun4i, sun5i and sun7iOliver Schinagl1-0/+5
This patch shall add support for the sunxi-sid driver to the device tree for A10, A10s, A13 and A20. Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-09-12ARM: dts: sun7i: Add the muxing options for the EMACMaxime Ripard1-0/+11
The A20 has several muxing options for the EMAC. Yet, the currently supported boards only use one set of them. Add that pin set to the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-09-12ARM: dts: sun7i: Enable the Ethernet in the A20Maxime Ripard1-0/+16
The Allwinner A20 SoC also have the EMAC found on the A10 and A10s. Enable the support for it in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-26ARM: sun7i: Enable the A20 clocks in the DTSIMaxime Ripard1-10/+116
Now that the clock driver knows about the available clocks found on the A20, we can build up the clock tree from the device tree. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-08-22ARM: sun7i: DT: Add UART muxing options to the DTSIMaxime Ripard1-0/+21
The UARTs on the A20 can be muxed to several pins. Add a few options to the DTSI so that we can start using them in the boards' DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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