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2022-02-09ARM: dts: arria10: add board compatible for SoCFPGA DKKrzysztof Kozlowski1-1/+1
The Altera SoCFPGA Arria 10 SoC Development Kit is a board with Arria 10, so it needs its own compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2020-07-19ARM: dts: socfpga: add the temperature sensor to the Arria10 devkitDinh Nguyen1-0/+5
Add the Maxim max1619 temp sensor that is on the Arria10 devkit. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-06-10ARM: dts: socfpga: add ltc2497 on arria10 devkitAlan Tull1-0/+19
Add the two ltc2497 devices that are on the SoCFPGA Arria10 Socdk board at addresses 0x14 and 0x16. Signed-off-by: Alan Tull <atull@kernel.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-11-28arm: dts: socfpga*.dts*: use SPDX-License-IdentifierSimon Goldschmidt1-13/+1
Follow the recent trend for the license description. This is also in an effort to fully sync the devicetrees with U-Boot. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-01-23ARM: dts: socfpga: disable over-current for Arria10 USB devkitDinh Nguyen1-0/+1
The USB host functionality on the Arria10 needs the disable-over-current property. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-06-23ARM: dts: socfpga: set the i2c frequencyDinh Nguyen1-1/+1
Use 'clock-frequency' binding for the i2c node that will put the I2C driver into the standard operating mode. 'speed-mode' was not a valid binding for the I2C driver, remove it. Signed-off-by: Alan Tull <atull@kernel.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-03-16ARM: dts: socfpga: Add Devkit A10-SR Reset ControllerThor Thayer1-0/+5
Add the Altera Arria10 System Resource Reset Controller to the MFD Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- v2 change commit header to ARM: dts: socfpga.
2017-03-07ARM: dts: socfpga: Add unit name to memory nodesFlorian Vaussard1-1/+1
Memory nodes in Arria5, Cyclone5 and Arria10 do not have a unit name. This will trigger several warnings like this one (when compiled with W=1): Node /memory has a reg or ranges property, but no unit name Add the corresponding unit name to each node. Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-01-25ARM: dts: watchdog0 cannot reliably trigger resetDinh Nguyen1-1/+1
On the Arria10, because of hardware bug, watchdog0 cannot reliably trigger a reset to the CPU. The workaround would be to use watchdog1 instead. Also for watchdog1, there is a dependency on the bootloader to enable the boot_clk source to be from the cb_intosc_hs_clk/2, versus from EOSC1. This corresponds to the (SWCTRLBTCLKEN & SWCTRLBTCLKSEL) bits enabled in the control register in the clock manager module of Arria10. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-01-05ARM: dts: socfpga: add the LTC2977 power monitor on Arria10 devkitDinh Nguyen1-0/+5
Add the I2C LTC 2977 power monitor that is on the Arria10 devkit. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-01-05ARM: dts: socfpga: enable watchdog timer on Arria5 and Arria10Dinh Nguyen1-0/+4
Enable the watchdog for Arria5 and Arria10. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2016-10-19ARM: dts: socfpga: Add LED framework to A10-SR GPIOThor Thayer1-0/+24
Add the LED framework to the Arria10 System Resource chip GPIO hooks. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-19ARM: dts: socfpga: Enable GPIO parent for Arria10 SR chipThor Thayer1-0/+4
Enable the Altera Arria10 GPIO parent for MFD operation. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-19ARM: dts: socfpga: Add Devkit A10-SR fields for Arria10Thor Thayer1-0/+21
Add the Altera Arria10 System Resource node. This is a Multi-Function device with GPIO expander support. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-06-08ARM: dts: socfpga: fix definitions of serial consoleMatthew Gerlach1-1/+2
The notion of which uart instance is serial0 or serial1 is board specific rather than generic to the chip. This patch removes the serial aliases from generic chip dtsi and adds an appropriate alias to the board specific dtsi. By making the alias for serial0 point to uart1 for the arria10_socdk, the linux boot command line supports specifying console=ttyS0,115200 for backwards compatibility, and it supports not specifying the console at all. Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-06-08ARM: dts: socfpga: add ethernet alias on Arria10Dinh Nguyen1-0/+4
Without having an ethernet alias, ethernet will have a random MAC address, versus take an address that was provided from the bootloader. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-10-06ARM: socfpga: dts: enable USB and I2C on Arria10 SoCDKDinh Nguyen1-0/+27
On the Arria10 Devkit, the I2C bus has a serial EEPROM and an RTC hanging off it. Also, enable the USB node. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-07-20ARM: dts: socfpga: use stdout-path for chosen nodeDinh Nguyen1-1/+2
Use stdout-path dts property for kernel console. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-06-11ARM: socfpga: dts: enable ethernet for Arria10 devkitDinh Nguyen1-0/+28
Update the arria10 gmac nodes with all the necessary properties for ethernet to function on the Arria10 devkit. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
2015-05-11ARM: socfpga: dts: rename socdk board file to socdk_sdmmcDinh Nguyen1-0/+46
Rename the socfpga_arria10_socdk board file to socfpga_arria10_socdk_sdmmc as Arria 10 devkit cannot support SDMMC and QSPI at the same time. Thus we will need to have 2 separate board files, one for SDMMC and one for QSPI. We also add a new base board dtsi file, socfpga_arria10_socdk.dtsi so that we use common peripherals for each flavor of the devkits. Add the sdmmc node to the socfpga_arria10_socdk_sdmmc.dts board file. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>