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2016-08-02Merge tag 'armsoc-dt' of ↵Linus Torvalds1-11/+13
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "Device tree contents continue to be the largest branches we submit. This time around, some of the contents worth pointing out is: New SoC platforms: - Freescale i.MX 7Solo - Broadcom BCM23550 - Cirrus Logic EP7209 and EP7211 (clps711x platforms)_ - Hisilicon HI3519 - Renesas R8A7792 Some of the other delta that is sticking out, line-count wise: - Exynos moves of IP blocks under an SoC bus, which causes a large delta due to indentation changes - a new Tegra K1 board: Apalis - a bunch of small updates to many Allwinner platforms; new hardware support, some cleanup, etc" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (426 commits) ARM: dts: sun8i: Add dts file for inet86dz board ARM: dts: sun8i: Add dts file for Polaroid MID2407PXE03 tablet ARM: dts: sun8i: Use sun8i-reference-design-tablet for ga10h dts ARM: dts: sun8i: Use sun8i-reference-design-tablet for polaroid mid2809pxe04 ARM: dts: sun8i: reference-design-tablet: Add drivevbus-supply ARM: dts: Copy sun8i-q8-common.dtsi sun8i-reference-design-tablet.dtsi ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for utoo p66 dts ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for dit4350 dts ARM: dts: sun5i: reference-design-tablet: Remove mention of q8 ARM: dts: sun5i: reference-design-tablet: Set lradc vref to avcc ARM: dts: sun5i: Rename sun5i-q8-common.dtsi sun5i-reference-design-tablet.dtsi ARM: dts: sun5i: Move q8 display bits to sun5i-a13-q8-tablet.dts ARM: dts: sunxi: Rename sunxi-q8-common.dtsi sunxi-reference-design-tablet.dtsi ARM: dts: at91: Don't build unnecessary dtbs ARM: dts: at91: sama5d3x: separate motherboard gmac and emac definitions ARM: dts: at91: at91sam9g25ek: fix isi endpoint node ARM: dts: at91: move isi definition to at91sam9g25ek ARM: dts: at91: fix i2c-gpio node name ARM: dts: at91: vinco: fix regulator name ARM: dts: at91: ariag25 : fix onewire node ...
2016-06-27ARM: dts: Add Arria10 Ethernet EDAC devicetree entryThor Thayer1-0/+16
Add the device tree entries needed to support the Altera Ethernet FIFO buffer EDAC on the Arria10 chip. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1466603939-7526-9-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2016-06-08ARM: dts: socfpga: fix definitions of serial consoleMatthew Gerlach1-5/+0
The notion of which uart instance is serial0 or serial1 is board specific rather than generic to the chip. This patch removes the serial aliases from generic chip dtsi and adds an appropriate alias to the board specific dtsi. By making the alias for serial0 point to uart1 for the arria10_socdk, the linux boot command line supports specifying console=ttyS0,115200 for backwards compatibility, and it supports not specifying the console at all. Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-06-03ARM: dts: Move Arria10 SDRAM as child of ECC ManagerThor Thayer1-6/+7
Changes to support ECC Manager as SDRAM IRQ parent by 1) updating IRQ property values to correct child IRQs 2) moving node under ECC Manager. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-06-03ARM: dts: Arria10 ECC Manager IRQ controller changesThor Thayer1-0/+6
Changes to support IRQ controller implementation including adding new property irq-controller to eccmgr and adding IRQ property to children. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-04-11ARM: dts: socfpga: add reset control for USBDinh Nguyen1-0/+4
Add the resets property for the 2 USB controllers. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-04-11ARM: dts: socfpga: Add Altera Arria10 OCRAM EDAC devicetree entryThor Thayer1-0/+5
Add the device tree entries needed to support the Altera On-Chip RAM EDAC on the Arria10 chip. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-04-11ARM: dts: socfpga: Add Altera Arria10 L2 Cache EDAC devicetree entryThor Thayer1-0/+15
Add the device tree entries needed to support the Altera L2 cache EDAC on the Arria10 chip. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-04-11ARM: dts: socfpga: Add missing clock and interrupt fields for Arria10 DMAGraham Moore1-1/+4
The PL330 DMA driver will not load on Arria10 without devicetree entries for clocks and clock_names. This patch adds those entries. It also adds the ninth interrupt, which is required for error detection. Signed-off-by: Graham Moore <grmoore@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-04-11ARM: dts: socfpga: add the clk-phase property for sd/mmc clockDinh Nguyen1-1/+2
The CIU clock for the SD/MMC should be the sdmmc_clk and not the sdmmc_free_clk. Also, add the correct phase shift the sdmmc_clk. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-03-13ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus"Masahiro Yamada1-1/+1
The compatible string "simple-bus" is well defined in ePAPR, while I see no documentation for the "arm,amba-bus" arnywhere in ePAPR or Documentation/devicetree/. DT is also used by other projects than Linux kernel. It is not a good idea to rely on such an unofficial binding. This commit - replaces "arm,amba-bus" with "simple-bus" - drops "arm,amba-bus" where it is used along with "simple-bus" Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-06ARM: socfpga: dts: add clock fields for I2C, UART and USB on Arria10Dinh Nguyen1-0/+8
Add the required clock fields for all the I2C nodes. Also add missing clock fields for UART0 and USB1. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-13Merge tag 'socfpga_dts_for_v4.3_part_2' of ↵Olof Johansson1-0/+6
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt SoCFPGA DTS updates for v4.3, take 2 - Add DTS property "altr,modrst-offset" for reset driver to use - Add updated reset defines for the reset driver - Add reset property for EMACs on Arria10 * tag 'socfpga_dts_for_v4.3_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: socfpga: dts: Add resets for EMACs on Arria10 ARM: socfpga: dts: add "altr,modrst-offset" property dt-bindings: Add reset manager offsets for Arria10 Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-10ARM: socfpga: dts: Add resets for EMACs on Arria10Dinh Nguyen1-0/+5
Add the reset property for the EMAC controllers on Arria10. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-10ARM: socfpga: dts: add "altr,modrst-offset" propertyDinh Nguyen1-0/+1
The "altr,modrst-offset" property represents the offset into the reset manager that is the first register to be used by the driver to bring peripherals out of reset. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-07-20ARM: dts: socfpga: use stdout-path for chosen nodeDinh Nguyen1-0/+5
Use stdout-path dts property for kernel console. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-06-26Merge tag 'armsoc-dt' of ↵Linus Torvalds1-16/+336
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Kevin Hilman: "As usual, quite a few device-tree updates in ARM land. There was one minor churn in DTs due to relicensing under a dual-license, and lots of little additions of new peripherals, features etc, but nothing really exciting to call to your attention. Some higlights, focsuing on support for new SoCs and boards: - AT91: new boards: Overkiz, Acme Systems' Arietta G25 - tegra: HDA support - bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS RT-AC87U - mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys boards, DLink DNS-327L - OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill SL50 - ARM: added support for Juno r1 board - sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33, Mele A1000G - imx: i.MX7D SoC support; new boards: Armadeus Systems APF6, Gateworks GW5510, and aristainetos2 boards - hisilicon: hi6220 SoC support; new boards: 96boards hikey" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits) ARM: hisi: revert changes from hisi/hip04-dt branch ARM: nomadik: set proper compatible for accelerometer ARM64: juno: add GPIO keys ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes ARM: dts: Introduce STM32F429 MCU ARM: socfpga: dts: enable ethernet for Arria10 devkit ARM: dts: k2l: fix the netcp range size ARM: dts: k2e: fix the netcp range size ARM: dts: k2hk: fix the netcp range size ARM: dts: k2l-evm: Add device bindings for netcp driver ARM: dts: k2e-evm: Add device bindings for netcp driver ARM: dts: k2hk-evm: Add device bindings for netcp driver ARM: BCM5301X: Add DT for Asus RT-AC87U ARM: BCM5301X: add IRQ numbers for PCIe controller ARM: BCM5301X: add NAND flash chip description arm64: dts: Add dts files for Hisilicon Hi6220 SoC clk: hi6220: Document devicetree bindings for hi6220 clock arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC ARM: at91/dt: sama5d4ek: mci0 uses slot 0 ARM: at91/dt: kizbox: fix mismatch LED PWM device ...
2015-06-24arm: socfpga: dts: Add Arria10 SDRAM EDAC DTS supportThor Thayer1-0/+11
Add support for the Arria10 SDRAM EDAC. Update the bindings document for the new match string. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: devicetree@vger.kernel.org Cc: dinguyen@opensource.altera.com Cc: galak@codeaurora.org Cc: grant.likely@linaro.org Cc: ijc+devicetree@hellion.org.uk Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: m.chehab@samsung.com Cc: mark.rutland@arm.com Cc: pawel.moll@arm.com Cc: robh+dt@kernel.org Cc: tthayer.linux@gmail.com Link: http://lkml.kernel.org/r/1433428128-7292-5-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2015-06-11ARM: socfpga: dts: enable ethernet for Arria10 devkitDinh Nguyen1-0/+11
Update the arria10 gmac nodes with all the necessary properties for ethernet to function on the Arria10 devkit. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
2015-06-11Merge tag 'socfpga_dts_for_v4.2_part_3' of ↵Kevin Hilman1-0/+6
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt SoCFPGA updates for v4.2 part 3 - Add SCU node for Arria 10 - Add enable-method for cpu nodes - Add SDRAM controller binding doc - Enable gpio-leds on SoCFPGA Socrates board * tag 'socfpga_dts_for_v4.2_part_3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: socfpga: socrates: add gpio-leds ARM: socfpga: socrates: enable gpio0/1 ARM: socfpga: dts: add sdram controller dt binding doc ARM: socfpga: dts: add enable-method property for cpu nodes ARM: socfpga: dts: add the a9-scu node for arria10
2015-06-02ARM: socfpga: dts: add enable-method property for cpu nodesDinh Nguyen1-0/+1
Add the enable-method property for the cpu node on socfpga.dtsi and socfpga_arria10.dtsi. This is for CPU_METHOD_OF_DECLARE to use to enable the secondary core. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-06-02ARM: socfpga: dts: add the a9-scu node for arria10Dinh Nguyen1-0/+5
Add a dts node for the A9 SCU on the Arria10 platform. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-05-11ARM: socfpga: dts: add clocks to the Arria10 platformDinh Nguyen1-4/+305
Add all the clock nodes for the Arria10 platform. At the same time, update the peripherals with their respective clocks property. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> --- v2: Add the l4_sys_free_clk node
2015-05-11ARM: socfpga: dts: Add tx-fifo-depth and rx-fifo-depth propertiesVince Bridgers1-0/+4
Add tx-fifo-depth and rx-fifo-depth devicetree properties for socfpga stmmac. These devicetree properties will be used to configure certain features of the stmmac on the socfpga. Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-05-11ARM: socfpga: dts: Add multicast bins and unicast filter entriesVince Bridgers1-0/+6
Add multicast-filter-bins and perfect-filter-entries configuration properties to the socfpga devicetree for the Arria 10 socfpga. Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-05-11ARM: socfpga: dts: enable UART1 for the debug uartDinh Nguyen1-12/+0
Arria10 devkit is using UART1 for the debug uart port. Remove unused aliases. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> --- v2: Add removal of unused aliases
2015-05-11ARM: socfpga: dts: disable the sdmmc, and uart nodes in the base arria10Dinh Nguyen1-0/+3
Add status = "disabled" in the base DTSI for Arria10. The SDMMC and uart nodes should be enabled in the appropriate board file. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-05-11ARM: socfpga: dts: add cpu1-start-addr for Arria 10Dinh Nguyen1-0/+1
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-11-21arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOCDinh Nguyen1-0/+374
The Arria 10 is latest SOC+FPGA from the Altera SOCFPGA platform. The Arria10 SOC shares some similarities with the SOCFPGA Cyclone5 and Arria5, but there are enough differences to warrant a new base dtsi. The differences are: * 3 EMAC controllers * 5 I2C controllers * 3 SPI controllers * 1.5 GHZ dual A9s * Support for DDR4 Besides the usual memory map and IRQ changes, the clock framework will be different, so this patch just adds the fixed-clocks. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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