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2016-04-11ARM: dts: socfpga: add reset control for USBDinh Nguyen1-0/+4
Add the resets property for the 2 USB controllers. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-03-21Merge tag 'armsoc-dt' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Arnd Bergmann: "These are all the updates to device tree files for 32-bit platforms, plus a couple of related 64-bit updates: New SoC support: - Allwinner A83T - Axis Artpec-6 SoC - Mediatek MT7623 SoC - TI Keystone K2G SoC - ST Microelectronics stm32f469 New board or machine support: - ARM Juno R2 - Buffalo Linkstation LS-QVL and LS-GL - Cubietruck plus - D-Link DIR-885L - DT support for ARM RealView PB1176 and PB11MPCore - Google Nexus 7 - Homlet v2 - Itead Ibox - Lamobo R1 - LG Optimus Black - Logicpd dm3730 - Raspberry Pi Model A Other changes include - Lots of updates for Qualcomm APQ8064, MSM8974 and others - Improved support for Nokia N900 and other OMAP machines - Common clk support for lpc32xx - HDLCD display on ARM - Improved stm32f429 support - Improved Renesas device support, r8a779x and others - Lots of Rockchip updates - Samsung cleanups - ADC support for Atmel SAMA5D2 - BCM2835 (Raspberry Pi) improvements - Broadcom Northstar Plus enhancements - OMAP GPMC rework - Several improvements for Atmel SAMA5D2 / Xplained - Global change to remove inofficial "arm,amba-bus" compatible string" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (350 commits) ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus" ARM: dts: artpec: dual-license on artpec6.dtsi ARM: dts: ux500: add synaptics RMI4 for Ux500 TVK DT arm64: dts: juno/vexpress: fix node name unit-address presence warnings arm64: dts: foundation-v8: add SBSA Generic Watchdog device node ARM: dts: at91: sama5d2 Xplained: add leds node ARM: dts: at91: sama5d2 Xplained: add user push button ARM: dts: at91: sama5d2 Xplained: set pin muxing for usb gadget and usb host ARM: dts: stm32f429: Enable Ethernet on Eval board ARM: dts: omap3-sniper: TWL4030 keypad support Revert "ARM: dts: DRA7: Add dt nodes for PWMSS" ARM: dts: dm814x: dra62x: Disable wait pin monitoring for NAND ARM: dts: dm814x: dra62x: Fix NAND device nodes ARM: dts: stm32f429: Add Ethernet support ARM: dts: stm32f429: Add system config bank node ARM: dts: at91: sama5d2: add nand0 and nfc0 nodes ARM: dts: at91: sama5d2: add dma properties to UART nodes ARM: dts: at91: sama5d2 Xplained: Correct the macb irq pinctrl node ARM: dts: exynos: Don't overheat the Odroid XU3-Lite on high load ARM: dts: exynos: Add cooling levels for Exynos5422/5800 CPUs ...
2016-03-13ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus"Masahiro Yamada1-1/+1
The compatible string "simple-bus" is well defined in ePAPR, while I see no documentation for the "arm,amba-bus" arnywhere in ePAPR or Documentation/devicetree/. DT is also used by other projects than Linux kernel. It is not a good idea to rely on such an unofficial binding. This commit - replaces "arm,amba-bus" with "simple-bus" - drops "arm,amba-bus" where it is used along with "simple-bus" Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-11ARM: dts: Add Altera L2 Cache and OCRAM EDAC entriesThor Thayer1-0/+20
Add the device tree entries and bindings needed to support the Altera L2 cache and On-Chip RAM EDAC. This patch relies upon an earlier patch to declare and setup On-chip RAM properly: 8b907c8b62ac ("arm: dts: socfpga: Add OCRAM node") Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Acked-by: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: galak@codeaurora.org Cc: grant.likely@linaro.org Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: ijc+devicetree@hellion.org.uk Cc: Kumar Gala <galak@codeaurora.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux@arm.linux.org.uk Cc: linux-doc@vger.kernel.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: m.chehab@samsung.com Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Link: http://lkml.kernel.org/r/1455132384-17108-2-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
2015-12-21ARM: socfpga: dts: Enable MMC support at correct place in the DTMarek Vasut1-0/+1
The socfpga.dtsi explicitly enabled MMC support, but not all boards are equiped with an MMC card. There are setups which only have QSPI NOR. Therefore, disable the MMC support on socfpga.dtsi level and enable it on per-board basis. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alan Tull <atull@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Olof Johansson <olof@lixom.net> Cc: Thor Thayer <tthayer@altera.com> Cc: Vince Bridgers <vbridgers2013@gmail.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-10-22Merge tag 'socfpga_for_v4.4_cleanup' of ↵Olof Johansson1-64/+64
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt SoCFPGA dts cleanup for v4.4 - Re-order DTS nodes into correct alphabetical order * tag 'socfpga_for_v4.4_cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: socfpga: dts: sort nodes alphabetically Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-16ARM: socfpga: dts: sort nodes alphabeticallySteffen Trumtrar1-64/+64
The sorting policy for this file is alphabetically. Reorder all nodes, that are out of place. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-10-16ARM: socfpga: dts: add fpga managerAlan Tull1-0/+7
Add FPGA manager to device tree for SoCFPGA. Signed-off-by: Alan Tull <atull@opensource.altera.com> Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-13Merge tag 'socfpga_dts_for_v4.3_part_2' of ↵Olof Johansson1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt SoCFPGA DTS updates for v4.3, take 2 - Add DTS property "altr,modrst-offset" for reset driver to use - Add updated reset defines for the reset driver - Add reset property for EMACs on Arria10 * tag 'socfpga_dts_for_v4.3_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: socfpga: dts: Add resets for EMACs on Arria10 ARM: socfpga: dts: add "altr,modrst-offset" property dt-bindings: Add reset manager offsets for Arria10 Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-10ARM: socfpga: dts: add "altr,modrst-offset" propertyDinh Nguyen1-0/+1
The "altr,modrst-offset" property represents the offset into the reset manager that is the first register to be used by the driver to bring peripherals out of reset. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-07-25ARM: socfpga: dts: add osc1 as a possible parent for dbg_base_clkDinh Nguyen1-1/+1
The dbg_base_clk can also have osc1 has a parent. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-07-22ARM: socfpga: dts: add missing clock gates to socfpga.dtsiMatthew Gerlach1-1/+30
The gates for the clocks coming out of the sdram pll were missing. The change adds the missing nodes to the device tree. Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-07-22ARM: socfpga: dts: Fix gpio dts entry for the correct clockDinh Nguyen1-3/+3
The correct clock for the HPS gpio(s) should be the l4_mp_clk. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-07-22ARM: socfpga: dts: Correct the parent clock for l3_sp_clk and dbg_clkDinh Nguyen1-2/+2
The l3_sp_clk's parent should be the l3_mp_clk. This will account for the extra divider that is present for the l3_mp_clk. The dbg_clk's parent should be the dbg_at_clk. This will account for the extra divider that is present for the dbg_at_clk. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-07-20ARM: dts: socfpga: enable the data and instruction prefetch for the l2 cacheDinh Nguyen1-0/+2
Just in case the firmware did not enable data and instruction prefetch in the L2 cache controller, we enable it in the kernel. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-06-11Merge tag 'socfpga_dts_for_v4.2_part_3' of ↵Kevin Hilman1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt SoCFPGA updates for v4.2 part 3 - Add SCU node for Arria 10 - Add enable-method for cpu nodes - Add SDRAM controller binding doc - Enable gpio-leds on SoCFPGA Socrates board * tag 'socfpga_dts_for_v4.2_part_3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: socfpga: socrates: add gpio-leds ARM: socfpga: socrates: enable gpio0/1 ARM: socfpga: dts: add sdram controller dt binding doc ARM: socfpga: dts: add enable-method property for cpu nodes ARM: socfpga: dts: add the a9-scu node for arria10
2015-06-02ARM: socfpga: dts: add enable-method property for cpu nodesDinh Nguyen1-0/+1
Add the enable-method property for the cpu node on socfpga.dtsi and socfpga_arria10.dtsi. This is for CPU_METHOD_OF_DECLARE to use to enable the secondary core. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-05-13Merge tag 'socfpga_dts_for_v4.2_part_2' of ↵Arnd Bergmann1-0/+5
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt Merge "SoCFPGA update for v4.2 part 2" from Dinh Nguyen: - Add a DTS node for the A9 SCU * tag 'socfpga_dts_for_v4.2_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: socfpga: dts: add the a9-scu node
2015-05-13ARM: socfpga: dts: add the a9-scu nodeDinh Nguyen1-0/+5
Add the dts node for the A9 SCU. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-05-11ARM: socfpga: dts: Add tx-fifo-depth and rx-fifo-depth propertiesVince Bridgers1-0/+4
Add tx-fifo-depth and rx-fifo-depth devicetree properties for socfpga stmmac. These devicetree properties will be used to configure certain features of the stmmac on the socfpga. Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-05-11ARM: socfpga: dts: Add a clock node for sdmmc CIUDinh Nguyen1-1/+9
The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided node and makes the sdmmc_clk it's parent. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> --- v2: renamed ciu_clk to sdmmc_clk_divided
2015-03-19ARM: socfpga: dts: fix spi1 interruptMark James1-1/+1
The socfpga.dtsi currently has the wrong interrupt number set for SPI master 1 Trying to use the master without this change results in the kernel boot process waiting forever for an interrupt that will never occur while attempting to probe any slave devices configured in the device tree as being under SPI master 1. The change works for the Cyclone V, and according to the Arria 5 handbook should be good there too. Signed-off-by: Mark James <maj@jamers.net> Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-03-04ARM: socfpga: fix uart DMA binding errorSteffen Trumtrar1-0/+6
socfpga.dtsi is missing the DMA channels for the uart nodes. This will produce the following errors: of_dma_request_slave_channel: dma-names property of node '/soc/serial0@ffc02000' missing or empty ttyS0 - failed to request DMA Provide the correct DMA channels to fix this. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-11-21Merge tag 'socfpga_dts_updates_for_v3.19' of ↵Arnd Bergmann1-0/+27
git://git.rocketboards.org/linux-socfpga-next into next/dt Pull "SoCFPGA DTS updates for v3.19" from Dinh Nguyen: - Add DTS support for a new chip in the SOCFPGA family, the Arria 10. - Enable watchdog node. - Add SPI nodes. - Add the OCRAM node. * tag 'socfpga_dts_updates_for_v3.19' of git://git.rocketboards.org/linux-socfpga-next: arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC arm: dts: socfpga: enable watchdog for socfpga platform arm: dts: socfpga: Add SPI nodes to SOCFPGA DT. arm: dts: socfpga: Add OCRAM node Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-21arm: dts: socfpga: Add SPI nodes to SOCFPGA DT.Thor Thayer1-0/+22
Add 2 SPI nodes to SOCFPGA device tree. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-11-21arm: dts: socfpga: Add OCRAM nodeDinh Nguyen1-0/+5
Add a 64KB ocram node for SOCFPGA. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-10-23ARM: dts: socfpga: rename gpio nodesDinh Nguyen1-6/+6
Since the Synopsys GPIO IP can support multiple ports of varying widths, it would make more sense to have the GPIO node DTS entry as this: gpio0: gpio@ff708000{ porta{ }; }; Also, this is documented in the snps-dwapb-gpio.txt. Suggested-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-09-04arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries.Thor Thayer1-0/+11
Add the Altera SDRAM EDAC bindings and device tree changes to the Altera SoC project. There was a discussion thread on whether this driver should be an mfd driver or just make use of syscon, which is already a mfd. Ultimately, the decision to use a simple syscon interface was reached.[1] [1] https://lkml.org/lkml/2014/7/30/514 Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> [dinguyen] cleaned-up commit header and remove version history. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-08-08Merge tag 'dt-for-3.17' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device-tree changes from Olof Johansson: "Unlike the board branch, this keeps having large sets of changes for every release, but that's quite expected and is so far working well. Most of this is plumbing for various device bindings and new platforms, but there's also a bit of cleanup and code removal for things that are moved from platform code to DT contents (some OMAP clock code in particular). There's also a pinctrl driver for tegra here (appropriately acked), that's introduced this way to make it more bisectable. I'm happy to say that there were no conflicts at all with this branch this release, which means that changes are flowing through our tree as expected instead of merged through driver maintainers (or at least not done with conflicts). There are several new boards added, and a couple of SoCs. In no particular order: - Rockchip RK3288 SoC support, including DTS for a dev board that they have seeded with some community developers. - Better support for Hardkernel Exynos4-based ODROID boards. - CCF conversions (and dtsi contents) for several Renesas platforms. - Gumstix Pepper (TI AM335x) board support - TI eval board support for AM437x - Allwinner A23 SoC, very similar to existing ones which mostly has resulted in DT changes for support. Also includes support for an Ippo tablet with the chipset. - Allwinner A31 Hummingbird board support, not to be confused with the SolidRun i.MX-based Hummingboard. - Tegra30 Apalis board support" * tag 'dt-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (334 commits) ARM: dts: Enable USB host0 (EHCI) on rk3288-evb ARM: dts: add rk3288 ehci usb devices ARM: dts: Turn on USB host vbus on rk3288-evb ARM: tegra: apalis t30: fix device tree compatible node ARM: tegra: paz00: Fix some indentation inconsistencies ARM: zynq: DT: Clarify Xilinx Zynq platform ARM: dts: rockchip: add watchdog node ARM: dts: rockchip: remove pinctrl setting from radxarock uart2 ARM: dts: Add missing pinctrl for uart0/1 for exynos3250 ARM: dts: Remove duplicate 'interrput-parent' property for exynos3250 ARM: dts: Add TMU dt node to monitor the temperature for exynos3250 ARM: dts: Specify MAX77686 pmic interrupt for exynos5250-smdk5250 ARM: dts: cypress,cyapa trackpad is exynos5250-Snow only ARM: dts: max77686 is exynos5250-snow only ARM: zynq: DT: Remove DMA from board DTs ARM: zynq: DT: Add CAN node ARM: EXYNOS: Add exynos5260 PMU compatible string to DT match table ARM: dts: Add PMU DT node for exynos5260 SoC ARM: EXYNOS: Add support for Exynos5410 PMU ARM: dts: Add PMU to exynos5410 ...
2014-08-01ARM: socfpga: Add socfpga Ethernet filter attributes entriesVince Bridgers1-0/+4
This patch adds socfpga Ethernet filter attributes for multicast and unicast filters per Synopsys Ethernet IP configuration chosen by Altera for the Cyclone 5 and Arria SOC FPGAs. Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-07-15ARM: socfpga: Add missing #reset-cells to socfpga device treeVince Bridgers1-0/+1
add #reset-cells to socfpga.dtsi. This was missing from the latest updates and caused the socfpga reset controller to fail to load like so: ffd05000.rstmgr: /soc/rstmgr@ffd05000 missing #reset-cells property probe of ffd05000.rstmgr failed with error -22 Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com> Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-23ARM: socfpga: dts: add watchdog0+1Steffen Trumtrar1-0/+16
The SoCFPGA has two watchdog timers. Add them to the dtsi. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> [dinh: modified patch to have correct irq flag] Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-23ARM: dts: socfpga: add gpio piecesSebastian Andrzej Siewior1-0/+60
The cycloneV has three gpio controllers, each one with 29 gpios. This patch adds the three controller with the gpio driver which is now sitting the gpio tree. Cc: devicetree@vger.kernel.org Acked-by: Alan Tull <atull@altera.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: Add div-reg to the main_pll clocksDinh Nguyen1-3/+3
The mpu_clk, main_clk, and dbg_base_clk outputs from the main PLL go through a pre-divider. Update socfpga.dtsi to represent those dividers for these clocks. Re-use the "div-reg" property that was used for the socfpga-gate-clock as this is the same thing. Also update the documentation. Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: add reset-controllerSteffen Trumtrar1-1/+6
Add the necessary #reset-cells property to the rst-mgr node and provide a header-file with all possible resets specified. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: Add DTS entries for USBDinh Nguyen1-0/+28
Update all the SOCFPGA DTS files with USB entries. Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: Remove hard coded clock-frequency propertyDinh Nguyen1-0/+10
The timers and uart can get their clock frequencies using the common clock driver. Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: convert to preprocessor includesSteffen Trumtrar1-1/+1
Convert all socfpga DT files to the dtc preprocessor include syntax. This allows to include header files in the devicetrees like other SoC-types already do. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: add can0+1Steffen Trumtrar1-0/+16
Add both can controllers to the dtsi. Reviewed-by: Pavel Machek <pavel@denx.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: add i2c bussesSteffen Trumtrar1-0/+40
Add all 4 i2c busses. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: add remaining interrupts for pdmaSteffen Trumtrar1-1/+8
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: fix pdma interruptSteffen Trumtrar1-1/+1
The first interrupt is not at 180 but 104. Fix it. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-04-06Merge tag 'clk-for-linus-3.15' of ↵Linus Torvalds1-0/+1
git://git.linaro.org/people/mike.turquette/linux Pull clock framework changes from Mike Turquette: "The clock framework changes for 3.15 look similar to past pull requests. Mostly clock driver updates, more Device Tree support in the form of common functions useful across platforms and a handful of features and fixes to the framework core" * tag 'clk-for-linus-3.15' of git://git.linaro.org/people/mike.turquette/linux: (86 commits) clk: shmobile: fix setting paretn clock rate clk: shmobile: rcar-gen2: fix lb/sd0/sd1/sdh clock parent to pll1 clk: Fix minor errors in of_clk_init() function comments clk: reverse default clk provider initialization order in of_clk_init() clk: sirf: update copyright years to 2014 clk: mmp: try to use closer one when do round rate clk: mmp: fix the wrong calculation formula clk: mmp: fix wrong mask when calculate denominator clk: st: Adds quadfs clock binding clk: st: Adds clockgen-vcc and clockgen-mux clock binding clk: st: Adds clockgen clock binding clk: st: Adds divmux and prediv clock binding clk: st: Support for A9 MUX clocks clk: st: Support for ClockGenA9/DDR/GPU clk: st: Support for QUADFS inside ClockGenB/C/D/E/F clk: st: Support for VCC-mux and MUX clocks clk: st: Support for PLLs inside ClockGenA(s) clk: st: Support for DIVMUX and PreDiv Clocks clk: support hardware-specific debugfs entries clk: s2mps11: Use of_get_child_by_name ...
2014-04-06Merge tag 'drivers-3.15' of ↵Linus Torvalds1-9/+29
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver changes from Arnd Bergmann: "These changes are mostly for ARM specific device drivers that either don't have an upstream maintainer, or that had the maintainer ask us to pick up the changes to avoid conflicts. A large chunk of this are clock drivers (bcm281xx, exynos, versatile, shmobile), aside from that, reset controllers for STi as well as a large rework of the Marvell Orion/EBU watchdog driver are notable" * tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits) Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac." Revert "net: stmmac: Add SOCFPGA glue driver" ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks ARM: STi: Add reset controller support to mach-sti Kconfig drivers: reset: stih416: add softreset controller drivers: reset: stih415: add softreset controller drivers: reset: Reset controller driver for STiH416 drivers: reset: Reset controller driver for STiH415 drivers: reset: STi SoC system configuration reset controller support dts: socfpga: Add sysmgr node so the gmac can use to reference dts: socfpga: Add support for SD/MMC on the SOCFPGA platform reset: Add optional resets and stubs ARM: shmobile: r7s72100: fix bus clock calculation Power: Reset: Generalize qnap-poweroff to work on Synology devices. dts: socfpga: Update clock entry to support multiple parents ARM: socfpga: Update socfpga_defconfig dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac. net: stmmac: Add SOCFPGA glue driver watchdog: orion_wdt: Use %pa to print 'phys_addr_t' drivers: cci: Export CCI PMU revision ...
2014-03-29dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.Dinh Nguyen1-0/+2
This patch adds the dts bindings documenation for the Altera SOCFPGA glue layer for the Synopsys STMMAC ethernet driver. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-27Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for ↵Arnd Bergmann1-33/+16
stmmac." This reverts commit 7e0b4cd06201ee9dbdf2d13bfd7b8a021b414e42. The binding changes need to be done differently as well, let's take them through netdev, and merge the dts changes in a new patch here. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-10dts: socfpga: Add sysmgr node so the gmac can use to referenceDinh Nguyen1-1/+1
commit[7e0b4cd dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.] references the sysmgr through its phandle. This patch adds the appropriate sysmgr node for the gmac to use. Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-03-10dts: socfpga: Add support for SD/MMC on the SOCFPGA platformDinh Nguyen1-3/+14
Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform specific implementation of the dw_mmc driver. Also add the "syscon" binding to the "altr,sys-mgr" node. The clock driver can use the syscon driver to toggle the register for the SD/MMC clock phase shift settings. Finally, fix an indentation error for the sysmgr node. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Chris Ball <chris@printf.net>
2014-03-03dts: socfpga: Update clock entry to support multiple parentsDinh Nguyen1-5/+14
The periph_pll and sdram_pll can have multiple parents. Update the device tree to list all the possible parents for the PLLs. Add an entry for the the f2s_sdram_ref_clk, which is a possible parent for the sdram_pll. Also remove the clock-frequency entry in the f2s_periph_ref_clk, as this property should be placed in dts file. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
2014-03-03dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.Dinh Nguyen1-16/+33
This patch adds the dts bindings documenation for the Altera SOCFPGA glue layer for the Synopsys STMMAC ethernet driver. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: David S. Miller <davem@davemloft.net> --- v3: Remove stray empty line at end of socfpga_cyclone5_socdk.dts v2: Use the dwmac-sti as an example for a glue layer and split patch up to have dts as a separate patch. Also cc dts maintainers since there is a new binding.
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