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Rockchip SoCs use 2 different numbering schemes. Where the gpio-
controllers just count 0-31 for their 32 gpios, the underlying
iomux controller splits these into 4 separate entities A-D.
Device-schematics always use these iomux-values to identify pins,
so to make mapping schematics to devicetree easier Andy Yan introduced
named constants for the pins but so far we only used them on new
additions.
Using a sed-script created by Emil Renner Berthing bulk-convert
the remaining raw gpio numbers into their descriptive counterparts
and also gets rid of the unhelpful RK_FUNC_x -> x and RK_GPIOx -> x
mappings:
/rockchip,pins *=/bcheck
b # to end of script
:append-next-line
N
:check
/^[^;]*$/bappend-next-line
s/<RK_GPIO\([0-9]\) /<\1 /g
s/<\([^ ][^ ]* *\)0 /<\1RK_PA0 /g
s/<\([^ ][^ ]* *\)1 /<\1RK_PA1 /g
s/<\([^ ][^ ]* *\)2 /<\1RK_PA2 /g
s/<\([^ ][^ ]* *\)3 /<\1RK_PA3 /g
s/<\([^ ][^ ]* *\)4 /<\1RK_PA4 /g
s/<\([^ ][^ ]* *\)5 /<\1RK_PA5 /g
s/<\([^ ][^ ]* *\)6 /<\1RK_PA6 /g
s/<\([^ ][^ ]* *\)7 /<\1RK_PA7 /g
s/<\([^ ][^ ]* *\)8 /<\1RK_PB0 /g
s/<\([^ ][^ ]* *\)9 /<\1RK_PB1 /g
s/<\([^ ][^ ]* *\)10 /<\1RK_PB2 /g
s/<\([^ ][^ ]* *\)11 /<\1RK_PB3 /g
s/<\([^ ][^ ]* *\)12 /<\1RK_PB4 /g
s/<\([^ ][^ ]* *\)13 /<\1RK_PB5 /g
s/<\([^ ][^ ]* *\)14 /<\1RK_PB6 /g
s/<\([^ ][^ ]* *\)15 /<\1RK_PB7 /g
s/<\([^ ][^ ]* *\)16 /<\1RK_PC0 /g
s/<\([^ ][^ ]* *\)17 /<\1RK_PC1 /g
s/<\([^ ][^ ]* *\)18 /<\1RK_PC2 /g
s/<\([^ ][^ ]* *\)19 /<\1RK_PC3 /g
s/<\([^ ][^ ]* *\)20 /<\1RK_PC4 /g
s/<\([^ ][^ ]* *\)21 /<\1RK_PC5 /g
s/<\([^ ][^ ]* *\)22 /<\1RK_PC6 /g
s/<\([^ ][^ ]* *\)23 /<\1RK_PC7 /g
s/<\([^ ][^ ]* *\)24 /<\1RK_PD0 /g
s/<\([^ ][^ ]* *\)25 /<\1RK_PD1 /g
s/<\([^ ][^ ]* *\)26 /<\1RK_PD2 /g
s/<\([^ ][^ ]* *\)27 /<\1RK_PD3 /g
s/<\([^ ][^ ]* *\)28 /<\1RK_PD4 /g
s/<\([^ ][^ ]* *\)29 /<\1RK_PD5 /g
s/<\([^ ][^ ]* *\)30 /<\1RK_PD6 /g
s/<\([^ ][^ ]* *\)31 /<\1RK_PD7 /g
s/<\([^ ][^ ]* *[^ ][^ ]* *\)0 /<\1RK_FUNC_GPIO /g
s/<\([^ ][^ ]* *[^ ][^ ]* *\)RK_FUNC_\([1-9]\) /<\1\2 /g
Suggested-by: Emil Renner Berthing <esmil@mailme.dk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The mmc.txt didn't explicitly say disable-wp is for SD card slot
only, but that is what it was designed for in the first place.
Remove all disable-wp from emmc or sdio controller.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Update all 32bit rockchip devicetree files to use SPDX-License-Identifiers.
All files except rk3288-veyron-analog-audio.dtsi (which is GPL 2.0 only)
claim to be GPL and X11 while the actual license text is MIT. Use the
MIT SPDX tag for them.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Brian Norris <briannorris@chromium.org>
Acked-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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In order to be able to use more than 4GB of RAM when the LPAE is
activated, the dts must be converted in 64 bits.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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We deprecated the "num-slots" property now and plan to get
rid of it finally. Just move a step to cleanup it from DT.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The MiQi board's green LED doesn't work at all with the mainline kernel.
There are multiple reasons to this. First, the gpio number is wrong, it
is declared on gpio220 (chip 7 pin 4) instead of gpio218 (chip 7 pin 2).
Second, a pinctrl is referenced, also declared with the same wrong value
while it is not unused. Third, the GPIO polarity was wrong (active low
instead of active high) with the default value set to "default-on",
resulting in the LED being turned off even when the GPIO is correct.
This patch fixes all these inconsistencies at once since these they are
related to each other, and also restores the "timer" trigger which is
the same as the one used by the kernels shipped with the board.
It's important to note that during the port to mainline, the led's label
was changed from "System" to "miqi:green:user", so scripts making use of
the name will still not work until they're fixed.
Fixes: b1a76f75d76e ("ARM: dts: rockchip: add MiQi board from mqmaker")
Signed-off-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Use macros to describe gpios will make the dts easier to
read and write.
All the modifications done with sed:
sed -i -e 's/ 0 GPIO_ACTIVE_/ RK_PA0 GPIO_ACTIVE_/' arch/arm/boot/dts/rk*
sed -i -e 's/ 1 GPIO_ACTIVE_/ RK_PA1 GPIO_ACTIVE_/' arch/arm/boot/dts/rk*
sed -i -e 's/ 2 GPIO_ACTIVE_/ RK_PA2 GPIO_ACTIVE_/' arch/arm/boot/dts/rk*
.......
.......
sed -i -e 's/ 30 GPIO_ACTIVE_/ RK_PD6 GPIO_ACTIVE_/' arch/arm/boot/dts/rk*
sed -i -e 's/ 31 GPIO_ACTIVE_/ RK_PD7 GPIO_ACTIVE_/' arch/arm/boot/dts/rk*
Tested with:
for i in dts-old/*dtb; do scripts/dtc/dtx_diff $i dts-new/$(basename $i); done
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
[also adapted the gpio interrupts]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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io-voltage control is actually part of the grf, so move the node under the
newly available grf simple-mfd.
To minimize duplicate code, the core node and compatible property
gets placed in the core rk3288.dtsi while the individual boards
now only need to enable it and add the necessary supply properties.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The MiQi is a rk3288-based devboard from Shenzen based mqmaker, with a
footprint the size of a credit card.
Main available outside connections are 4 usb ports, hdmi, gigabit
ethernet and two expansion headers.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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