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2018-03-22ARM: dts: r8a7793: Correct parent of SSI[0-9] clocksGeert Uytterhoeven1-2/+5
[ Upstream commit 1cd9028027c7a7c10b774df698c3cfafec6aa67d ] The SSI-ALL gate clock is located in between the P clock and the individual SSI[0-9] clocks, hence the former should be listed as their parent. Fixes: 072d326542e49187 ("ARM: dts: r8a7793: add MSTP10 clocks to device tree") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-03-22ARM: dts: r8a7793: Remove unit-address and reg from integrated cacheGeert Uytterhoeven1-2/+1
[ Upstream commit beffa8872a3680ef804eb0320ec77037170f4686 ] The Cortex-A15 cache controller is an integrated controller, and thus the device node representing it should not have a unit-addresses or reg property. Fixes: ad53f5f00b095a0d ("ARM: dts: r8a7793: Fix W=1 dtc warnings") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-06-29ARM: dts: r8a7793: Add APMU node and second CPU coreMagnus Damm1-0/+15
Add DT nodes for the Advanced Power Management Unit (APMU) and the second CPU core. Use the enable-method to point out that the APMU should be used for SMP support. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30ARM: dts: r8a7793: Fix W=1 dtc warningsGeert Uytterhoeven1-29/+30
Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@9 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property Move the cache-controller node under the cpus node, and make its unit name and reg property match the MPIDR values. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30ARM: dts: r8a7793: Reference both DMA controllersNiklas Söderlund1-52/+78
R-Car Gen2 have two DMA controllers, which are equivalent. Add references to both dmac0 and dmac1 so the driver can choose which one to use. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30ARM: dts: r8a7793: Add MMCIF0Ulrich Hecht1-0/+13
Same as on r8a7791. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-25Merge tag 'armsoc-late' of ↵Linus Torvalds1-51/+60
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late DT updates from Arnd Bergmann: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. The Renesas R-Car power domain handling, and the Nvidia Tegra USB support both hand notable changes that required changing the DT binding in a way that only provides compatibility with old DT blobs on new kernels but not vice versa. As a consequence, the DT changes are based on top of the driver changes and are now in this branch. For NXP i.MX and Samsung Exynos, the changes in here depend on other changes that got merged through the clk maintainer tree" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits) ARM: dts: exynos: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoC ARM: dts: exynos: Add NoC Probe dt node for Exynos542x SoC ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3 ARM: dts: exynos: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3 ARM: dts: exynos: Add support of bus frequency using VDD_INT for exynos3250-rinato ARM: dts: exynos: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250 ARM: dts: exynos: Add DMC bus frequency for exynos3250-rinato/monk ARM: dts: exynos: Add DMC bus node for Exynos3250 ARM: tegra: Enable XUSB on Nyan ARM: tegra: Enable XUSB on Jetson TK1 ARM: tegra: Enable XUSB on Venice2 ARM: tegra: Add Tegra124 XUSB controller ARM: tegra: Move Tegra124 to the new XUSB pad controller binding ARM: dts: r8a7794: Use SYSC "always-on" PM Domain ARM: dts: r8a7793: Use SYSC "always-on" PM Domain ...
2016-04-27ARM: dts: r8a7793: Use SYSC "always-on" PM DomainGeert Uytterhoeven1-51/+51
Hook up all devices that are part of the CPG/MSTP Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27ARM: dts: r8a7793: Add SYSC PM DomainsGeert Uytterhoeven1-0/+9
Add a device node for the System Controller. Hook up the first Cortex-A15 CPU core and the Cortex-A15 L2 cache/SCU to their respective PM Domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27ARM: dts: r8a7793: Don't disable referenced optional clocksGeert Uytterhoeven1-2/+0
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-25ARM: dts: r8a7793: Add SDHI controllersUlrich Hecht1-0/+33
Same as on r8a7791. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-20ARM: dts: r8a7793: add CAN nodes to device treeSimon Horman1-0/+22
Add CAN nodes to r8a7793 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-20ARM: dts: r8a7793: add CAN clocks to device treeSimon Horman1-4/+23
The R-Car CAN controllers can derive the CAN bus clock not only from their peripheral clock input (clkp1) but also from the other internal clock (clkp2) and external clock fed on CAN_CLK pin. Describe those clocks in the device tree along with the USB_EXTAL clock from which clkp2 is derived. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-03-28ARM: dts: r8a7793: Remove unnecessary clock-output-names propertiesSimon Horman1-31/+14
* Fixed rate and fixed factor clocks do not require an clock-output-names property. * Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names optional") Renesas div6 clocks do not require a clock-output-names property. In the above cases there is only one clock output and its name is taken from that of the clock node. Accordingly, remove the unnecessary clock-output-names properties and as necessary update the node names. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-19ARM: dts: r8a7793: Add L2 cache-controller nodeGeert Uytterhoeven1-0/+7
Add a device node for the L2 cache, and link the CPU node to it. The L2 cache for the Cortex-A15 CPU cores is 1 MiB large (organized as 64 KiB x 16 ways). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19ARM: dts: r8a7793: enable to use thermal-zoneKuninori Morimoto1-2/+24
This patch enables to use thermal-zone on r8a7793. This thermal sensor can measure temperature from -40000 to 125000, but over 117000 can be critical on this chip. Thus, default critical temperature is now set as 115000 (this driver is using 5000 steps) (Current critical temperature is using it as 90000, but there is no big reason about it) And it doesn't check thermal zone periodically (same as current behavior). You can exchange it by modifying polling-delay[-passive] property. You can set trip temp if your kernel has CONFIG_THERMAL_WRITABLE_TRIPS, but you need to take care to use it, since it will call orderly_poweroff() it it reaches to the value. echo $temp > /sys/class/thermal/thermal_zone0/trip_point_0_temp Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09ARM: dts: r8a7793: Add BRG support for SCIFGeert Uytterhoeven1-18/+36
Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09ARM: dts: r8a7793: Rename the serial port clock to fckLaurent Pinchart1-18/+18
The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09ARM: dts: r8a7793: Add SCIF fallback compatibility stringsGeert Uytterhoeven1-18/+36
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-29ARM: dts: r8a7793: enable audio DMAC in device treeSimon Horman1-12/+79
Enable audio DMAC (= rcar-dmac) in r8a7793 device tree. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- v4 * Use GIC_SPI in interrupts properties
2016-01-29ARM: dts: r8a7793: enable Audio DMAC peri peri via sound driverSimon Horman1-2/+3
Audio DMAC peri peri is no longer DMAEngine. it is supported by sound driver. this patch enable it. Base on work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-29ARM: dts: r8a7793: add audio DMAC to device treeSimon Horman1-0/+58
Instantiate the two Audio DMA controllers in the r8a7791 device tree. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-29ARM: dts: r8a7793: add audio DMAC clocks to device treeSimon Horman1-3/+4
Instantiate Audio DMA clocks in the r8a7791 device tree. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-29ARM: dts: r8a7793: add DVC support to device treeSimon Horman1-0/+6
Add DVC support to sound node in r8a7793 device tree. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-29ARM: dts: r8a7793: add R-Car sound support to device treeSimon Horman1-0/+83
Instantiate R-Car sound node in r8a7793 device tree. This only supports PIO transfers. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-29ARM: dts: r8a7793: add m2 clock to device treeSimon Horman1-0/+8
Declare m2 clock in r8a7793 device tree. Based on similar work for the r8a7791 by Laurent Pinchart. Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-29ARM: dts: r8a7793: add audio clock to device treeSimon Horman1-0/+23
Instantiate audio clock in r8a7793 device tree. audio_clk_a/b/c are required for R-Car sound. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-29ARM: dts: r8a7793: add MSTP10 clocks to device treeSimon Horman1-0/+36
Instantiate MSTP10 clocks in r8a7793 device tree. Based on similar work for the r8a7791 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-25ARM: dts: r8a7793: use GIC_* definesSimon Horman1-108/+108
Use GIC_* defines for GIC interrupt cells in r8a7793 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-01-25ARM: dts: r8a7793: move dmac nodesSimon Horman1-62/+62
Move dmac nodes in the r8a7793 device tree to match their location in the r8a7791 device tree to aid comparison between the device trees of these similar SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-25ARM: dts: r8a7793: Add I2C master nodes to DTLaurent Pinchart1-3/+132
Instantiate all the 9 I2C controllers in the disabled state. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-15ARM: shmobile: r8a7793: IPMMU compat string SoC part number updateMagnus Damm1-7/+7
Update IPMMU compat strings to include SoC part number. By specifying SoC part number in DT it becomes possible to implement SoC specific features in the IPMMU driver. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-11ARM: shmobile: r8a7793: Describe DMA for the serial portsSimon Horman1-0/+36
Add DMA properties to all SCIF, SCIFA, SCIFB, and HSCIF device nodes. Based on similar work for the r8a7791 by Geert Uytterhoeven. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-10ARM: shmobile: r8a7793: Add missing serial devices to DTSimon Horman1-2/+177
Instantiate all serial devices in r8a7793 device tree and set them as disabled by default. Based on similar work for the r8a7791 by Laurent Pinchart. Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-07ARM: shmobile: r8a7793: remove deprecated #gpio-range-cellsSimon Horman1-1/+0
Commit a1bc260bb5f5d9 ("gpio: clean up gpio-ranges documentation") declares the above property deprecated. That was more than 2 years ago. Remove it, so it doesn't get copied around needlessly. Based on similar work for the r8a7791 and r8a7794 by Wolfram Sang. Cc: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reported-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2015-11-25ARM: shmobile: r8a7793: Add DU node to device treeLaurent Pinchart1-0/+30
Add the DU device with a disabled state. Boards that want to enable the DU need to specify the output topology. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17ARM: shmobile: r8a7793: Use SoC specific binding for rcar-dmac nodesSimon Horman1-2/+2
Use the new SoC specific binding for rcar-dmac and the generic binding as a fall-back in the r8a7793 device tree. In general Renesas hardware is not documented to the extent where the relationship between IP blocks on different SoCs can be assumed although they may appear to operate the same way. Furthermore the documentation typically does not specify a version for individual IP blocks. For these reasons a convention of using the SoC name in place of a version and providing SoC-specific compat strings has been adopted. Although not universally liked this convention is used in the bindings for most drivers for Renesas hardware. The purpose of this patch is to update the Renesas R-Car DMA Controller nodes to follow this convention. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17ARM: shmobile: r8a7793: Add GPIO nodes to device treeMagnus Damm1-3/+118
Add r8a7793 GPIO device nodes that are assumed to be identical to r8a7791. This matches the data sheet for GPIO and MSTP bits. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-13ARM: shmobile: r8a7793: Add QSPI device to DTSimon Horman1-0/+26
Instantiate the QSPI controller in the r8a7793 device tree. Based on similar work for the r8a7794 by Hisashi Nakamura and Sergei Shtylyov. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-13ARM: shmobile: r8a7793: Add DMAC devices to DTSimon Horman1-0/+72
Instantiate the two system DMA controllers in the r8a7793 device tree. Based on similar work for the r8a7793 by Laurent Pinchart. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2015-11-10ARM: shmobile: r8a7793: Add PFC to DTSimon Horman1-0/+6
Instantiate PFC device in r8a7793 DT. Based on similar work for the r8a7791 by Magnus Damm. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-10ARM: shmobile: r8a7793: Add thermal device to DTSimon Horman1-0/+16
Instantiate the thermal sensor in the r8a7793 device tree. Based on very similar work for the r8a7790 by Magnus Damm. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-23ARM: shmobile: r8a7793: Add IPMMU nodesMagnus Damm1-0/+59
Add IPMMU nodes for the r8a7793 SoC. The IPMMU configuration for r8a7793 is identical to r8a7791 and includes SY0, SY1, DS, MP, MX, RT and GP. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock DomainGeert Uytterhoeven1-0/+7
Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: r8a7793 dtsi: Use "arm,gic-400" for GICGeert Uytterhoeven1-1/+1
Replace the "arm,cortex-a15-gic" compatible value for the GIC by "arm,gic-400", as the R-Car Gen2 GIC is assumed to be a GIC-400. This has been confirmed by reading the GICD_IIDR register (on r8a7791), which reports 0x0200043b (GIC-400 = 0x02, ARM = 0x43b). This has no effect on runtime behavior, as currently the GIC driver treats both compatible values the same. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-06ARM: shmobile: add r8a7793 minimal SoC device treeUlrich Hecht1-0/+367
Minimal r8a7793 device tree including one CPU core, interrupt controllers, timers, two serial ports, and the Ethernet controller, plus the required clock descriptions. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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