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2018-09-13ARM: dts: qcom: ipq4019: fix space vs tab indenting inside qcom-ipq4019.dtsiJohn Crispin1-38/+38
There are various places inside this dtsi file where 8 spaces where used for indenting instead of tabs. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13ARM: dts: qcom: ipq4019: fix PCI rangeMathias Kresin1-1/+1
The PCI range is invalid and PCI attached devices doen't work. Signed-off-by: Mathias Kresin <dev@kresin.me> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13ARM: dts: qcom: ipq4019: fix cpu0's qcom,saw2 reg valueChristian Lamparter1-1/+1
while compiling an ipq4019 target, dtc will complain: regulator@b089000 unit address format error, expected "2089000" The saw0 regulator reg value seems to be copied and pasted from qcom-ipq8064.dtsi. This patch fixes the reg value to match that of the unit address which in turn silences the warning. (There is no driver for qcom,saw2 right now. So this went unnoticed) Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13ARM: dts: qcom: ipq4019: add cpu operating points for cpufreq supportMatthew McClintock1-28/+26
This adds some operating points for cpu frequeny scaling Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13ARM: dts: qcom: ipq4019: use v2 of the kpss bringup mechanismMatthew McClintock1-8/+17
v1 was the incorrect choice here and sometimes the board would not come up properly. Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-22ARM: dts: qcom: Add missing OPP properties for CPUsViresh Kumar1-0/+24
The OPP properties, like "operating-points", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can create an OPP table. Add such missing properties. Fix other missing property (clock latency) as well to make it all work. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsiSricharan R1-1/+1
Add the common parts for the dk04 boards. Reviewed-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25ARM: dts: ipq4019: Change the max opp frequencySricharan R1-1/+1
The max opp frequency is 716MHZ. So update that. Reviewed-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25ARM: dts: ipq4019: Add a few peripheral nodesSricharan R1-11/+145
Now with the driver updates for some peripherals being there, add i2c, spi, pcie, bam, qpic-nand, scm nodes to enhance the available peripheral support. Reviewed-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-25ARM: dts: ipq4019: Add a default chosen nodeSricharan R1-1/+1
Add a 'chosen' node to select the serial console. This is needed when bootloaders do not pass the 'console=' bootargs. Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-05-14ARM: dts: ipq4019: Add TZ and SMEM reserved regionsSven Eckelmann1-0/+16
The QSEE (trustzone) is started on IPQ4019 before Linux is started. According to QCA, it is placed in in the the memory region 0x87e80000-0x88000000 and must not be accessed directly. There is an additional memory region 0x87e00000-0x87E80000 smem which which can be used for communication with the TZ. The driver for the latter is not yet ready but it is still not allowed to use this memory region like any other memory region. Not reserving this memory region either leads to kernel crashes, kernel hangs (often during the boot) or bus errors for userspace programs. The latter happens when a program is using a memory region which is mapped to these physical memory regions. [ 571.758058] Unhandled fault: imprecise external abort (0xc06) at 0x01715ff8 [ 571.758099] pgd = cebec000 [ 571.763826] [01715ff8] *pgd=8e7fa835, *pte=87e7f75f, *ppte=87e7fc7f Bus error Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08ARM: dts: qcom: add and enable both wifi blocks on the IPQ4019Christian Lamparter1-0/+84
This patch adds and enables the device-tree definitions for both qcom,ipq4019-wifi blocks for the IPQ4019. Support for these have been added into the ath10k driver since: commit 280e762e9c72 ("ath10k: enable ipq4019 device probe in ahb module") The binding documentation was added in: commit a47aaa69de88 ("dt: bindings: add new dt entry for pre calibration in qcom, ath10k.txt") This has been tested on an ASUS RT-AC58U (IPQ4019), an AVM Fritz!Box 4040 (IPQ4018), a Compex WPJ428 (IPQ4028) and a Cisco Meraki MR33 (IPQ4029). | a000000.wifi: qca4019 hw1.0 target 0x01000000 chip_id 0x003b00ff [...] | a000000.wifi: kconfig debug 0 debugfs 1 tracing 0 dfs 1 testmode 1 | a000000.wifi: firmware ver 10.4-3.4-00082 api 5 features no-p2p,mfp,[...] | a000000.wifi: board_file api 2 bmi_id 0:16 crc32 5773b188 | a000000.wifi: htt-ver 2.2 wmi-op 6 htt-op 4 cal pre-cal-file [...] ... | a800000.wifi: qca4019 hw1.0 target 0x01000000 chip_id 0x003b00ff sub 0000:0000 | a800000.wifi: kconfig debug 0 debugfs 1 tracing 0 dfs 1 testmode 1 | a800000.wifi: firmware ver 10.4-3.4-00082 api 5 features no-p2p, [...] | a800000.wifi: board_file api 2 bmi_id 0:17 crc32 5773b188 | a800000.wifi: htt-ver 2.2 wmi-op 6 htt-op 4 cal pre-cal-file [...] Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08ARM: dts: qcom: add pseudo random number generator on the IPQ4019Christian Lamparter1-0/+8
This architecture has a pseudo random number generator supported by the existing "qcom,prng" binding. rngtest: bits received from input: 5795960032 rngtest: FIPS 140-2 successes: 289591 rngtest: FIPS 140-2 failures: 207 rngtest: FIPS 140-2(2001-10-10) Monobit: 25 rngtest: FIPS 140-2(2001-10-10) Poker: 28 rngtest: FIPS 140-2(2001-10-10) Runs: 91 rngtest: FIPS 140-2(2001-10-10) Long run: 67 rngtest: FIPS 140-2(2001-10-10) Continuous run: 0 rngtest: input channel speed: (min=244; avg=46122; max=3906250)Kibits/s rngtest: FIPS tests speed: (min=1.327; avg=20.966; max=26.345)Mibits/s rngtest: Program run time: 386965827 microseconds Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08ARM: dts: ipq4019: Move xo and timer nodes to SoC dtsiVaradarajan Narayanan1-0/+15
The node for xo and timer belong to the SoC DTS file. Else, new board DT files may not inherit these nodes. Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08ARM: dts: ipq4019: Fix pinctrl node nameVaradarajan Narayanan1-1/+1
This patch fixes the pinctrl node addresses to be the correct format. Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-06ARM: dts: qcom: ipq4019: fix i2c_0 nodeChristian Lamparter1-2/+2
This patch fixes two typos in the i2c_0 node for the ipq4019. The reg property length is just 0x600. The core clock is GCC_BLSP1_QUP1_I2C_APPS_CLK. GCC_BLSP1_QUP2_I2C_APPS_CLK is used by the second i2c. Fixes: e76b4284b520ba3 ("qcom: ipq4019: add i2c node to ipq4019 SoC and DK01 device tree") Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-08-02Merge tag 'armsoc-dt' of ↵Linus Torvalds1-0/+6
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "Device tree contents continue to be the largest branches we submit. This time around, some of the contents worth pointing out is: New SoC platforms: - Freescale i.MX 7Solo - Broadcom BCM23550 - Cirrus Logic EP7209 and EP7211 (clps711x platforms)_ - Hisilicon HI3519 - Renesas R8A7792 Some of the other delta that is sticking out, line-count wise: - Exynos moves of IP blocks under an SoC bus, which causes a large delta due to indentation changes - a new Tegra K1 board: Apalis - a bunch of small updates to many Allwinner platforms; new hardware support, some cleanup, etc" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (426 commits) ARM: dts: sun8i: Add dts file for inet86dz board ARM: dts: sun8i: Add dts file for Polaroid MID2407PXE03 tablet ARM: dts: sun8i: Use sun8i-reference-design-tablet for ga10h dts ARM: dts: sun8i: Use sun8i-reference-design-tablet for polaroid mid2809pxe04 ARM: dts: sun8i: reference-design-tablet: Add drivevbus-supply ARM: dts: Copy sun8i-q8-common.dtsi sun8i-reference-design-tablet.dtsi ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for utoo p66 dts ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for dit4350 dts ARM: dts: sun5i: reference-design-tablet: Remove mention of q8 ARM: dts: sun5i: reference-design-tablet: Set lradc vref to avcc ARM: dts: sun5i: Rename sun5i-q8-common.dtsi sun5i-reference-design-tablet.dtsi ARM: dts: sun5i: Move q8 display bits to sun5i-a13-q8-tablet.dts ARM: dts: sunxi: Rename sunxi-q8-common.dtsi sunxi-reference-design-tablet.dtsi ARM: dts: at91: Don't build unnecessary dtbs ARM: dts: at91: sama5d3x: separate motherboard gmac and emac definitions ARM: dts: at91: at91sam9g25ek: fix isi endpoint node ARM: dts: at91: move isi definition to at91sam9g25ek ARM: dts: at91: fix i2c-gpio node name ARM: dts: at91: vinco: fix regulator name ARM: dts: at91: ariag25 : fix onewire node ...
2016-07-17watchdog: qcom: add option for standalone watchdog not in timer blockMatthew McClintock1-1/+1
Commit 0dfd582e026a ("watchdog: qcom: use timer devicetree binding") moved to use the watchdog as a subset timer register block. Some devices have the watchdog completely standalone with slightly different register offsets as well so let's account for the differences here. The existing "kpss-standalone" compatible string doesn't make it entirely clear exactly what the device is so rename to "kpss-wdt" to reflect watchdog timer functionality. Also update ipq4019 DTS with an SoC specific compatible. Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Thomas Pedersen <twp@codeaurora.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2016-06-28dts: ipq4019: support ARMv7 PMUtwp@codeaurora.org1-0/+6
Add support for cortex-a7-pmu present on ipq4019 SoCs. Signed-off-by: Thomas Pedersen <twp@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-04-20qcom: ipq4019: add DMA nodes to ipq4019 SoC and DK01 device treeMatthew McClintock1-0/+15
This adds the blsp_dma node to the device tree and the required properties for using DMA with serial Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-04-20qcom: ipq4019: add crypto nodes to ipq4019 SoC and DK01 device treeMatthew McClintock1-0/+25
This adds the crypto nodes to the ipq4019 device tree, it also adds the BAM node used by crypto as well which the driver currently requires to operate properly The crypto driver itself depends on some other patches to qcom_bam_dma to function properly: https://lkml.org/lkml/2015/12/1/113 CC: Stanimir Varbanov <svarbanov@mm-sol.com> Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-04-20qcom: ipq4019: add cpu operating points for cpufreq supportMatthew McClintock1-0/+8
This adds some operating points for cpu frequeny scaling Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-04-20qcom: ipq4019: add i2c node to ipq4019 SoC and DK01 device treeMatthew McClintock1-0/+13
This will allow boards to enable the I2C bus CC: Sricharan R <srichara@qti.qualcomm.com> Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-04-20qcom: ipq4019: add spi node to ipq4019 SoC and DK01 device treeMatthew McClintock1-0/+18
This will allow boards to enable the SPI bus Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-04-20qcom: ipq4019: add support for reset via qcom,ps-holdMatthew McClintock1-0/+5
This will allow these types of boards to be rebooted. Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-04-20qcom: ipq4019: add watchdog node to ipq4019 SoC and DK01 device treeMatthew McClintock1-0/+8
This will allow boards to enable watchdog support Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-04-20qcom: ipq4019: add acc and saw nodes to bring up secondary coresMatthew McClintock1-0/+60
This adds the required device tree nodes to bring up the secondary cores on the ipq4019 SoC. Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2016-04-20qcom: ipq4019: Add basic board/dts support for IPQ4019 SoCMatthew McClintock1-0/+115
Add initial dts files and SoC support for IPQ4019 Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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