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2016-09-06ARM: dts: lpc18xx: remove skeleton.dtsi include and fix unit address warningsJoachim Eastwood1-1/+3
Removale of skeleton.dtsi allows us also to fix the following warning from the dts compiler: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name by adding proper unit addresses to the memory nodes. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
2016-09-06ARM: dts: armv7-m: remove skeleton.dtsi includeJoachim Eastwood1-0/+1
Remove skeleton.dtsi from the common ARM Cortex-M dtsi. This will allow us to remove skeleton.dtsi on a per platform basis and get rid of the unit address warning on the memory nodes without getting duplicate memory nodes. See 3ebee5a2e141 ("arm64: dts: kill skeleton.dtsi") for additional reasons not to use the skeleton.dtsi. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Vladimir Murzin <vladimir.murzin@arm.com> Acked-by: Stefan Agner <stefan@agner.ch> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
2016-08-27ARM: dts: lpc18xx: configure dwmac properlyJoachim Eastwood1-0/+4
Configure the DWMAC FIFO sizes, burst length and threshold DMA mode on LPC18xx/43xx SoCs. These parameters are needed for correct operation of the Ethernet MAC. The DWMAC on LPC18xx/43xx does not support RSF DMA mode and therefore must use threshold mode. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2016-04-04ARM: dts: lpc18xx: remove unit addresses from creg childsJoachim Eastwood1-2/+2
DT nodes without reg properties should not have a unit address. This fixes the following warnings from dtc. Warning (unit_address_vs_reg): Node /soc/syscon@40043000/phy@004 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/syscon@40043000/dma-mux@11c has a unit name, but no reg property Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2016-03-29ARM: dts: lpc18xx: add dac nodeJoachim Eastwood1-0/+9
Add node for the 10-bit DAC found on all lpc18xx SoCs. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2016-03-29ARM: dts: lpc18xx: add adc nodesJoachim Eastwood1-0/+18
Add nodes for the two 10-bit ADCs found on all lpc18xx SoCs. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2016-03-29ARM: dts: lpc18xx: add rtc nodeJoachim Eastwood1-0/+8
Add node for the internal RTC found on all lpc18xx SoCs. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2016-03-29ARM: dts: lpc18xx: add creg-clk nodeJoachim Eastwood1-1/+7
Add node for the creg clock controller and change the input clock on cgu to use it. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-12-15ARM: dts: lpc18xx: add EEPROM memory nodeAriel D'Alessandro1-0/+11
Add node for the NXP LPC18xx EEPROM memory which can be found in NXP LPC185x/3x and LPC435x/3x/2x/1x devices. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-09-30ARM: dts: lpc18xx: add resets entry to device nodesJoachim Eastwood1-0/+20
Most of the peripherals on LPC18xx/43xx devices have their reset lines hooked up to internal reset controller (RGU). Add reset entries to the device nodes so a driver can use the reset line. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-09-30ARM: dts: lpc18xx: add sct pwm nodeAriel D'Alessandro1-0/+10
NXP LPC SoCs family, which includes LPC18xx/LPC43xx, provides a State Configurable Timer (SCT) which can be configured as a Pulse Width Modulator. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-09-30ARM: dts: lpc18xx: add watchdog nodeAriel D'Alessandro1-0/+8
Add node for the watchdog timer found on LPC18xx/LPC43xx. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-09-30ARM: dts: lpc18xx: add i2c nodesJoachim Eastwood1-0/+22
Add NXP LPC1778 I2C controller nodes to the dtsi for all lpc18xx/43xx devices. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-09-30ARM: dts: lpc18xx: add dma to uart0/1/2/3Joachim Eastwood1-0/+16
Add dmas entries to the four UART peripherals on LPC18xx/43xx devices so that DMA can be used to transfer data. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-09-30ARM: dts: lpc18xx: add dma to ssp0/1Joachim Eastwood1-0/+13
Add dmas entries to the two SSP peripherals on LPC18xx/43xx devices so that DMA can be used to transfer data. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-09-28ARM: dts: lpc18xx: add dmamux nodeJoachim Eastwood1-0/+7
Add node for the DMA multiplexer placed in front of the PL080 DMA controller on lpc18xx/43xx devices. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-09-28ARM: dts: lpc18xx: add dmac nodeJoachim Eastwood1-0/+19
Add the ARM PL080 DMA controller node to the dtsi for all lpc18xx/43xx devices. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-09-28ARM: dts: lpc18xx: add spifi nodeJoachim Eastwood1-0/+11
Add the NXP LPC1773 SPIFI (SPI Flash Interface) flash controller node to the dtsi for all lpc18xx/43xx devices. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-09-28ARM: dts: lpc18xx: add rgu nodeJoachim Eastwood1-0/+8
Add the NXP LPC1850 RGU (Reset Generation Unit) reset controller node to the dtsi for all lpc18xx/43xx devices. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-08-05ARM: dts: lpc18xx: add pl172 memory-controller nodeJoachim Eastwood1-0/+14
All devices in the LPC18xx/43xx familiy contain a ARM PL172 MultiPort Memory Controller (MPMC). Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05ARM: dts: lpc18xx: add pl111 lcd controller nodeJoachim Eastwood1-0/+10
NXP LPC185x and LPC435x/70 devices contain a ARM PL111 lcd controller. Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05ARM: dts: lpc18xx: add usb otg phy nodeJoachim Eastwood1-0/+8
Add the USB OTG phy under the CREG syscon node and attach it to the USB0 EHCI controller. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-12ARM: dts: lpc18xx: add usb nodesJoachim Eastwood1-0/+17
Add nodes for the two USB EHCI controllers found on lpc18xx. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-07-12ARM: dts: lpc18xx: add ethernet nodeJoachim Eastwood1-0/+10
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-07-12ARM: dts: lpc18xx: add creg (syscon) nodeJoachim Eastwood1-0/+6
The CREG block contains a collection of miscellaneous configuration register like Ethernet phy mode, low power clocks and DMA multiplexer. These registers needs to be accessed from other drivers and syscon provides this capability. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-07-12ARM: dts: lpc18xx: add mmcsd nodeJoachim Eastwood1-0/+10
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-07-12ARM: dts: lpc18xx: add can nodesJoachim Eastwood1-0/+16
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-07-12ARM: dts: lpc18xx: add ssp nodesJoachim Eastwood1-0/+22
Add nodes for the ARM SSP controllers on lpc18xx. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-07-12ARM: dts: lpc18xx: add gpio nodeJoachim Eastwood1-0/+51
Add gpio and mapping between pinctrl/gpio namespace with gpio-ranges property. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-12ARM: dts: lpc18xx: add pinctrl nodeJoachim Eastwood1-0/+6
Add pinctrl node for lpc1850-scu. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-07-11ARM: dts: lpc18xx: add uart new compat string and clk namesJoachim Eastwood1-4/+8
Add lpc1850-uart compatible string on uarts together with proper clock-names. Signed-off-by: Joachim Eastwood <manabian@gmail.com>
2015-07-11ARM: dts: lpc18xx: add cgu and ccu clock-controller nodesJoachim Eastwood1-14/+71
Add CGU and CCU clock-controller nodes for lpc18xx together with the fixed input clocks. Also remove the temporary fixed-factor pll1 clock from both lpc18xx and lpc4350-hitex-eval DTS now that proper clock drivers are inplace. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Acked-by: Michael Turquette <mturquette@baylibre.com>
2015-05-15ARM: dts: Add base DT for NXP LPC18xxJoachim Eastwood1-0/+114
NXP LPC18xx/43xx SoCs are very similar devices and should be able to share a common base (lpc18xx.dtsi). Diffences between the devices are put in a dtsi which is specific to that device. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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