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path: root/arch/arm/boot/dts/intel-ixp42x.dtsi
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2021-08-09ARM: dts: ixp4xx: Use the expansion busLinus Walleij1-0/+5
Replace the "simple-bus" simplification by the proper bus for IXP4xx memory or device expansion. Use chip-select addressing with two address cells on all the flashes mounted on the IXP4xx devices. This includes all flash chips. Change the unit-name from @50000000 to @c4000000 as the DTS validation screams. The registers for controlling the bus are at c4000000 but the actual memory windows and ranges are at 50000000. Well it is just syntax, we can live with it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-05-11ARM: dts: ixp4xx: Add PCI hostsLinus Walleij1-0/+4
This adds a basic PCI host definition to the base device tree for IXP4xx and then further details it in the 42x and 43x device tree include, also the specific target devices NSLU2 and GW2358 get proper PCI swizzling defined. Cc: Zoltan HERPAI <wigyori@uid0.hu> Cc: Raylynn Knight <rayknight@me.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-23ARM: dts: Add some initial IXP4xx device treesLinus Walleij1-0/+25
This adds a device tree for the IXP4xx-based Linksys NSLU2 and Gateworks GW2358 which encompass the Gateworks Cambria family. These will be the first IXP4xx device tree platforms. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>