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AgeCommit message (Expand)AuthorFilesLines
2013-09-27ARC: Workaround spinlock livelock in SMP SystemC simulationVineet Gupta1-1/+8
2013-09-27ARC: Fix 32-bit wrap around in access_ok()Vineet Gupta1-2/+2
2013-09-12ARC: SMP failed to boot due to missing IVT setupNoam Camus1-1/+0
2013-09-05ARC: fix new Section mismatches in build (post __cpuinit cleanup)Vineet Gupta2-2/+2
2013-09-05ARC: Fix __udelay calculationMischa Jonker1-3/+2
2013-09-05ARC: Add read*_relaxed to asm/io.hMischa Jonker1-0/+4
2013-08-30ARC: [ASID] Track ASID allocation cycles/generationsVineet Gupta2-70/+29
2013-08-30ARC: [ASID] activate_mm() == switch_mm()Vineet Gupta1-11/+9
2013-08-30ARC: [ASID] get_new_mmu_context() to conditionally allocate new ASIDVineet Gupta1-27/+18
2013-08-30ARC: [ASID] Refactor the TLB paranoid debug codeVineet Gupta1-1/+1
2013-08-30ARC: [ASID] Remove legacy/unused debug codeVineet Gupta2-14/+0
2013-08-30ARC: MMUv4 preps/3 - Abstract out TLB Insert/DeleteVineet Gupta1-0/+2
2013-08-30ARC: MMUv4 preps/2 - Reshuffle PTE bitsVineet Gupta1-14/+8
2013-08-29ARC: MMUv4 preps/1 - Fold PTE K/U access flagsVineet Gupta1-25/+14
2013-08-29ARC: Code cosmetics (Nothing semantical)Vineet Gupta2-32/+10
2013-08-26ARC: Entry Handler tweaks: Optimize away redundant IRQ_DISABLE_SAVEVineet Gupta1-7/+0
2013-08-26ARC: Exception Handlers Code consolidationVineet Gupta1-1/+23
2013-07-27ARC: SMP build breakageVineet Gupta1-0/+1
2013-07-03Merge tag 'arc-v3.11-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds20-592/+363
2013-06-29consolidate io_remap_pfn_range definitionsAl Viro1-3/+0
2013-06-27arc: delete __cpuinit usage from all arc filesPaul Gortmaker1-1/+1
2013-06-26ARC: Remove explicit passing around of ECRVineet Gupta5-12/+8
2013-06-26ARC: pt_regs update #5: Use real ECR for pt_regs->event vs. synth valuesVineet Gupta3-38/+33
2013-06-22ARC: stop using pt_regs->orig_r8Vineet Gupta3-16/+4
2013-06-22ARC: pt_regs update #4: r25 saved/restored unconditionallyVineet Gupta3-26/+22
2013-06-22ARC: K/U SP saved from one location in stack switching macroVineet Gupta1-4/+4
2013-06-22ARC: Entry Handler tweaks: Avoid hardcoded LIMMS for ECR valuesVineet Gupta1-0/+5
2013-06-22ARC: Increase readability of entry handlersVineet Gupta1-212/+182
2013-06-22ARC: pt_regs update #3: Remove unused gutter at start of callee_regsVineet Gupta4-16/+12
2013-06-22ARC: pt_regs update #2: Remove unused gutter at start of pt_regsVineet Gupta3-26/+7
2013-06-22ARC: pt_regs update #1: Align pt_regs end with end of kernel stack pageVineet Gupta3-3/+3
2013-06-22ARC: pt_regs update #0: remove kernel stack canaryVineet Gupta1-18/+0
2013-06-22ARC: [mm] Make stack/heap Non-executable by defaultVineet Gupta1-6/+1
2013-06-22ARC: [mm] Assume pagecache page dirty by defaultVineet Gupta1-0/+7
2013-06-22ARC: cache detection code bitrotVineet Gupta3-16/+3
2013-06-22ARC: Disintegrate arcregs.hVineet Gupta7-153/+71
2013-06-22ARC: Use kconfig helper IS_ENABLED() to get rid of defines.hVineet Gupta4-58/+13
2013-05-25ARC: lazy dcache flush broke gdb in non-aliasing configsVineet Gupta1-9/+0
2013-05-23ARC: Use enough bits for determining page's cache colorVineet Gupta1-1/+1
2013-05-23ARC: Brown paper bag bug in macro for checking cache colorVineet Gupta1-1/+3
2013-05-23ARC: copy_(to|from)_user() to honor usermode-access permissionsVineet Gupta2-12/+16
2013-05-09ARC: [mm] Aliasing VIPT dcache support 4/4Vineet Gupta5-4/+22
2013-05-09ARC: [mm] Aliasing VIPT dcache support 3/4Vineet Gupta1-1/+3
2013-05-09ARC: [mm] Aliasing VIPT dcache support 2/4Vineet Gupta3-11/+69
2013-05-09ARC: [mm] Aliasing VIPT dcache support 1/4Vineet Gupta1-1/+1
2013-05-07ARC: [mm] Lazy D-cache flush (non aliasing VIPT)Vineet Gupta1-0/+1
2013-05-07ARC: [mm] consolidate icache/dcache sync codeVineet Gupta1-3/+2
2013-05-07ARC: [mm] optimise icache flush for user mappingsVineet Gupta1-1/+9
2013-05-07ARC: [mm] optimize needless full mm TLB flush on munmapVineet Gupta1-4/+12
2013-05-07ARC: [TB10x] Add support for TB10x platformChristian Ruppert1-0/+10
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