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path: root/arch/arc/include/asm/cache.h
AgeCommit message (Expand)AuthorFilesLines
2019-02-21ARC: define ARCH_SLAB_MINALIGN = 8Alexey Brodkin1-0/+11
2018-11-12ARC: IOC: panic if kernel was started with previously enabled IOCEugeniy Paltsev1-0/+2
2018-07-27ARC: dma [non-IOC] setup SMP_CACHE_BYTES and cache_line_sizeEugeniy Paltsev1-1/+3
2017-08-30ARCv2: SLC: provide a line based flush routine for debuggingVineet Gupta1-0/+2
2017-08-30ARC: Hardcode ARCH_DMA_MINALIGN to max line length we may haveAlexey Brodkin1-1/+2
2017-08-04ARCv2: PAE40: Explicitly set MSB counterpart of SLC region ops addressesAlexey Brodkin1-0/+2
2017-05-03ARCv2: mm: micro-optimize region flush generated codeVineet Gupta1-1/+1
2017-05-03ARCv2: mm: Implement cache region flush operationsVineet Gupta1-0/+6
2017-01-19ARCv2: IOC: Adhere to progamming model guidelines to avoid DMA corruptionVineet Gupta1-3/+4
2017-01-19ARCv2: IOC: refactor the IOC and SLC operations into own functionsVineet Gupta1-1/+1
2016-10-24ARCv2: IOC: use @ioc_enable not @ioc_exist where intendedVineet Gupta1-1/+1
2016-10-01ARCv2: Support dynamic peripheral address space in HS38 rel 3.0 coresVineet Gupta1-1/+1
2016-03-19ARCv2: ioremap: Support dynamic peripheral address spaceVineet Gupta1-0/+1
2015-12-21ARC: mm: fix building for MMU v2Alexey Brodkin1-2/+0
2015-10-29ARC: mm: PAE40 supportVineet Gupta1-0/+2
2015-08-20ARCv2: Support IO Coherency and permutations involving L1 and L2 cachesAlexey Brodkin1-0/+8
2015-06-25ARCv2: SLC: Handle explcit flush for DMA ops (w/o IO-coherency)Vineet Gupta1-0/+11
2015-06-22ARCv2: MMUv4: support aliasing icache configVineet Gupta1-3/+1
2015-06-22ARCv2: MMUv4: cache programming model changesVineet Gupta1-0/+3
2014-10-13ARC: Update comments about uncached address spaceVineet Gupta1-1/+1
2014-06-16ARC: remove checks for CONFIG_ARC_MMU_V4Paul Bolle1-2/+2
2014-06-03ARC: Disable caches in early boot if so configuredVineet Gupta1-0/+27
2013-11-06ARC: cacheflush refactor #2: I and D caches lines to have same sizeVineet Gupta1-7/+1
2013-09-05ARC: fix new Section mismatches in build (post __cpuinit cleanup)Vineet Gupta1-1/+1
2013-06-22ARC: cache detection code bitrotVineet Gupta1-10/+1
2013-06-22ARC: Disintegrate arcregs.hVineet Gupta1-10/+9
2013-06-22ARC: Use kconfig helper IS_ENABLED() to get rid of defines.hVineet Gupta1-0/+2
2013-05-09ARC: [mm] Aliasing VIPT dcache support 4/4Vineet Gupta1-3/+0
2013-02-15ARC: Cache Flush ManagementVineet Gupta1-0/+54
2013-02-11ARC: Fundamental ARCH data-types/definesVineet Gupta1-0/+21
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