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path: root/arch/arc/include/asm/arcregs.h
AgeCommit message (Expand)AuthorFilesLines
2015-06-22ARCv2: MMUv4: cache programming model changesVineet Gupta1-2/+3
2015-06-22ARCv2: MMUv4: TLB programming Model changesVineet Gupta1-1/+1
2015-06-22ARCv2: Support for ARCv2 ISA and HS38x coresVineet Gupta1-4/+49
2015-06-22ARCv2: [intc] HS38 core interrupt controllerVineet Gupta1-0/+1
2015-06-22ARC: uncached base is hard constant for ARC, don't save itVineet Gupta1-1/+0
2015-06-19ARC: entry.S: Introduce INTERRUPT_{PROLOGUE,EPILOGUE}Vineet Gupta1-3/+0
2015-06-19ARC: compress cpuinfo_arc_mmu (mainly save page size in KB)Vineet Gupta1-1/+2
2015-04-13ARC: Fix RTT boot printingVineet Gupta1-0/+1
2015-04-13ARC: cosmetic: Remove unused ECR bitfield masksVineet Gupta1-6/+3
2015-04-13ARC: Fix WRITE_BCRVineet Gupta1-2/+2
2014-10-13ARC: boot: cpu feature print enhancementsVineet Gupta1-24/+53
2014-10-13ARC: unbork FPU save/restoreVineet Gupta1-8/+0
2014-10-13ARC: remove extraneous __KERNEL__ guardsVineet Gupta1-4/+0
2014-07-23ARC: cache boot reporting updatesVineet Gupta1-1/+1
2013-06-26ARC: pt_regs update #5: Use real ECR for pt_regs->event vs. synth valuesVineet Gupta1-0/+4
2013-06-22ARC: Entry Handler tweaks: Avoid hardcoded LIMMS for ECR valuesVineet Gupta1-0/+5
2013-06-22ARC: cache detection code bitrotVineet Gupta1-1/+1
2013-06-22ARC: Disintegrate arcregs.hVineet Gupta1-116/+0
2013-02-15ARC: Boot #2: Verbose Boot reporting / feature verificationVineet Gupta1-10/+112
2013-02-15ARC: Boot #1: low-level, setup_arch(), /proc/cpuinfo, mem initVineet Gupta1-0/+5
2013-02-15ARC: MMU Exception HandlingVineet Gupta1-0/+91
2013-02-15ARC: MMU Context ManagementVineet Gupta1-0/+7
2013-02-15ARC: Cache Flush ManagementVineet Gupta1-0/+80
2013-02-11ARC: Timers/counters/delay managementVineet Gupta1-0/+11
2013-02-11ARC: Process-creation/scheduling/idle-loopVineet Gupta1-0/+20
2013-02-11ARC: Interrupt HandlingVineet Gupta1-0/+3
2013-02-11ARC: irqflags - Interrupt enabling/disabling at in-core intcVineet Gupta1-0/+114
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