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path: root/arch/arc/boot
AgeCommit message (Expand)AuthorFilesLines
2016-05-30arc: Get rid of root core-frequency propertyAlexey Brodkin15-17/+0
2016-05-23Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds4-2/+109
2016-05-19Merge tag 'dmaengine-4.7-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds1-1/+1
2016-05-18arc: axs103_smp: Fix CPU frequency to 100MHz for dual-coreAlexey Brodkin1-1/+1
2016-05-16Merge branch 'topic-arcpgu-updates' of https://github.com/foss-for-synopsys-d...Dave Airlie4-3/+49
2016-05-13arc: axs10x: Add DT bindings for I2S PLL ClockJose Abreu1-0/+13
2016-05-09ARC: [plat-eznps] Add eznps board defconfig and dtsNoam Camus1-0/+96
2016-05-09ARC: [dts] Introduce Timer bindingsVineet Gupta4-0/+62
2016-05-09ARC: [dts] Add clk feeding into timers to DTsVineet Gupta11-0/+66
2016-05-09ARC: [dts] Rename cpu_intc -> core_intcVineet Gupta7-19/+19
2016-05-09ARCv2: [dts]: Introduce HS38 specific include DTS ...Vineet Gupta11-4/+78
2016-05-09Merge tag 'v4.6-rc7' into drm-nextDave Airlie1-8/+0
2016-05-02dmaengine: dw: revisit data_width propertyAndy Shevchenko1-1/+1
2016-04-29ARC: [axs10x] Specify reserved memory for frame bufferAlexey Brodkin4-3/+49
2016-04-26arc: axs10x - add support of ARC PGUAlexey Brodkin1-0/+61
2016-04-07Revert "ARC: [plat-axs10x] add Ethernet PHY description in .dts"Vineet Gupta1-8/+0
2016-03-17ARC: [plat-axs10x] add Ethernet PHY description in .dtsAlexey Brodkin1-0/+8
2016-03-15arc: [plat-nsimosci*] use ezchip network driverLada Trimasova3-9/+6
2016-03-12ARC: [plat-nsim] document rangesVineet Gupta1-1/+2
2015-12-17ARC: [plat-sim] unbork non default CONFIG_LINUX_LINK_BASEVineet Gupta1-1/+2
2015-12-07ARC: [axs10x] cap ethernet phy to 100 Mbit/secAlexey Brodkin1-0/+1
2015-11-06Merge tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds1-2/+4
2015-10-28ARC: mm: HIGHMEM: populate high memory from DTVineet Gupta1-2/+10
2015-10-28ARC: Ensure DT mem base is same as what kernel is built withVineet Gupta6-6/+6
2015-10-28arc: enable building of all dtbsRob Herring1-0/+2
2015-10-28arc: use common make variables for dtb buildsRob Herring1-2/+2
2015-08-20ARC: add/fix some comments in code - no functional changeVineet Gupta1-6/+7
2015-07-09ARCv2: [axs103] bump CPU frequency from 75 to 90 MHZAlexey Brodkin2-2/+2
2015-06-25ARCv2: [vdk] dts files and defconfig for HS38 VDKRuud Derwig5-0/+272
2015-06-25ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x coresVineet Gupta4-0/+276
2015-06-25ARC: [axs101] Prepare for AXS103Alexey Brodkin2-17/+21
2015-06-25ARCv2: [nsim*hs*] Support simulation platforms for HS38x coresVineet Gupta4-0/+306
2015-06-19ARC: [axs101] STAR 9000799830: Fix SD cards supportAlexey Brodkin1-1/+19
2015-06-19ARC: [axs101] support early 8250 uartVineet Gupta1-2/+2
2015-06-19ARC: [axs101] Add support for AXS101 SDP (software development platform)Alexey Brodkin3-0/+323
2015-06-19ARC: [plat_arcfpga]->[plat_sim]Vineet Gupta2-2/+2
2015-04-20ARC: perf: Rename DT binding to not confuse with power mgmtVineet Gupta1-1/+1
2015-02-05dmaengine: dw: define DW_DMA_MAX_NR_MASTERSAndy Shevchenko1-1/+1
2014-12-15ARC: [nsimosci] move peripherals to match model to FPGAVineet Gupta1-9/+9
2014-10-13ARC: [nsimosci] Allow "headless" models to bootVineet Gupta1-1/+1
2014-10-13ARC: [arcfpga] consolidate machine description, DTVineet Gupta2-10/+0
2014-07-28Revert "ARC: [arcfpga] stdout-path now suffices for earlycon/console"Greg Kroah-Hartman1-2/+1
2014-07-11ARC: [arcfpga] stdout-path now suffices for earlycon/consoleVineet Gupta1-1/+2
2014-07-11serial/arc: remove earlyprintk support and switch to earlyconVineet Gupta1-1/+1
2014-06-03ARC: [arcfpga] Early ARC UART to be only activated by cmdlineVineet Gupta1-1/+1
2014-04-05ARC: [nsimosci] Unbork consoleVineet Gupta1-1/+4
2014-04-05ARC: [nsimosci] Change .dts to use generic 8250 UARTMischa Jonker1-4/+3
2014-03-31ARC: Remove unused DT template fileVineet Gupta1-10/+0
2014-03-26ARC: add uImage to .gitignoreMischa Jonker1-0/+1
2013-11-12ARC: Add perf support for ARC700 coresMischa Jonker1-0/+4
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