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2018-10-12dt-bindings: pwm: renesas: tpu: Document R8A779{7|8}0 bindingsSergei Shtylyov1-0/+4
Document the R-Car V3{M|H} (R8A779{7|8}0) SoC in the Renesas TPU bindings; the TPU hardware in those is the Renesas standard 4-channel timer pulse unit. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-10-12dt-bindings: pwm: renesas: pwm-rcar: Document R8A779{7|8}0 bindingsSergei Shtylyov1-0/+2
Document the R-Car V3{M|H} (R8A779{7|8}0) SoC in the Renesas R-Car PWM bindings. R8A77970's hardware is a generic R-Car gen3 PWM, while R8A77980 has an extra error injection register... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-10-12dt-bindings: pwm: renesas: tpu: Fix "compatible" prop descriptionSergei Shtylyov1-2/+3
The "compatible" property description contradicts even the example given: it only says that there must be a single value while the example has the fallback value too -- which makes much more sense. Moreover, the generic property value is misdocumented as being R-Car (and RZ/G1) specific... Fixes: 382457e562bb ("pwm: renesas-tpu: Add DT support") Fixes: 3ba111a01822 ("dt-bindings: pwm: renesas-tpu: Document r8a774[35] support") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2018-10-12lib/vsprintf: Hash legacy clock addressesGeert Uytterhoeven1-3/+2
On platforms using the Common Clock Framework, "%pC" prints the clock's name. On legacy platforms, it prints the unhashed clock's address, potentially leaking sensitive information regarding the kernel layout in memory. Avoid this leak by printing the hashed address instead. To distinguish between clocks, a 32-bit unique identifier is as good as an actual pointer value. Fixes: ad67b74d2469d9b8 ("printk: hash addresses printed with %p") Link: http://lkml.kernel.org/r/20181011084249.4520-3-geert+renesas@glider.be To: "Tobin C . Harding" <me@tobin.cc> To: Andrew Morton <akpm@linux-foundation.org> To: Jonathan Corbet <corbet@lwn.net> Cc: linux-doc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Petr Mladek <pmladek@suse.com>
2018-10-12Input: of_touchscreen - add support for touchscreen-min-x|yHans de Goede1-2/+4
Some touchscreens, depending on the firmware and/or the digitizer, report coordinates which never reach 0 along one or both of their axis. This has been seen for example on the Silead touchscreens on a Onda V891w and a Point of View mobii TAB-P800w(v2.0). This commit adds support for touchscreen-min-x and touchscreen-min-y device-properties which can be set to communicate the actual start coordinates (rather then 0,0) to userspace. This commit also drop the "(in pixels)" comment from the documentation of the touchscreen-size-x and touchscreen-size-y properties. The comment suggested that there is a relation between the range of reported coordinates and the display resolution, which is only true for some devices. The "(in pixels)" comment is replaced with "(maximum x coordinate reported + 1)" to mirror the language describing the new touchscreen-min-x and -min-y properties. When set this fixes e.g. not being able to click things in the GNOME3 top-bar on the 2 example tablets. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2018-10-12Merge tag 'v4.19-rc7' into i2c/for-4.20Wolfram Sang3-3/+9
This is the 4.19-rc7 release
2018-10-11leds: sc27xx: Add pattern_set/clear interfaces for LED controllerBaolin Wang1-0/+22
This patch implements the 'pattern_set'and 'pattern_clear' interfaces to support SC27XX LED breathing mode. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Acked-by: Pavel Machek <pavel@ucw.c> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
2018-10-11leds: core: Introduce LED pattern triggerBaolin Wang1-0/+82
This patch adds a new LED trigger that LED device can configure to employ software or hardware pattern engine. Consumers can write 'pattern' file to enable the software pattern which alters the brightness for the specified duration with one software timer. Moreover consumers can write 'hw_pattern' file to enable the hardware pattern for some LED controllers which can autonomously control brightness over time, according to some preprogrammed hardware patterns. Signed-off-by: Raphael Teysseyre <rteysseyre@gmail.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
2018-10-11dt-bindings: arm: zte: Move sysctrl bindings to their own docRob Herring2-26/+31
In preparation to convert board-level bindings to json-schema, move various misc SoC bindings out to their own file. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Jun Nie <jun.nie@linaro.org> Cc: Baoyou Xie <baoyou.xie@linaro.org> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
2018-10-11dt-bindings: arm: fsl: Move DCFG and SCFG bindings to their own docsRob Herring3-39/+38
In preparation to convert board-level bindings to json-schema, move various misc SoC bindings out to their own file. Acked-by: Shawn Guo <shawnguo@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
2018-10-11dt-bindings: arm: atmel: Move various sys registers out of SoC binding docRob Herring2-170/+171
In preparation to convert board-level bindings to json-schema, move various misc SoC bindings out to their own file. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org>
2018-10-11serial: sh-sci: Add r8a77990 supportHiromitsu Yamasaki1-0/+2
This patch adds the R-Car E3 serial documentation. Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-10-11NTB: switchtec_ntb: Update switchtec documentation with prerequisites for NTBWesley Yung1-10/+20
The ntb_hw_switchtec driver has requirements on kernel configuration so add these notes to the documentation and also clean up a few other sentences in the documentation. Signed-off-by: Wesley Yung <wesley.yung@microchip.com> Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Wesley Sheng <wesley.sheng@microchip.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Logan Gunthorpe <logang@deltatee.com>
2018-10-11spi/spi-pxa2xx: add PXA2xx SSP SPI ControllerLubomir Rintel1-0/+24
This is the SPI controller found on Marvel MMP2 and perhaps more platforms. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-11spi: soc: qcom: GENI SE SPI controller device tree bindingDilip Kota2-25/+41
Move GENI SE SPI controller device-tree bindings from devicetree/bindings/soc/qcom/qcom,geni-se.txt to devicetree/bindings/spi/qcom,spi-geni-qcom.txt. Signed-off-by: Dilip Kota <dkota@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alok Chauhan <alokc@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-11dt-bindings: soc: qcom: Remove SPI controller maximum frequency bindingDilip Kota1-2/+0
SPI controller driver should maintain the maximum frequency of the controller instead of relying on device tree bindings. Because maximum frequency is specific property of SPI controller. Signed-off-by: Dilip Kota <dkota@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alok Chauhan <alokc@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-11spi: Qualcomm Quad SPI(QSPI) documentationGirish Mahadevan1-0/+36
Bindings for Qualcomm Quad SPI used on SoCs such as sdm845. Signed-off-by: Girish Mahadevan <girishm@codeaurora.org> Signed-off-by: Ryan Case <ryandcase@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-11spi: dw: add compatible for Amazon's Alpine spi controllerTalel Shenhar1-1/+1
This compatible adds the ability for dw spi controller driver to work with the dw spi controller found on Alpine chips. The dw spi controller has an auto-deselect of Chip-Select, in case there is no data inside the Tx FIFO. While working on platforms with Alpine chips, auto-deselect mode causes an issue for some spi devices that can't handle the Chip-Select deselect in the middle of a transaction. It is a normal behavior for a Tx FIFO to be empty in the middle of a transaction, due to busy cpu. In the Alpine chip family an option to change the default behavior was added to the original dw spi controller to prevent this issue of de-asserting Chip-Select once TX FIFO is empty. The change was to allow SW manual control of the Chip-Select. With this change, as long as the Slave Enable Register is asserted, the Chip-Select will be asserted. As a result, it is necessary to deselect the Slave Select Register once the transaction is done. This feature is enabled via a new device compatible string called 'amazon,alpine-dw-apb-ssi'. Once the driver identifies the new compatible string, it enables the hw fixup logic, by writing to a dedicated register found in the IP reserved area and will start manual deselecting the Slave Select Register when the transfer ends. Signed-off-by: Talel Shenhar <talel@amazon.com> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-10-11Merge tag 'samsung-soc-4.20-2' of ↵Arnd Bergmann1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc Samsung mach/soc changes for v4.20, second round 1. Disable SAMSUNG_PM_CHECK Kconfig feature incompatible with Exynos. * tag 'samsung-soc-4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms ARM: s3c24xx: Restore proper usage of pr_info/pr_cont ARM: s3c24xx: Correct SD card write protect detection on Mini2440 ARM: s3c24xx: Consistently use tab for indenting member assignments ARM: s3c24xx: formatting cleanup in mach-mini2440.c ARM: s3c24xx: Remove empty gta02_pmu children probe ARM: exynos: Fix imprecise abort during Exynos5422 suspend to RAM ARM: exynos: Store Exynos5420 register state in one variable Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-11stm class: SPDX-ify the documentationAlexander Shishkin1-0/+2
Add the SPDX header to the STM class documentation. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-10-11stm class: Update documentation to match the new identification rulesAlexander Shishkin1-9/+27
The rules and order of identification of trace sources against the "stp-policy" have changed; update the documentation to reflect that. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-10-11stm class: Document the MIPI SyS-T protocol usageAlexander Shishkin1-0/+62
Add a document describing MIPI SyS-T protocol driver usage. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-10-11stm class: p_sys-t: Document the configfs interfaceAlexander Shishkin1-0/+41
This adds ABI documentation for the new configfs attributes that come with the MIPI SyS-T protocol driver. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-10-11sched/completions/Documentation: Clean up the document some moreIngo Molnar1-108/+125
Refresh the document: - Remove unnecessary liguistic complexity and improve the clarity of the text - Improve the explanations all around - Remove unnecessary and stale version info - Fix whitespace noise - Make pseudo-code match kernel style - Fix minor syntax errors in pseudo-code - Use consistent denotation - Mark multi-CPU sequences more explicitly - Unbreak line breaks - Use quotes to refer to 'struct completion' - Use 'IRQ context' and 'IRQs' consistently - Improve grammar - etc. Cc: John Garry <john.garry@huawei.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Nicholas Mc Guire <hofrat@osadl.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: corbet@lwn.net Cc: linux-doc@vger.kernel.org Link: http://lkml.kernel.org/r/1539183392-239389-1-git-send-email-john.garry@huawei.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2018-10-11sched/completions/Documentation: Fix a couple of punctuation nitsJohn Garry1-3/+3
This patch fixes a couple of punctuation nits which can make the document more correct and readable. Also missing "()" are added to some function references for consistency. Signed-off-by: John Garry <john.garry@huawei.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: corbet@lwn.net Cc: linux-doc@vger.kernel.org Link: http://lkml.kernel.org/r/1539183392-239389-1-git-send-email-john.garry@huawei.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2018-10-11LSM: Provide init debugging infrastructureKees Cook1-0/+2
Booting with "lsm.debug" will report future details on how LSM ordering decisions are being made. Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Casey Schaufler <casey@schaufler-ca.com> Reviewed-by: John Johansen <john.johansen@canonical.com> Reviewed-by: James Morris <james.morris@microsoft.com> Signed-off-by: James Morris <james.morris@microsoft.com>
2018-10-11hwmon: (ina3221) Read channel input source info from DTNicolin Chen1-0/+2
An ina3221 chip has three input ports. Each port is used to measure the voltage and current of its input source. The DT binding now has defined bindings for their input sources, so the driver should read these information and handle accordingly. This patch adds a new structure of input source specific information including input source label, shunt resistor value and its connection status. It exposes these labels via in[123]_label sysfs nodes upon available, and also disables those channels where there are no input source being connected. Meanwhile, it also adds in[123]_enable sysfs nodes for users to get control of three channels, and returns -ENODATA code for any sensor read according to hwmon ABI. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2018-10-11dt-bindings: hwmon: Add ina3221 documentationNicolin Chen1-0/+44
Texas Instruments INA3221 is a triple-channel shunt and bus voltage monitor. This patch adds a DT binding doc for it. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2018-10-11hwmon: (lm75) Add MAX31725/6 supportKun Yi1-3/+3
MAX31725/MAX31726 are local temperature sensors with +/- 0.5 degree Celsius accuracy and 16-bit (0.00390625 degrees Celsius) resolution. They have a register mapping and encoding compatible with the lm75 series drivers. Address scan and extended temperature range are not supported by this patch. Tested on real hardware and verified temperature readings are correct. Signed-off-by: Kun Yi <kunyi@google.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2018-10-11hwmon: (mc13783-adc) Use nxp.com URLsFabio Estevam1-2/+2
Use the nxp.com URLs for the MC13783 and MC13892 datasheets. The original URLs are still valid, but the nxp.com one is shorter and more up-to-date. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2018-10-11hwmon: (mc13783-adc) Remove the mention to 'Atlas'Fabio Estevam1-2/+2
'Atlas' was an internal name for the MC13783 PMIC only and does not apply to MC13892. To avoid confusion, remove the 'Atlas' term from the description. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2018-10-11drivers: hwmon: (pmbus/ltc2978) Add support for LTM4686 uModuleMichael Hennerich2-0/+7
This patch adds support for LTM4686 Ultrathin Dual 10A or Single 20A uModule Regulator with Digital Power System Management. Datasheet: http://www.analog.com/ltm4686 Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2018-10-11scsi: ufs: Add a bsg endpoint that supports UPIUsAvri Altman1-0/+20
For now, just provide an API to allocate and remove ufs-bsg node. We will use this framework to manage ufs devices by sending UPIU transactions. For the time being, implements an empty bsg_request() - will add some more functionality in coming patches. Nonetheless, we reveal here the protocol we are planning to use: UFS Transport Protocol Transactions. UFS transactions consist of packets called UFS Protocol Information Units (UPIU). There are UPIU’s defined for UFS SCSI commands, responses, data in and data out, task management, utility functions, vendor functions, transaction synchronization and control, and more. By using UPIUs, we get access to the most fine-grained internals of this protocol, and able to communicate with the device in ways, that are sometimes beyond the capacity of the ufs driver. Moreover and as a result, our core structure - ufs_bsg_node has a pretty lean structure: using upiu transactions that contains the outmost detailed info, so we don't really need complex constructs to support it. Signed-off-by: Avri Altman <avri.altman@wdc.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Bart Van Assche <Bart.VanAssche@wdc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2018-10-11tracing: probeevent: Add $argN for accessing function argsMasami Hiramatsu1-4/+6
Add $argN special fetch variable for accessing function arguments. This allows user to trace the Nth argument easily at the function entry. Note that this returns most probably assignment of registers and stacks. In some case, it may not work well. If you need to access correct registers or stacks you should use perf-probe. Link: http://lkml.kernel.org/r/152465888632.26224.3412465701570253696.stgit@devbox Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2018-10-11tracing: probeevent: Add array type supportMasami Hiramatsu1-0/+11
Add array type support for probe events. This allows user to get arraied types from memory address. The array type syntax is TYPE[N] Where TYPE is one of types (u8/16/32/64,s8/16/32/64, x8/16/32/64, symbol, string) and N is a fixed value less than 64. The string array type is a bit different from other types. For other base types, <base-type>[1] is equal to <base-type> (e.g. +0(%di):x32[1] is same as +0(%di):x32.) But string[1] is not equal to string. The string type itself represents "char array", but string array type represents "char * array". So, for example, +0(%di):string[1] is equal to +0(+0(%di)):string. Link: http://lkml.kernel.org/r/152465891533.26224.6150658225601339931.stgit@devbox Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2018-10-11tracing: probeevent: Add symbol typeMasami Hiramatsu1-0/+2
Add "symbol" type to probeevent, which is an alias of u32 or u64 (depends on BITS_PER_LONG). This shows the result value in symbol+offset style. This type is only available with kprobe events. Link: http://lkml.kernel.org/r/152465882860.26224.14779072294412467338.stgit@devbox Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2018-10-10Document d_splice_alias() calling conventions for ->lookup() users.Al Viro1-0/+11
Short version: it does the right thing when given NULL or ERR_PTR(...) and its calling conventions are chosen to have minimal PITA when used in ->lookup() instances. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2018-10-10Documentation/arm64: HugeTLB page implementationPunit Agrawal1-0/+38
Arm v8 architecture supports multiple page sizes - 4k, 16k and 64k. Based on the active page size, the Linux port supports corresponding hugepage sizes at PMD and PUD(4k only) levels. In addition, the architecture also supports caching larger sized ranges (composed of multiple entries) at the PTE and PMD level in the TLBs using the contiguous bit. The Linux port makes use of this architectural support to enable additional hugepage sizes. Describe the two different types of hugepages supported by the arm64 kernel and the hugepage sizes enabled by each. Acked-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Jonathan Corbet <corbet@lwn.net> Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2018-10-10arm64: Add silicon-errata.txt entry for ARM erratum 1188873Marc Zyngier1-0/+1
Document that we actually work around ARM erratum 1188873 Fixes: 95b861a4a6d9 ("arm64: arch_timer: Add workaround for ARM erratum 1188873") Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2018-10-10Merge branches 'arm/renesas', 'arm/smmu', 'ppc/pamu', 'x86/vt-d', 'x86/amd' ↵Joerg Roedel3-0/+52
and 'core' into next
2018-10-10gpio: fix kernel-doc after devres.c file renameRandy Dunlap1-1/+1
Fix gpio kernel-doc generation after rename of the devres.c file. Fixes these errors & warning: Error: Cannot open file ../drivers/gpio/devres.c Error: Cannot open file ../drivers/gpio/devres.c WARNING: kernel-doc '../scripts/kernel-doc -rst -enable-lineno -export ../drivers/gpio/devres.c' failed with return code 2 Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-10Merge tag 'zynqmp-soc-clk-for-v4.20' of https://github.com/Xilinx/linux-xlnx ↵Arnd Bergmann2-0/+120
into next/drivers arm64: zynqmp: SoC CLK changes for v4.20 This patchset adds CCF compliant clock driver for ZynqMP. Clock driver queries supported clock information from firmware and regiters pll and output clocks with CCF. * tag 'zynqmp-soc-clk-for-v4.20' of https://github.com/Xilinx/linux-xlnx: drivers: clk: Add ZynqMP clock driver dt-bindings: clock: Add bindings for ZynqMP clock driver firmware: xilinx: Add zynqmp IOCTL API for device control Documentation: xilinx: Add documentation for eemi APIs Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-10Merge tag 'reset-for-4.20' of git://git.pengutronix.de/git/pza/linux into ↵Arnd Bergmann1-0/+52
next/drivers Reset controller changes for v4.20 This adds a new driver for the PDC Global (Power Domain Controller) reset controller found on Qualcomm SDM845 SoCs, fixes a potential use-after-free issue in reset_controller_dev.of_xlate() callbacks from __of_reset_control_get(), and trivially fixes a documentation grammar issue. * tag 'reset-for-4.20' of git://git.pengutronix.de/git/pza/linux: reset: Fix potential use-after-free in __of_reset_control_get() reset: qcom: PDC Global (Power Domain Controller) reset controller dt-bindings: reset: Add PDC Global binding for SDM845 SoCs reset: Grammar s/more then once/more than once/ Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-10Merge tag 'imx-drivers-4.20-2' of ↵Arnd Bergmann1-0/+183
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers i.MX drivers change for 4.20, round 2: - A series from Aisheng Dong to add SCU firmware driver for i.MX8 SoCs. It implements IPC mechanism based on mailbox for message exchange between AP and SCU firmware, and a set of SCU IPC service APIs used by clients like i.MX8 power domain and clock drivers. * tag 'imx-drivers-4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: MAINTAINERS: imx: include drivers/firmware/imx path firmware: imx: add misc svc support firmware: imx: add SCU firmware driver support dt-bindings: arm: fsl: add scu binding doc Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-10Merge tag 'sh-pfc-for-v4.20-tag3' of ↵Linus Walleij1-0/+153
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.20 (take three) - Add support for the new RZ/N1D (R9A06G032) and RZ/N1S (R9A06G033) SoCs, - Add INTC-EX pin groups on R-Car E3.
2018-10-10x86/boot: Add ACPI RSDP address to setup_headerJuergen Gross1-1/+31
Xen PVH guests receive the address of the RSDP table from Xen. In order to support booting a Xen PVH guest via Grub2 using the standard x86 boot entry we need a way for Grub2 to pass the RSDP address to the kernel. For this purpose expand the struct setup_header to hold the physical address of the RSDP address. Being zero means it isn't specified and has to be located the legacy way (searching through low memory or EBDA). While documenting the new setup_header layout and protocol version 2.14 add the missing documentation of protocol version 2.13. There are Grub2 versions in several distros with a downstream patch violating the boot protocol by writing past the end of setup_header. This requires another update of the boot protocol to enable the kernel to distinguish between a specified RSDP address and one filled with garbage by such a broken Grub2. From protocol 2.14 on Grub2 will write the version it is supporting (but never a higher value than found to be supported by the kernel) ored with 0x8000 to the version field of setup_header. This enables the kernel to know up to which field Grub2 has written information to. All fields after that are supposed to be clobbered. Signed-off-by: Juergen Gross <jgross@suse.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: boris.ostrovsky@oracle.com Cc: bp@alien8.de Cc: corbet@lwn.net Cc: linux-doc@vger.kernel.org Cc: xen-devel@lists.xenproject.org Link: http://lkml.kernel.org/r/20181010061456.22238-3-jgross@suse.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2018-10-10dt-bindings: Document the Synopsys GPIO via CREG bindingsEugeniy Paltsev1-0/+21
This patch adds documentation of device tree bindings for the Synopsys GPIO via CREG driver. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-10dt-bindings: pinctrl: document Broadcom Northstar pin mux controllerRafał Miłecki1-0/+42
Northstar has mux controller just like Northstar Plus and Northstar2. It's a bit different though (different registers & pins) so it requires its own binding. It's needed to allow other block bindings specify required mux setup. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-10-09security: fix LSM description locationRandy Dunlap1-1/+1
Acked-by: Kees Cook <keescook@chromium.org> Fix Documentation location reference for where LSM descriptions should be placed. Suggested-by: Kees Cook <keescook@chromium.org> Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: James Morris <jmorris@namei.org> Cc: "Serge E. Hallyn" <serge@hallyn.com> Cc: linux-security-module@vger.kernel.org Signed-off-by: James Morris <james.morris@microsoft.com>
2018-10-09x86/hyperv: Enable PV qspinlock for Hyper-VYi Sun1-0/+5
Implement the required wait and kick callbacks to support PV spinlocks in Hyper-V guests. [ tglx: Document the requirement for disabling interrupts in the wait() callback. Remove goto and unnecessary includes. Add prototype for hv_vcpu_is_preempted(). Adapted to pending paravirt changes. ] Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Juergen Gross <jgross@suse.com> Cc: "K. Y. Srinivasan" <kys@microsoft.com> Cc: Haiyang Zhang <haiyangz@microsoft.com> Cc: Stephen Hemminger <sthemmin@microsoft.com> Cc: Michael Kelley (EOSG) <Michael.H.Kelley@microsoft.com> Cc: chao.p.peng@intel.com Cc: chao.gao@intel.com Cc: isaku.yamahata@intel.com Cc: tianyu.lan@microsoft.com Link: https://lkml.kernel.org/r/1538987374-51217-3-git-send-email-yi.y.sun@linux.intel.com
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