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2024-12-27dt-bindings: arm: qcom: Add Xiaomi Redmi 5ABarnabás Czémán1-0/+7
Document Xiaomi Remi 5A (riva). Add qcom,msm8917 for msm-id, board-id allow-list. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20241221-msm8917-v11-3-901a74db4805@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-27dt-bindings: arm: qcom: Add Microsoft Windows Dev Kit 2023Jens Glathe1-0/+1
Add compatible values for the Microsoft Windows Dev Kit (WDK2023) with its codename "blackrock". The Dev kit is a small desktop box based on the mainboard of the Surface pro 9 5G, intended for developers to test/build arm64-based Windows software. Link: https://learn.microsoft.com/en-us/windows/arm/dev-kit/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Link: https://lore.kernel.org/r/20241202-jg-blackrock-for-upstream-v9-1-385bb46ca122@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-27dt-bindings: arm: qcom: Add HP Omnibook X 14Jens Glathe1-0/+1
Add compatible values for the HP Omnibook X Laptop 14-fe0750ng, using "hp,omnibook-x14" The laptop is based on the Snapdragon X Elite (x1e80100) SoC. PDF link: https://www8.hp.com/h20195/V2/GetPDF.aspx/c08989140 Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Link: https://lore.kernel.org/r/20241202-hp-omnibook-x14-v3-1-0fcd96483723@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26dt-bindings: soc: ti: pruss: Add clocks for ICSSGMD Danish Anwar1-0/+10
The ICSSG module has 7 clocks for each instance. These clocks are ICSSG0_CORE_CLK, ICSSG0_IEP_CLK, ICSSG0_ICLK, ICSSG0_UART_CLK, RGMII_MHZ_250_CLK, RGMII_MHZ_50_CLK and RGMII_MHZ_5_CLK These clocks are described in AM64x TRM Section 6.4.3 Table 6-398. Add these clocks to the dt binding of ICSSG. Link: https://www.ti.com/lit/pdf/spruim2 (AM64x TRM) Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241113110955.3876045-2-danishanwar@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-12-26Merge tag 'sound-6.13-rc5' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound fixes from Takashi Iwai: "A collection of small fixes. Nothing really stands out, fortunately. - Follow-up fixes for the new compress offload API extension - A few ASoC SOF, AMD and Mediatek quirks and fixes - A regression fix in legacy SH driver cleanup - Fix DMA mapping error handling in the helper code - Fix kselftest dependency" * tag 'sound-6.13-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: ALSA: sh: Fix wrong argument order for copy_from_iter() selftests/alsa: Fix circular dependency involving global-timer ALSA: memalloc: prefer dma_mapping_error() over explicit address checking ALSA: compress_offload: improve file descriptors installation for dma-buf ALSA: compress_offload: use safe list iteration in snd_compr_task_seq() ALSA: compress_offload: avoid 64-bit get_user() ALSA: compress_offload: import DMA_BUF namespace ASoC: mediatek: disable buffer pre-allocation ASoC: rt722: add delay time to wait for the calibration procedure ASoC: SOF: Intel: hda-dai: Do not release the link DMA on STOP ASoC: dt-bindings: realtek,rt5645: Fix CPVDD voltage comment ASoC: Intel: sof_sdw: Fix DMI match for Lenovo 21QA and 21QB ASoC: Intel: sof_sdw: Fix DMI match for Lenovo 21Q6 and 21Q7 ASoC: amd: ps: Fix for enabling DMIC on acp63 platform via _DSD entry
2024-12-26dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for QCS615Taniya Das1-0/+1
Add bindings and update documentation for clock rpmh driver on QCS615 SoCs. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20241022-qcs615-clock-driver-v4-1-3d716ad0d987@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26dt-bindings: clock: qcom,x1e80100-gcc: Add X1P42100Konrad Dybcio1-1/+5
X1P42100 is based on X1E80100 and largely reuses the X1E80100's GCC block, adding a couple wires here and there. Add a compatible for the X1P4 with a fallback to X1E80100. There are some additions in the smaller one, that will be added in the future. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241221-topic-x1p4_clk-v1-1-dbaeccb74884@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26Merge branch '20241221-topic-x1p4_clk-v1-2-dbaeccb74884@oss.qualcomm.com' ↵Bjorn Andersson1-0/+1
into clk-for-6.14 Merge the X1P42100 GPUCC binding through a topic branch to make available for the DeviceTree branch as well.
2024-12-26dt-bindings: clock: qcom,x1e80100-gpucc: Extend for X1P42100Konrad Dybcio1-0/+1
To make it easier for X1P4 and X1E to share a common device tree base, extend the existing latter's GPUCC bindings and reuse them on the former platform. While not in the same file, it only makes sense to introduce the new compatible in this commit as well. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241221-topic-x1p4_clk-v1-2-dbaeccb74884@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26dt-bindings: arm: qcom: Add X1P42100 SoC & CRDKonrad Dybcio1-0/+6
The X1 family is split into two parts: the 10- and 12-core parts are variants of the same silicon with different fusing, whereas the 8-core ones are a separate design. Thankfully, the software interface is only barely different, letting us reuse much of the existing X1 work. Add X1P42100 SoC (and the CRD based on it) as a representative of the 8-core series. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20241221-topic-x1p4_soc-v1-2-55347831d73c@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26dt-bindings: arm: qcom-soc: Extend X1E prefix match for X1PKonrad Dybcio1-4/+4
The X1 series includes SoCs like X1P42100. Extend the pattern x1e match to x1[ep] to also include these. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20241221-topic-x1p4_soc-v1-1-55347831d73c@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-24dt-bindings: phy: qcom,qmp-pcie: document the SM8350 two lanes PCIe PHYNeil Armstrong1-0/+2
Document the two lanes PCIe PHY found on SM8350 SoCs along the already documented single lane PCIe PHY. This fixes: /soc@0/phy@1c0e000: failed to match any schema with compatible: ['qcom,sm8350-qmp-gen3x2-pcie-phy'] Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241204-topic-misc-sm8350-pcie-bindings-fix-v1-1-e8eaff1699d7@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: phy: qcom,ipq8074-qmp-pcie: Document the IPQ5424 QMP PCIe PHYsManikanta Mylavarapu1-6/+15
Document the PCIe phy on the IPQ5424 platform using the IPQ9574 bindings as a fallback, since the PCIe phy on the IPQ5424 is similar to IPQ9574. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241213134950.234946-3-quic_mmanikan@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: display: msm: dp: update maintainer entryAbhinav Kumar1-0/+1
Add myself as maintainer for dp controller yaml as to support review of the incoming changes. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/626921/ Link: https://lore.kernel.org/r/20241202-dp_mst_bindings-v1-4-9a9a43b0624a@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-12-24dt-bindings: usb: qcom,dwc3: Add QCS615 to USB DWC3 bindingsKrishna Kurapati1-0/+3
Update dt-bindings to add primary controller of QCS615 to USB DWC3 controller list. Although this controller has a QUSB2 Phy, it belongs to a generation of SoCs like SDM670/SDM845/SM6350 where DP/DM is used for wakeup instead of qusb2_phy interrupt. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241224084621.4139021-2-krishna.kurapati@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: mtd: cadence: convert cadence-nand-controller.txt to yamlNiravkumar L Rabara2-53/+75
Convert cadence-nand-controller.txt to yaml format. Update cadence-nand-controller.txt to cdns,hp-nfc.yaml in MAINTAINER file. Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24dt-bindings: mtd: nuvoton,ma35d1-nand: add new bindingsHui-Ping Chen1-0/+95
Add dt-bindings for the Nuvoton MA35 SoC NAND Controller. Signed-off-by: Hui-Ping Chen <hpchen0nvt@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24dt-bindings: dma: atmel: Convert to json schemaCharan Pedumuru2-54/+79
Convert old text based binding to json schema. Changes during conversion: - Add the required properties `clock` and `clock-names`, which were missing in the original binding. - Add a fallback for `microchip,sam9x7-dma` and `microchip,sam9x60-dma` as they are compatible with the dma IP core on `atmel,sama5d4-dma`. - Update examples and include appropriate file directives to resolve errors identified by `dt_binding_check` and `dtbs_check`. Signed-off-by: Charan Pedumuru <charan.pedumuru@microchip.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241205-xdma-v1-1-76a4a44670b5@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: dma: st-stm32-dmamux: Add description for dma-cell valuesKen Sloat1-0/+10
The dma-cell values for the stm32-dmamux are used to craft the DMA spec for the actual controller. These values are currently undocumented leaving the user to reverse engineer the driver in order to determine their meaning. Add a basic description, while avoiding duplicating information by pointing the user to the associated DMA docs that describe the fields in depth. Signed-off-by: Ken Sloat <ksloat@cornersoftsolutions.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20241206115018.1155149-1-ksloat@cornersoftsolutions.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: dma: adi,axi-dmac: deprecate adi,channels nodeDavid Lechner1-15/+5
Deprecate the adi,channels node in the adi,axi-dmac binding. Prior to IP version 4.3.a, this information was required. Since then, there are memory-mapped registers that can be read to get the same information. Acked-by: Nuno Sa <nuno.sa@analog.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20241216-axi-dma-dt-yaml-v3-2-7b994710c43f@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: dma: adi,axi-dmac: convert to yaml schemaDavid Lechner2-61/+139
Convert the AXI DMAC bindings from .txt to .yaml. Acked-by: Nuno Sa <nuno.sa@analog.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20241216-axi-dma-dt-yaml-v3-1-7b994710c43f@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: dma: Support channel page to nvidia,tegra210-admaMohan Kumar D1-4/+56
Multiple ADMA Channel page hardware support has been added from TEGRA186 and onwards. Update the DT binding to use any of the ADMA channel page address space region. Signed-off-by: Mohan Kumar D <mkumard@nvidia.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241217074358.340180-2-mkumard@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: dma: ti: k3-bcdma: Add J722S CSI BCDMAVaishnav Achath1-1/+4
J722S CSI BCDMA is similar to J721S2 CSI BCDMA and supports both RX and TX channels but has a different PSIL thread base ID which is currently handled in k3-udma driver. Add an entry for J722S CSIRX BCDMA. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20241127101627.617537-2-vaishnav.a@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: dma: fsl-edma: add nxp,s32g2-edma compatible stringLarisa Grigore1-0/+34
Introduce the compatible strings 'nxp,s32g2-edma' and 'nxp,s32g3-edma' to enable the support for the eDMAv3 present on S32G2/S32G3 platforms. The S32G2/S32G3 eDMA architecture features 32 DMA channels. Each of the two eDMA instances is integrated with two DMAMUX blocks. Another particularity of these SoCs is that the interrupts are shared between channels in the following way: - DMA Channels 0-15 share the 'tx-0-15' interrupt - DMA Channels 16-31 share the 'tx-16-31' interrupt - all channels share the 'err' interrupt Signed-off-by: Larisa Grigore <larisa.grigore@oss.nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241219102415.1208328-4-larisa.grigore@oss.nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: connector: Add pd-revision propertyAmit Sunil Dhamne2-0/+8
Add pd-revision property definition, to specify the maximum Power Delivery Revision and Version supported by the connector. Signed-off-by: Amit Sunil Dhamne <amitsd@google.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20241210-get_rev_upstream-v2-1-d0094e52d48f@google.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-24dt-bindings: usb: gpio-sbu-mux: Add an entry for FSUSB42Stephan Gerhold1-0/+1
Add a compatible entry for the onsemi FSUSB42 USB switch, which can be used for switching orientation of the SBU lines in USB Type-C applications. Drivers work as-is with the existing fallback compatible. Link to datasheet: https://www.onsemi.com/pdf/datasheet/fsusb42-d.pdf Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241212-x1e80100-qcp-dp-v1-1-37cb362a0dfe@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-23dt-bindings: net: sparx5: document RGMII delaysDaniel Machon1-0/+18
The lan969x switch device supports two RGMII port interfaces that can be configured for MAC level rx and tx delays. Document two new properties {rx,tx}-internal-delay-ps in the bindings, used to select these delays. Tested-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20241220-sparx5-lan969x-switch-driver-4-v5-9-fa8ba5dff732@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-12-23dt-bindings: net: can: atmel: Convert to json schemaCharan Pedumuru2-15/+58
Convert old text based binding to json schema. Changes during conversion: - Add a fallback for `microchip,sam9x60-can` as it is compatible with the CAN IP core on `atmel,at91sam9x5-can`. - Add the required properties `clock` and `clock-names`, which were missing in the original binding. - Update examples and include appropriate file directives to resolve errors identified by `dt_binding_check` and `dtbs_check`. Signed-off-by: Charan Pedumuru <charan.pedumuru@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20241120-can-v3-1-da5bb4f6128d@microchip.com [mkl: fixed indention in example] Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2024-12-23dt-bindings: cpufreq: apple,cluster-cpufreq: Add A7-A11, T2 compatiblesNick Chan1-1/+9
Add compatibles for Apple A7-A11, T2 SoCs. Apple A7, A8, A8X gets the per-SoC compatible and the A7 "apple,s5l8960x-cluster-cpufreq" compatible. Apple A9, A9X, A10, A10X, T2, A11 gets the per-SoC compatible, M1 "apple,t8103-cluster-cpufreq" compatible, then the "apple,cluster-cpufreq" fallback compatible. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nick Chan <towinchenmi@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-12-23dt-bindings: cpufreq: Document support for Airoha EN7581 CPUFreqChristian Marangi1-0/+55
On newer Airoha SoC, CPU Frequency is scaled indirectly with SMC commands to ATF. A virtual clock is exposed. This virtual clock is a get-only clock and is used to expose the current global CPU clock. The frequency info comes by the output of the SMC command that reports the clock in MHz. The SMC sets the CPU clock by providing an index, this is modelled as performance states in a power domain. CPUs can't be individually scaled as the CPU frequency is shared across all CPUs and is global. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-12-23dt-bindings: leds: Add LED1202 LED ControllerVicentiu Galanopulo1-0/+132
The LED1202 is a 12-channel low quiescent current LED driver with: * Supply range from 2.6 V to 5 V * 20 mA current capability per channel * 1.8 V compatible I2C control interface * 8-bit analog dimming individual control * 12-bit local PWM resolution * 8 programmable patterns If the led node is present in the controller then the channel is set to active. Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo@remote-tech.co.uk> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241218182001.41476-3-vicentiu.galanopulo@remote-tech.co.uk Signed-off-by: Lee Jones <lee@kernel.org>
2024-12-23Merge 6.14-rc4 into usb-nextGreg Kroah-Hartman3-5/+9
We need the USB fixes in here as well for testing. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-22Merge tag 'devicetree-fixes-for-6.13-1' of ↵Linus Torvalds3-5/+9
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes from Rob Herring: - Disable #address-cells/#size-cells warning on coreboot (Chromebooks) platforms - Add missing root #address-cells/#size-cells in default empty DT - Fix uninitialized variable in of_irq_parse_one() - Fix interrupt-map cell length check in of_irq_parse_imap_parent() - Fix refcount handling in __of_get_dma_parent() - Fix error path in of_parse_phandle_with_args_map() - Fix dma-ranges handling with flags cells - Drop explicit fw_devlink handling of 'interrupt-parent' - Fix "compression" typo in fixed-partitions binding - Unify "fsl,liodn" property type definitions * tag 'devicetree-fixes-for-6.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: of: Add coreboot firmware to excluded default cells list of/irq: Fix using uninitialized variable @addr_len in API of_irq_parse_one() of/irq: Fix interrupt-map cell length check in of_irq_parse_imap_parent() of: Fix refcount leakage for OF node returned by __of_get_dma_parent() of: Fix error path in of_parse_phandle_with_args_map() dt-bindings: mtd: fixed-partitions: Fix "compression" typo of: Add #address-cells/#size-cells in the device-tree root empty node dt-bindings: Unify "fsl,liodn" type definitions of: address: Preserve the flags portion on 1:1 dma-ranges mapping of/unittest: Add empty dma-ranges address translation tests of: property: fw_devlink: Do not use interrupt-parent directly
2024-12-21dt-bindings: power: supply: Add STC3117 Fuel GaugeHardevsinh Palaniya1-0/+74
The STC3117 provides a simple fuel gauge via I2C. Add a DT schema to describe how to set it up in the device tree. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hardevsinh Palaniya <hardevsinh.palaniya@siliconsignals.io> Signed-off-by: Bhavin Sharma <bhavin.sharma@siliconsignals.io> Link: https://lore.kernel.org/r/20241220084958.32367-2-bhavin.sharma@siliconsignals.io Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2024-12-21dt-bindings: interconnect: qcom-bwmon: Document QCS615 bwmon compatiblesLijuan Gao1-0/+2
Document QCS615 BWMONs, which includes one BWMONv4 instance for CPU to LLCC path bandwidth monitoring and one BWMONv5 instance for LLCC to DDR path bandwidth monitoring. Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241218-add_bwmon_support_for_qcs615-v1-1-680d798a19e5@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-20dt-bindings: iio: dac: ad5791: ldac gpio is active lowAxel Haslam1-1/+1
On the example, the ldac gpio is flagged as active high, when in reality its an active low gpio. Fix the example by using the active low flag for the ldac gpio. Fixes: baaa92d284d5 ("dt-bindings: iio: dac: ad5791: Add optional reset, clr and ldac gpios") Signed-off-by: Axel Haslam <ahaslam@baylibre.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20241106103824.579292-1-ahaslam@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-20Merge tag 'renesas-dts-for-v6.14-tag1' of ↵Arnd Bergmann2-13/+35
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.14 - Add more serial (SCIF), power monitor, ADC, and sound support for the RZ/G3S SoC and the RZ/G3S SMARC SoM and development board, - Add support for the R-Car V4H ES3.0 (R8A779G3) SoC on the White Hawk Single development board, - Add display support for the R-Car V4M SoC and the Gray Hawk Single development board, - Add video capture support for the Gray Hawk Single development board, - Add initial support for the RZ/G3E (R9A09G047) SoC and the RZ/G3E SMARC SoM and Carrier-II EVK development board, - Add support for 5-port MATEnet on the Falcon Ethernet sub-board, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.14-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (33 commits) arm64: dts: renesas: r9a09g047: Add I2C nodes arm64: dts: renesas: rzg3s-smarc: Add sound card arm64: dts: renesas: rzg3s-smarc: Enable SSI3 arm64: dts: renesas: Add da7212 audio codec node arm64: dts: renesas: rzg3s-smarc-som: Add versa3 clock generator node arm64: dts: renesas: r9a08g045: Add SSI nodes arm64: dts: renesas: rzg3s-smarc-som: Enable ADC arm64: dts: renesas: r9a08g045: Add ADC node arm64: dts: renesas: Add initial device tree for RZ/G3E SMARC EVK board arm64: dts: renesas: Add initial support for RZ/G3E SMARC SoM arm64: dts: renesas: r9a09g047: Add OPP table arm64: dts: renesas: Add initial DTSI for RZ/G3E SoC arm64: dts: renesas: falcon-ethernet: Describe PHYs connected on the breakout board arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] dt-bindings: clock: renesas: Document RZ/G3E SoC CPG dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVK dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variants arm64: dts: renesas: gray-hawk-single: Add video capture support arm64: dts: renesas: gray-hawk-single: Add DisplayPort support arm64: dts: renesas: r8a779h0: Add display support ... Link: https://lore.kernel.org/r/cover.1734689803.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-12-20Merge tag 'stm32-dt-for-v6.14-1' of ↵Arnd Bergmann1-0/+7
https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt STM32 DT for v6.14, round 1 Highlights: ---------- - MPU: - STM32MP13: - Populate all timer counter nodes in Soc file. - Enable counter (timers) on stm32mp135f-dk. - DH core: increase CPU voltage to fit with STM32MP135F datasheet. - STMP32MP15: - Populate all timer counter nodes in Soc file. - Enable counter (timers) on stm32mp15 EV1 and DK boards. - OCTAVO: - LXA-TAC (gen1/2): disable RTC, update aliases and adjust USB gadget. - Add LXA-TAC gen3 based on OSD32MP153x SIP: STMP32MP153, RAM, PMIC. - DH: minor fixes. - STM32MP25: - Enable imx335/CSI/DCMIPP pipeline on stm32mp257f-ev1. - Add I2S, SAI, SPDIFRX supports. - Add and enable COMBOPHY on stm32mp257f-ev1. Combophy is used by PCIe and USB3. * tag 'stm32-dt-for-v6.14-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (23 commits) arm64: dts: st: enable imx335/csi/dcmipp pipeline on stm32mp257f-ev1 arm64: dts: st: add csi & dcmipp node in stm32mp25 ARM: dts: stm32: Swap USART3 and UART8 alias on STM32MP15xx DHCOM SoM ARM: dts: stm32: add counter subnodes on stm32mp157 dk boards ARM: dts: stm32: add counter subnodes on stm32mp157c-ev1 ARM: dts: stm32: add counter subnodes on stm32mp135f-dk ARM: dts: stm32: populate all timer counter nodes on stm32mp15 ARM: dts: stm32: populate all timer counter nodes on stm32mp13 ARM: dts: stm32: lxa-tac: Add support for generation 3 devices ARM: dts: stm32: lxa-tac: move adc and gpio{e,g} to gen{1,2} boards dt-bindings: arm: stm32: add compatible strings for Linux Automation LXA TAC gen 3 ARM: dts: stm32: lxa-tac: adjust USB gadget fifo sizes for multi function ARM: dts: stm32: lxa-tac: extend the alias table ARM: dts: stm32: lxa-tac: disable the real time clock ARM: dts: stm32: Fix IPCC EXTI declaration on stm32mp151 ARM: dts: stm32: Sort M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT ARM: dts: stm32: Increase CPU core voltage on STM32MP13xx DHCOR SoM ARM: dts: stm32: Deduplicate serial aliases and chosen node for STM32MP15xx DHCOM SoM arm64: dts: st: Enable COMBOPHY on the stm32mp257f-ev1 board arm64: dts: st: Add combophy node on stm32mp251 ... Link: https://lore.kernel.org/r/7ffcca65-3953-413a-bcf3-0702a6b0518b@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-12-20dt-bindings: sram: sunxi-sram: Add A100 compatibleCody Eksal1-1/+3
The Allwinner A100 has a system configuration block similar to that of the A64 and H6. Add a compatible for it. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Cody Eksal <masterr3c0rd@epochal.quest> Link: https://patch.msgid.link/20241218-a100-syscon-v2-1-dae60b9ce192@epochal.quest Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2024-12-20dt-bindings: display: panel-simple: Document Topland TIAN-G07017-01Ahmad Fatoum1-0/+2
The TIAN-G07017-01 is a 7" TFT-LCD module by TOPLAND ELECTRONICS (H.K). Add its compatible string. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241218-topland-tian-g07017-v1-2-d5e411c199e3@pengutronix.de Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20241218-topland-tian-g07017-v1-2-d5e411c199e3@pengutronix.de
2024-12-20dt-bindings: vendor-prefixes: add prefix for Topland Electronics (H.K)Ahmad Fatoum1-0/+2
Topland is a professional supplier of photoelectric display and touch integrated products from Hong Kong: https://www.topland.com.hk/aboutus/ Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241218-topland-tian-g07017-v1-1-d5e411c199e3@pengutronix.de Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20241218-topland-tian-g07017-v1-1-d5e411c199e3@pengutronix.de
2024-12-20dt-bindings: display: adi,adv7533: Drop single lane supportBiju Das1-1/+1
As per [1] and [2], ADV7535/7533 supports only 2-, 3-, or 4-lane. Drop unsupported 1-lane from bindings. [1] https://www.analog.com/media/en/technical-documentation/data-sheets/ADV7535.pdf [2] https://www.analog.com/media/en/technical-documentation/data-sheets/ADV7533.pdf Fixes: 1e4d58cd7f88 ("drm/bridge: adv7533: Create a MIPI DSI device") Cc: stable@vger.kernel.org Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241119192040.152657-3-biju.das.jz@bp.renesas.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-12-20dt-bindings: power: supply: gpio-charger: add support for default charge ↵Dimitri Fedrau1-0/+6
current limit With DT properties charge-current-limit-gpios and charge-current-limit-mapping one can define charge current limits in uA using up to 32 GPIOs. Add property charge-current-limit-default-microamp which selects a default charge current limit that must be listed in charge-current-limit-mapping. This is helpful when the smallest possible charge current limit is 0uA. The driver defaults to the smallest possible value at the moment, which disables charging on probe. With the default its possible to setup a safe charge current limit. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com> Link: https://lore.kernel.org/r/20241218-default-charge-current-limit-v3-1-b26118cf06b5@liebherr.com Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2024-12-20Merge tag 'drm-misc-next-2024-12-19' of ↵Dave Airlie7-9/+231
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next drm-misc-next for 6.14: UAPI Changes: Cross-subsystem Changes: Core Changes: - connector: Add a mutex to protect ELD access, Add a helper to create a connector in two steps Driver Changes: - amdxdna: Add RyzenAI-npu6 Support, various improvements - rcar-du: Add r8a779h0 Support - rockchip: various improvements - zynqmp: Add DP audio support - bridges: - ti-sn65dsi83: Add ti,lvds-vod-swing optional properties - panels: - new panels: Tianma TM070JDHG34-00, Multi-Inno Technology MI1010Z1T-1CP11 Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <mripard@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241219-truthful-demonic-hound-598f63@houat
2024-12-19Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski2-5/+29
Cross-merge networking fixes after downstream PR (net-6.13-rc4). No conflicts. Adjacent changes: drivers/net/ethernet/renesas/rswitch.h 32fd46f5b69e ("net: renesas: rswitch: remove speed from gwca structure") 922b4b955a03 ("net: renesas: rswitch: rework ts tags management") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-12-19dt-bindings: iommu: qcom,iommu: Add MSM8917 IOMMU to SMMUv1 compatiblesBarnabás Czémán1-0/+1
Add MSM8917 compatible string with "qcom,msm-iommu-v1" as fallback for the MSM8917 IOMMU which is compatible with Qualcomm's secure fw "SMMU v1" implementation. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20241215-msm8917-v9-4-bacaa26f3eef@mainlining.org Signed-off-by: Will Deacon <will@kernel.org>
2024-12-19media: dt-bindings: Add property to describe CSI-2 C-PHY line ordersNiklas Söderlund1-0/+21
Each data lane on a CSI-2 C-PHY bus uses three phase encoding and is constructed from three physical wires. The wires are referred to as A, B and C and their default order is ABC. However to ease hardware design the specification allows for the wires to be switched in any order. Add a vendor neutral property to describe the line order used. The property name 'line-orders', the possible values it can be assigned and there names are taken from the MIPI Discovery and Configuration (DisCo) Specification for Imaging. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2024-12-19media: dt-bindings: sony,imx290: Add IMX462 to the IMX290 bindingDave Stevenson1-0/+2
IMX462 is the successor to IMX290, which is supportable by the existing IMX290 driver via a new compatible string. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2024-12-19dt-bindings: drm/bridge: ti-sn65dsi83: Add properties for ti,lvds-vod-swingAndrej Picej1-2/+32
Add properties which can be used to specify LVDS differential output voltage. Since this also depends on near-end signal termination also include property which sets this. LVDS differential output voltage is specified with an array (min, max), which should match the one from connected device. Signed-off-by: Andrej Picej <andrej.picej@norik.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241216085410.1968634-2-andrej.picej@norik.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20241216085410.1968634-2-andrej.picej@norik.com
2024-12-19dt-bindings: display/xlnx/zynqmp-dpsub: Add audio DMAsTomi Valkeinen1-2/+8
The DP subsystem for ZynqMP supports audio via two channels, and the DP DMA has dma-engines for those channels. For some reason the DT binding has not specified those channels, even if the picture included in xlnx,zynqmp-dpsub.yaml shows "2 x aud" DMAs. This hasn't caused any issues as the drivers have not supported audio, and has thus gone unnoticed. To make it possible to add the audio support to the driver, add the two audio DMAs to the binding. While strictly speaking this is an ABI break, there should be no regressions caused by this as we're adding new entries at the end of the dmas list, and, after the audio support has been added in "arm64: dts: zynqmp: Add DMA for DP audio", the driver will treat the audio DMAs as optional to also support the old bindings. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241023-xilinx-dp-audio-v4-1-5128881457be@ideasonboard.com
generated by cgit v1.2.3 (git 2.39.0) at 2026-06-07 10:12:26 +0300