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2025-02-24dt-bindings: PCI: brcmstb: Update bindings for PCIe on BCM2712Stanimir Varbanov1-1/+5
Update PCIe controller bindings with BCM2712 support. Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Ivan T. Ivanov <iivanov@suse.de> Link: https://lore.kernel.org/r/20250224083559.47645-3-svarbanov@suse.de [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24dt-bindings: interrupt-controller: Add BCM2712 MSI-X bindingsStanimir Varbanov1-0/+60
Add bindings for BCM2712 MSI-X interrupt peripheral controller. Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Ivan T. Ivanov <iivanov@suse.de> Link: https://lore.kernel.org/r/20250224083559.47645-2-svarbanov@suse.de [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24dt-bindings: PCI: qcom-ep: Add SAR2130P compatibleDmitry Baryshkov1-2/+34
Add support for using the PCI controller in the PCIe Endpoint mode on the SAR2130P platform. This is needed, as it is not possible to use a compatible fallback on any other platform since SAR2130P uses slightly different set of clocks. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-5-61a0fdfb75b4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24dt-bindings: PCI: qcom-ep: Consolidate DMA vs non-DMA casesDmitry Baryshkov1-33/+35
On Qualcomm platforms here are two major kinds of PCIe Endpoint controllers: ones which use eDMA and IOMMU and the ones which do not (e.g., SDX55 or SDX65). As such, it doesn't make sense to duplicate similar properties all over the place. Thus, merge these two cases into a single conditional clause. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-4-61a0fdfb75b4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24dt-bindings: PCI: qcom-ep: Enable DMA for SM8450Dmitry Baryshkov1-4/+10
Qualcomm SM8450 platform can (and should) be using DMA for the PCIe Endpoint transfers. Thus, extend the MMIO regions and interrupts in order to acommodate for the DMA resources, mark iommus property as required for the platform. Upstream devicetree doesn't provide support for the Endpoint mode of the PCIe controller, so while this is an ABI break, it doesn't break any of the supported platforms. Fixes: 63e445b746aa ("dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC") Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-3-61a0fdfb75b4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24dt-bindings: PCI: qcom-ep: Describe optional IOMMUDmitry Baryshkov1-0/+6
Some of Qualcomm platforms have an IOMMU unit between the PCIe IP and DDR. For example, the SA8775P specifies the iommu alththough it is not a part of bindings. Thus, change the schema in order to require the IOMMU for SA8775P and forbid it from being used on SDX55 (SM8450 will be handled in a later patch). This fixes the following warning: pcie-ep@1c10000: Unevaluated properties are not allowed ('iommus' was unexpected) Fixes: 9d3d5e75f31c ("dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-2-61a0fdfb75b4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24dt-bindings: PCI: qcom-ep: Describe optional dma-coherent propertyDmitry Baryshkov1-0/+2
Qualcomm SA8775P supports cache coherency on the PCIe Endpoint controller. Thus, allow "dma-coherent" property to be used for this device. This fixes a part of the following error (the second part is fixed in the next commit): pcie-ep@1c10000: Unevaluated properties are not allowed ('dma-coherent', 'iommus' were unexpected) Fixes: 4b220c6fa9f3 ("arm64: dts: qcom: sa8775p: Mark PCIe EP controller as cache coherent") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-1-61a0fdfb75b4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24ASoC: dt-bindings: imx-card: Add playback-only and capture-only propertyShengjiu Wang1-0/+14
Refer to audio graph card, add playback-only and capture-only property for imx-audio-card.yaml for the case that only playback or capture is supported. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250217021715.284951-2-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-24dt-bindings: atmel-sysreg: Add SAMA7D65 Chip IDRyan Wanner1-0/+1
Add compatible string for SAMA7D65 SoC ChipID dt-bindings. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/008e4e49c9fd315cc96a185662b31eca1a64a614.1739555984.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-02-24Merge tag 'v6.14-rc4' of ↵Bartosz Golaszewski16-13/+86
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into HEAD Linux 6.14-rc4
2025-02-23dt-bindings: arm: rockchip: Add Radxa ROCK 4D boardDetlev Casanova1-0/+5
The board is based on the Rockchip rk3576 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Link: https://lore.kernel.org/r/20250218160714.140709-2-detlev.casanova@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-22dt-bindings: iio: Add adis16550 bindingsRobert Budai1-0/+74
Document the ADIS16550 device devicetree bindings. Co-developed-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Co-developed-by: Ramona Gradinariu <ramona.gradinariu@analog.com> Signed-off-by: Ramona Gradinariu <ramona.gradinariu@analog.com> Signed-off-by: Robert Budai <robert.budai@analog.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250217105753.605465-5-robert.budai@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-22dt-bindings: crypto: qcom-qce: Document the X1E80100 crypto engineAbel Vesa1-0/+1
Document the crypto engine on the X1E80100 Platform. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-02-22dt-bindings: rng: add binding for Rockchip RK3588 RNGNicolas Frattaroli1-0/+60
The Rockchip RK3588 SoC has two hardware RNGs accessible to the non-secure world: an RNG in the Crypto IP, and a standalone RNG that is new to this SoC. Add a binding for this new standalone RNG. It is distinct hardware from the existing rockchip,rk3568-rng, and therefore gets its own binding as the two hardware IPs are unrelated other than both being made by the same vendor. The RNG is capable of firing an interrupt when entropy is ready. The reset is optional, as the hardware does a power-on reset, and functions without the software manually resetting it. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-02-22dt-bindings: gpu: mali-bifrost: Add Allwinner H616 compatibleAndre Przywara1-0/+1
The Allwinner H616 SoC has a Mali-G31 MP2 GPU, which is of the Mali Bifrost family. Add the SoC specific compatible string and pair it with the bifrost fallback compatible. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20250221005802.11001-4-andre.przywara@arm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-02-22dt-bindings: trivial-devices: Add ti,tps53681Michal Simek1-0/+2
Describe TI TPS5381 a dual-channel multiphase step-down controller supporting per-phase and per-channel output telemetry. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/26aac15b8f0fdbcc2633d3843e216e6c8d30bb31.1740054443.git.michal.simek@amd.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-02-22dt-bindings: net: Add Realtek MDIO controllerChris Packham2-0/+117
Add dtschema for the MDIO controller found in the RTL9300 Ethernet switch. The controller is slightly unusual in that direct MDIO communication is not possible. We model the MDIO controller with the MDIO buses as child nodes and the PHYs as children of the buses. The mapping of switch port number to MDIO bus/addr requires the ethernet-ports sibling to provide the mapping via the phy-handle property. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250218195216.1034220-4-chris.packham@alliedtelesis.co.nz Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-22dt-bindings: net: Add switch ports and interrupts to RTL9300Chris Packham1-0/+30
Add bindings for the ethernet-switch and interrupt properties for the RTL9300. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250218195216.1034220-3-chris.packham@alliedtelesis.co.nz Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-22dt-bindings: net: Move realtek,rtl9301-switch to netChris Packham1-1/+1
Initially realtek,rtl9301-switch was placed under mfd/ because it had some non-switch related blocks (specifically i2c and reset) but with a bit more review it has become apparent that this was wrong and the binding should live under net/. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Lee Jones <lee@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250218195216.1034220-2-chris.packham@alliedtelesis.co.nz Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-22Merge tag 'soc-fixes-6.14' of ↵Linus Torvalds1-1/+7
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC fixes from Arnd Bergmann: "Two people stepped up as platform co-maintainers: Andrew Jeffery for ASpeed and Janne Grunau for Apple. The rockchip platform gets 9 small fixes for devicetree files, addressing both compile-time warnings and board specific bugs. One bugfix for the optee firmware driver addresses a reboot-time hang. Two drivers need improved Kconfig dependencies to allow wider compile- testing while hiding the drivers on platforms that can't use them. ARM SCMI and loongson-guts drivers get minor bugfixes" * tag 'soc-fixes-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: soc: loongson: loongson2_guts: Add check for devm_kstrdup() tee: optee: Fix supplicant wait loop platform: cznic: CZNIC_PLATFORMS should depend on ARCH_MVEBU firmware: imx: IMX_SCMI_MISC_DRV should depend on ARCH_MXC MAINTAINERS: arm: apple: Add Janne as maintainer MAINTAINERS: Mark Andrew as M: for ASPEED MACHINE SUPPORT firmware: arm_scmi: imx: Correct tx size of scmi_imx_misc_ctrl_set arm64: dts: rockchip: adjust SMMU interrupt type on rk3588 arm64: dts: rockchip: disable IOMMU when running rk3588 in PCIe endpoint mode dt-bindings: rockchip: pmu: Ensure all properties are defined arm64: defconfig: Enable TISCI Interrupt Router and Aggregator arm64: dts: rockchip: Fix lcdpwr_en pin for Cool Pi GenBook arm64: dts: rockchip: fix fixed-regulator renames on rk3399-gru devices arm64: dts: rockchip: Disable DMA for uart5 on px30-ringneck arm64: dts: rockchip: Move uart5 pin configuration to px30 ringneck SoM arm64: dts: rockchip: change eth phy mode to rgmii-id for orangepi r1 plus lts arm64: dts: rockchip: Fix broken tsadc pinctrl names for rk3588
2025-02-21dt-bindings: gpu: mali-bifrost: Add compatible for RZ/V2H(P) SoCLad Prabhakar1-0/+2
Add a compatible string for the Renesas RZ/V2H(P) SoC variants that include a Mali-G31 GPU. These variants share the same restrictions on interrupts, clocks, and power domains as the RZ/G2L SoC, so extend the existing schema validation accordingly. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20250218115922.407816-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-02-21Merge tag 'mtd/fixes-for-6.14-rc4' of ↵Linus Torvalds1-1/+7
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull mtd fixes from Miquel Raynal: "The two most important fixes in this list are probably the SST write failure and the Qcom raw NAND controller probe failure which are due to some refactoring, otherwise there has been a series of misc fixes on the Cadence raw NAND controller driver and especially on the DMA side" * tag 'mtd/fixes-for-6.14-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: mtd: rawnand: cadence: fix unchecked dereference mtd: spi-nor: sst: Fix SST write failure dt-bindings: mtd: cadence: document required clock-names mtd: rawnand: qcom: fix broken config in qcom_param_page_type_exec mtd: rawnand: cadence: fix incorrect device in dma_unmap_single mtd: rawnand: cadence: use dma_map_resource for sdma address mtd: rawnand: cadence: fix error code in cadence_nand_init()
2025-02-21dt-bindings: clock: add clock definitions for Ralink SoCsSergio Paracuellos1-1/+10
Add clock missing definitions for RT2880, RT305X, RT3352, RT3383, RT5350, MT7620 and MT76X8 Ralink SoCs. Update bindings to clarify clock depending on these new introduced constants so consumer nodes can easily use the correct one in DTS files matching properly what is being used in driver code (clock IDs are implicitly used there). Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2025-02-21dt-bindings: arm: coresight-tmc: Add "memory-region" propertyLinu Cherian1-0/+26
memory-region 0: Reserved trace buffer memory TMC ETR: When available, use this reserved memory region for trace data capture. Same region is used for trace data retention after a panic or watchdog reset. TMC ETF: When available, use this reserved memory region for trace data retention synced from internal SRAM after a panic or watchdog reset. memory-region 1: Reserved meta data memory TMC ETR, ETF: When available, use this memory for register snapshot retention synced from hardware registers after a panic or watchdog reset. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250212114918.548431-2-lcherian@marvell.com
2025-02-21dt-bindings: mips: mips-cm: Add a new compatible string for EyeQ6Gregory CLEMENT1-1/+11
The CM3.5 used on EyeQ6 reports that Hardware Cache Initialization is complete, but in reality it's not the case. It also incorrectly indicates that Hardware Cache Initialization is supported. This new compatible string allows warning about this broken feature that cannot be detected at runtime. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2025-02-21dt-bindings: mips: Document mti,mips-cmGregory CLEMENT1-0/+47
Add device tree binding documentation for MIPS Coherence Manager. This component enables support for SMP by providing each processor in the system with a uniform view of memory. The Coherence Manager is responsible for establishing the global ordering of requests from all elements of the system and sending the correct data back to the requester. Based on the work of Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2025-02-21dt-bindings: ata: Convert fsl,pq-sata to YAMLJ. Neuschäfer2-28/+60
Convert the Freescale PowerQUICC SATA controller binding from text form to YAML. The list of compatible strings reflects current usage. To clarify the description, I changed it to mention "each SATA controller" instead of each port. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Link: https://lore.kernel.org/r/20250220-ppcyaml-ata-v3-1-5e727ab86247@posteo.net Signed-off-by: Niklas Cassel <cassel@kernel.org>
2025-02-21dt-bindings: hwinfo: samsung,exynos-chipid: add exynos7870-chipid compatibleKaustabh Chakraborty1-0/+1
Document the compatible string "samsung,exynos7870-chipid". The registers are entirely compatible with "samsung,exynos4210-chipid". Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Link: https://lore.kernel.org/r/20250219-exynos7870-v3-1-e384fb610cad@disroot.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-02-21media: dt-bindings: adv7180: Document the 'interrupts' propertyFabio Estevam1-0/+4
The ADV7180 family of chips have an INTRQ pin that can be connected to a SoC GPIO. Allow the 'interrupts' property to be described to fix the following dt-schema warning: 'interrupt-parent', 'interrupts' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-02-21media: dt-bindings: aspeed,video-engine: Convert to json schemaJammy Huang2-33/+70
Convert aspeed-video.txt to yaml format. Update aspeed-video.txt to aspeed,video-engine.yaml in MAINTAINER file. Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-02-21dt-bindings: media: st,stmipid02: correct lane-polarities maxItemsAlain Volmat1-1/+1
The MIPID02 can use up to 2 data lanes which leads to having a maximum item number of 3 for the lane-polarities since this also contains the clock lane. CC: stable@vger.kernel.org Fixes: c2741cbe7f8a ("dt-bindings: media: st,stmipid02: Convert the text bindings to YAML") Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-02-21dt-bindings: xilinx: Deprecate header with firmware constantsMichal Simek6-15/+8
Firmware contants do not fit the purpose of bindings because they are not independent IDs for abstractions. They are more or less just contants which better to wire via header with DT which is using it. That's why add deprecated message to dt binding header and also update existing dt bindings not to use macros from the header and replace them by it's value. Actually value is not relevant because it is only example. The similar changes have been done by commit 9d9292576810 ("dt-bindings: pinctrl: samsung: deprecate header with register constants"). Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2a6f0229522327939e6893565e540b75f854a37b.1738600745.git.michal.simek@amd.com
2025-02-21dt-bindings: power: supply: axp20x-battery: Add x-powers,no-thermistorChris Morgan1-3/+17
Add the vendor specific boolean property of x-powers,no-thermistor. This property optionally describes hardware where no thermistor is present on the battery and is specific to the AXP717. In rare circumstances this value can be set incorrectly in the efuse of the PMIC, and if it is not hard-coded the device will fail to charge. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250204155835.161973-2-macroalpha82@gmail.com Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2025-02-21dt-bindings: vendor-prefixes: Document the 'pciclass' prefixManivannan Sadhasivam1-1/+1
The "pciclass" is an existing prefix used to identify the PCI bridge devices, but it is not a vendor prefix. So document it in the non-vendor prefix list. Tested-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20250116-pci-pwrctrl-slot-v3-4-827473c8fbf4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-20dt-bindings: trivial-devices: Add ti,tps546b24Michal Simek1-0/+1
Describe TPS546B24 DC-DC converter which is very similar to tps546d24 version. The difference is that B version handles up to 20A. D version up to 40A. Signed-off-by: Michal Simek <michal.simek@amd.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/c79f69d0d37e7eb61f93f5dea69148b7756a3ee5.1740056021.git.michal.simek@amd.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-02-20Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski8-3/+70
Cross-merge networking fixes after downstream PR (net-6.14-rc4). No conflicts or adjacent changes. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-20dt-bindings: mfd: Add maxim,max77705Dzmitry Sankouski1-0/+158
Add maxim,max77705 binding part, containing leds controller and haptics. Charger and fuel gauge are separate device, thus not included. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250123-starqltechn_integration_upstream-v17-2-8b06685b6612@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-02-20dt-bindings: power: supply: add maxim,max77705 chargerDzmitry Sankouski1-0/+50
Add maxim,max77705 charger binding. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20250123-starqltechn_integration_upstream-v17-1-8b06685b6612@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-02-20dt-bindings: leds: qcom-lpg: Document PM8937 PWM compatibleBarnabás Czémán1-0/+4
The PM8937 PWM modules are compatible with the PM8916 PWM modules, document the PM8937 PWM compatible as fallback for the PM8916 PWM. Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250213-pm8937-pwm-v2-1-49ea59801a33@mainlining.org Signed-off-by: Lee Jones <lee@kernel.org>
2025-02-20dt-bindings: leds: backlight: apple,dwi-bl: Add Apple DWI backlightNick Chan1-0/+57
Add backlight controllers attached via Apple DWI 2-wire interface. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: "Daniel Thompson (RISCstar)" <danielt@kernel.org> Signed-off-by: Nick Chan <towinchenmi@gmail.com> Reviewed-by: Neal Gompa <neal@gompa.dev> Link: https://lore.kernel.org/r/20250214040306.16312-2-towinchenmi@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-02-20spi: dt-bindings: Convert Freescale SPI bindings to YAMLJ. Neuschäfer3-62/+139
fsl-spi.txt contains the bindings for the fsl,spi and fsl,espi contollers. Convert them to YAML. Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Link: https://patch.msgid.link/20250220-ppcyaml-spi-v3-1-e340613c7875@posteo.net Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-20Merge tag 'linux-can-next-for-6.15-20250219' of ↵Paolo Abeni2-5/+41
git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next Marc Kleine-Budde says: ==================== pull-request: can-next 2025-02-19 this is a pull request of 12 patches for net-next/master. The first 4 patches are by Krzysztof Kozlowski and simplify the c_can driver's c_can_plat_probe() function. Ciprian Marian Costea contributes 3 patches to add S32G2/S32G3 support to the flexcan driver. Ruffalo Lavoisier's patch removes a duplicated word from the mcp251xfd DT bindings documentation. Oleksij Rempel extends the J1939 documentation. The next patch is by Oliver Hartkopp and adds access for the Remote Request Substitution bit in CAN-XL frames. Henrik Brix Andersen's patch for the gs_usb driver adds support for the CANnectivity firmware. The last patch is by Robin van der Gracht and removes a duplicated setup of RX FIFO in the rockchip_canfd driver. linux-can-next-for-6.15-20250219 * tag 'linux-can-next-for-6.15-20250219' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next: can: rockchip_canfd: rkcanfd_chip_fifo_setup(): remove duplicated setup of RX FIFO can: gs_usb: add VID/PID for the CANnectivity firmware can: canxl: support Remote Request Substitution bit access can: j1939: Extend stack documentation with buffer size behavior dt-binding: can: mcp251xfd: remove duplicate word can: flexcan: add NXP S32G2/S32G3 SoC support can: flexcan: Add quirk to handle separate interrupt lines for mailboxes dt-bindings: can: fsl,flexcan: add S32G2/S32G3 SoC support can: c_can: Use syscon_regmap_lookup_by_phandle_args can: c_can: Use of_property_present() to test existence of DT property can: c_can: Simplify handling syscon error path can: c_can: Drop useless final probe failure message ==================== Link: https://patch.msgid.link/20250219113354.529611-1-mkl@pengutronix.de Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-02-20dt-bindings: net: dsa: b53: add BCM53101 supportClaus Stovgaard1-0/+2
BCM53101 is a ethernet switch, very similar to the BCM53115. Signed-off-by: Claus Stovgaard <claus.stovgaard@prevas.dk> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250217080503.1390282-2-claus.stovgaard@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-20dt-bindings: power: reset: xilinx: Make "interrupts" property optionalShubhrajyoti Datta1-1/+0
The "interrupts" property in the ZynqMP power/reset binding was previously marked as required. However, there are multiple mechanisms for handling power/reset events, including: -Event management registration, -Mailbox (mboxes), -Interrupts (interrupts). When event management support is available (default on Versal SoC), the "interrupts" property is not used hence not required. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20250217095226.12606-1-shubhrajyoti.datta@amd.com Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2025-02-20dt-bindings: power: reset: atmel,sama5d2-shdwc: Add microchip,sama7d65-shdwcRyan Wanner1-0/+5
Add SAMA7D65 SHDWC compatible to DT bindings documentation Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/f7d7e5fdaa86c61e586978dfc11014cb45c32cd7.1739221064.git.Ryan.Wanner@microchip.com Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2025-02-20dt-bindings: input: touchscreen: Add Z2 controllerSasha Finkelstein1-0/+70
Add bindings for touchscreen controllers attached using the Z2 protocol. Those are present in most Apple devices. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neal Gompa <neal@gompa.dev> Signed-off-by: Sasha Finkelstein <fnkl.kernel@gmail.com> Link: https://lore.kernel.org/r/20250217-z2-v6-1-c2115d6e5a8f@gmail.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-02-19ASoC: dt-bindings: atmel-at91sam9g20ek: convert to json-schemaBalakrishnan Sambath2-26/+72
Convert atmel-at91sam9g20ek-wm8731-audio DT binding to yaml based json-schema.Change file name to match json-scheme naming. Signed-off-by: Balakrishnan Sambath <balakrishnan.s@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250219-sound-atmel-at91sam9g20ek-v3-1-d7c082af4e14@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-19dt-bindings: usb: samsung,exynos-dwc3 Add exynos990 compatibleIgor Belwon1-6/+10
Add a compatible for the exynos990-dwusb3 node. It's compatible with the exynos850 variant when using the highspeed mode. Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250217-exynos990-bindings-usb3-v2-1-3b3f0809f4fb@mentallysanemainliners.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-02-19USB: docs: Fix typo in aspeed-lpc.yamlSuraj Patil1-1/+1
Correct 'Tehchnology' to 'Technology' in the copyright line. Signed-off-by: Suraj Patil <surajpatil522@gmail.com> Link: https://lore.kernel.org/r/20250216001609.106616-1-surajpatil522@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-02-19dt-bindings: usb: usb-device: Replace free-form 'reg' with constraintsKrzysztof Kozlowski1-2/+4
Replace free-form text of 'reg' property with proper constraints so incorrect values can be actually reported. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250214114235.49476-1-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
generated by cgit v1.2.3 (git 2.39.0) at 2026-06-06 14:29:38 +0300