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2025-07-16dt-bindings: nvmem: convert lpc1857-eeprom.txt to yaml formatFrank Li2-28/+61
Convert lpc1857-eeprom.txt to yaml format. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://lore.kernel.org/r/20250712181905.6738-5-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-16dt-bindings: nvmem: fixed-layout: Allow optional bit positionsSven Peter1-1/+1
NVMEM nodes can optionally include the bits property to specify the bit position of the cell within a byte. Extend patternProperties to allow adding the bit offset to the node address to be able to distinguish nodes with the same address but different bit positions, e.g. trim@54,4 { reg = <0x54 1>; bits = <4 2>; }; trim@54,0 { reg = <0x54 1>; bits = <0 4>; }; Before the conversion to NVMEM layouts in commit bd912c991d2e ("dt-bindings: nvmem: layouts: add fixed-layout") this extension was originally added with commit 4b2545dd19ed ("dt-bindings: nvmem: Extend patternProperties to optionally indicate bit position") to the now deprecated layout. Signed-off-by: Sven Peter <sven@kernel.org> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://lore.kernel.org/r/20250712181905.6738-3-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-16ASoC: dt-bindings: qcom,lpass-va-macro: Define clock-names in top-levelKrzysztof Kozlowski1-16/+12
Device variants use different amount of clock inputs, but all of them are in the same order, 'clock-names' in top-level properties can define the list and each if:then: block can only narrow the number of items. This is preferred syntax, because it keeps list unified among devices and encourages adding new entries to the end of the list, instead of adding them in the middle. The change has no functional impact, but partially reverts approach implemented in commit cfad817095e1 ("ASoC: dt-bindings: qcom,lpass-va-macro: Add missing NPL clock"). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250716074957.102402-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-16dt-bindings: display: Add Sitronix ST7567 LCD ControllerJavier Martinez Canillas1-0/+63
Sitronix ST7567 is a monochrome Dot Matrix LCD Controller. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Marcus Folkesson <marcus.folkesson@gmail.com> Link: https://lore.kernel.org/r/20250715110411.448343-5-javierm@redhat.com Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
2025-07-16dt-bindings: soc: samsung: exynos-sysreg: add hsi2 for ExynosAutov920Sowon Na1-0/+1
Add hsi2 compatible for ExynosAutov920 ufs shareability register to set io coherency of the ExynosAutov920 ufs. Signed-off-by: Sowon Na <sowon.na@samsung.com> Link: https://lore.kernel.org/r/20250702013316.2837427-4-sowon.na@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-07-16spi: dt-bindings: spi-mux: Drop "spi-max-frequency" as requiredRob Herring (Arm)1-1/+0
There's little reason to require the SPI mux to define a maximum bus frequency as the muxing is just the chip select and devices still define their maximum freq. In fact, several users don't set "spi-max-frequency" which caused warnings. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Link: https://patch.msgid.link/20250715202711.1882103-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-15dt-bindings: PCI: qcom: Move PHY & reset GPIO to Root Port nodeKrishna Chaitanya Chundru2-6/+42
Move the phys, phy-names, reset-gpios properties to the PCIe Root Port node from Host Bridge node, as agreed upon here [1]. Update the qcom,pcie-common.yaml to include the 'phys' property in the Root Port node. 'phy-names' property is not needed in Root Port since each Root Port supports only one PHY. Also, there is already 'reset-gpios' property defined for PERST# in pci-bus-common.yaml, so use that property instead of 'perst-gpios'. For backward compatibility, do not remove any existing properties in the bridge node, but mark them as 'deprecated' instead. [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/ Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> [mani: commit message rewording] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250702-perst-v5-1-920b3d1f6ee1@qti.qualcomm.com
2025-07-15dt-bindings: PCI: qcom,pcie-sa8255p: Document ECAM compliant PCIe root complexMayank Rana1-0/+122
Document the required configuration to enable the PCIe Root Complex on SA8255p, which is managed by firmware using power-domain based handling and configured as ECAM compliant. Signed-off-by: Mayank Rana <mayank.rana@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> [bhelgaas: add "ECAM" in reg description] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250616224259.3549811-4-mayank.rana@oss.qualcomm.com
2025-07-15dt-bindings: usb: convert lpc32xx-udc.txt to yaml formatFrank Li2-28/+50
Convert lpc32xx-udc.txt to yaml format. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250623203011.2473290-1-Frank.Li@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-15dt-bindings: display: panel: samsung,atna30dw01: document ATNA30DW01Dale Whinham1-0/+2
The Samsung ATNA30DW01 panel is a 13" AMOLED eDP panel. It is similar to the ATNA33XC20 except that it is smaller and has a higher resolution. Tested-by: Jérôme de Bretagne <jerome.debretagne@gmail.com> Signed-off-by: Dale Whinham <daleyo@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20250714173554.14223-3-daleyo@gmail.com
2025-07-15Merge branch 'dt' of ↵Chen-Yu Tsai7-3/+16
git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm into sunxi/dt-for-6.17 Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-07-15dt-bindings: mmc: sdhci-msm: document the Milos SDHCI ControllerLuca Weiss1-0/+1
Document the SDHCI Controller on the Milos SoC. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250713-sm7635-fp6-initial-v2-10-e8f9a789505b@fairphone.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-07-15dt-bindings: power: Add A523 PPU and PCK600 power controllersChen-Yu Tsai1-1/+3
The A523 PPU is likely the same kind of hardware seen on previous SoCs. The A523 PCK600, as the name suggests, is likely a customized version of ARM's PCK-600 power controller. Comparing the BSP driver against ARM's PPU datasheet shows that the basic registers line up, but Allwinner's hardware has some additional delay controls in the reserved register range. As such it is likely not fully compatible with the standard ARM version. Document A523 PPU and PCK600 compatibles. Also reorder the compatible string entries so they are grouped and ordered by family first, then by SoC model. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20250712074021.805953-2-wens@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-07-15dt-bindings: display: rockchip,dw-mipi-dsi: Drop address/size cellsDiederik de Haas1-6/+0
The "rockchip,dw-mipi-dsi" binding has allOf "snps,dw-mipi-dsi.yaml" which has allOf "dsi-controller.yaml", which already has #address-cells and #size-cells defined as '1' and '0' respectively. So drop this re-definition. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250709132323.128757-4-didi.debian@cknow.org
2025-07-15dt-bindings: arm-smmu: document the support on MilosLuca Weiss1-0/+3
Add compatible for smmu representing support on the Milos SoC. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250713-sm7635-fp6-initial-v2-1-e8f9a789505b@fairphone.com Signed-off-by: Will Deacon <will@kernel.org>
2025-07-15dt-bindings: interrupt-controller: Convert apm,xgene1-msi to DT schemaRob Herring (Arm)2-68/+54
Convert the Applied Micro X-Gene MSI controller binding to DT schema format. MSI controllers go in interrupt-controller directory so move the schema there. Link: https://lore.kernel.org/r/20250710180757.2970583-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-07-15dt-bindings: gpu: mali-bifrost: Add Allwinner A523 compatibleMikhail Kalashnikov1-0/+1
Add a compatible for the Allwinner A523 SoC, with an integrated ARM Mali G57 MC1 (Valhall-JM) GPU. Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com> Link: https://lore.kernel.org/r/20250711035730.17507-2-iuncuim@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-07-15docs: dt: writing-schema: Document preferred order of propertiesKrzysztof Kozlowski1-0/+3
Document established Devicetree bindings maintainers review practice: using DTS coding style property order in both 'properties' and 'required' secions. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250713-dt-bindings-docs-v2-4-672c898054ae@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-07-15docs: dt: writing-bindings: Document discouraged instance IDsKrzysztof Kozlowski1-0/+5
Document established Devicetree bindings maintainers review practice: instance indexes, either as properties or as custom new OF alias, are not accepted. Recommended way is to use, depending on the situation/hardware: different compatible, cell arguments or syscon phandle arguments. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250713-dt-bindings-docs-v2-3-672c898054ae@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-07-15docs: dt: writing-bindings: Document compatible and filename namingKrzysztof Kozlowski1-0/+8
Document established Devicetree bindings maintainers review practices: 1. Compatibles should not use bus suffixes to encode the type of interface, because the parent bus node defines that interface, e.g. "vendor,device" instead of "vendor,device-i2c" + "vendor,device-spi". 2. If the compatible represents the device as a whole, it should not contain the type of device in the name. 3. Filenames should match compatible. The best if match is 100%, but if binding has multiple compatibles, then one of the fallbacks should be used. Alternatively a genericish name is allowed if it follows "vendor,device" style. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250713-dt-bindings-docs-v2-2-672c898054ae@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-07-15docs: dt: submitting-patches: Avoid 'YAML' in the subject and add an exampleKrzysztof Kozlowski1-2/+10
Patches adding new device bindings should avoid 'YAML' keyword in the subject, because all bindings are supposed to be in DT schema format, which uses YAML. The DT schema is welcomed only in case of patches doing conversion. Effectively people get confused that subject should not contain anything else than device name after the prefix, so add two recommended examples. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250713-dt-bindings-docs-v2-1-672c898054ae@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-07-14dt-bindings: iio: proximity: Add Nicera D3-323-AA PIR sensorWaqar Hameed1-0/+62
Nicera D3-323-AA is a PIR sensor for human detection. It has two GPIOs for detection and data communication. Signed-off-by: Waqar Hameed <waqar.hameed@axis.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/19a2744cebaee57fe5349986094168524baa9838.1751636734.git.waqar.hameed@axis.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14dt-bindings: vendor-prefixes: Add NiceraWaqar Hameed1-0/+2
Nicera (Nippon Ceramic Co.) is a manufacturer of a wide range of sensors. For example infrared, ultrasonic, gas sensors and much more. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Waqar Hameed <waqar.hameed@axis.com> Link: https://patch.msgid.link/b52e82aa312a52c03d2b6c58cf329884d1829d29.1751636734.git.waqar.hameed@axis.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14dt-bindings: iio: adc: Add support for MT7981Aleksander Jan Bajkowski1-0/+4
The temperature sensor in the MT7981 is same as in the MT7986. Add compatible string for mt7981. Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250708220405.1072393-2-olek2@wp.pl Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14dt-bindings: iio: adc: Add AD4170-4Marcelo Schmitt1-0/+554
Add device tree documentation for AD4170-4 and similar sigma-delta ADCs. The AD4170-4 is a 24-bit, multichannel, sigma-delta ADC. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/aa4b3be541c7b759560f8e0c5340a456cb2f3801.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14dt-bindings: pinctrl: stm32: Introduce HDPClément Le Goffic1-0/+187
'HDP' stands for Hardware Debug Port, it is an hardware block in STMicrolectronics' MPUs that let the user decide which internal SoC's signal to observe. It provides 8 ports and for each port there is up to 16 different signals that can be output. Signals are different for each MPU. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Link: https://lore.kernel.org/20250711-hdp-upstream-v7-1-faeecf7aaee1@foss.st.com [Fixed up Clement's new email address] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-07-14Add RPMh regulator support for PM7550 & PMR735BMark Brown13-27/+96
Merge series from Luca Weiss <luca.weiss@fairphone.com>: Document and add support for the regulators on PM7550 and PMR735B, which can be paired with the Milos SoC.
2025-07-14ASoC: codec: Convert to GPIO descriptors forMark Brown2-1/+4
Merge series from Peng Fan <peng.fan@nxp.com>: This patchset is a pick up of patch 1,2 from [1]. And I also collect Linus's R-b for patch 2. After this patchset, there is only one user of of_gpio.h left in sound driver(pxa2xx-ac97). of_gpio.h is deprecated, update the driver to use GPIO descriptors. Patch 1 is to drop legacy platform data which in-tree no users are using it Patch 2 is to convert to GPIO descriptors Checking the DTS that use the device, all are using GPIOD_ACTIVE_LOW polarity for reset-gpios, so all should work as expected with this patch. [1] https://lore.kernel.org/all/20250408-asoc-gpio-v1-0-c0db9d3fd6e9@nxp.com/
2025-07-14regulator: dt-bindings: qcom,rpmh: Add PMR735B compatibleLuca Weiss1-0/+14
Add the PMR735B compatible for the regulators in the PMIC found with the Milos SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://patch.msgid.link/20250711-pm7550-pmr735b-rpmh-regs-v2-2-bca8cc15c199@fairphone.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-14regulator: dt-bindings: qcom,rpmh: Add PM7550 compatibleLuca Weiss1-0/+21
Add the PM7550 compatible for the regulators in the PMIC found with the Milos SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://patch.msgid.link/20250711-pm7550-pmr735b-rpmh-regs-v2-1-bca8cc15c199@fairphone.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-13Merge tag 'clk-fixes-for-linus' of ↵Linus Torvalds1-0/+3
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Fixes for a few clk drivers and bindings: - Add a missing property to the Mediatek MT8188 clk binding to keep binding checks happy - Avoid an OOB by setting the correct number of parents in dispmix_csr_clk_dev_data - Allocate clk_hw structs early in probe to avoid an ordering issue where clk_parent_data points to an unallocated clk_hw when the child clk is registered before the parent clk in the SCMI clk driver * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: dt-bindings: clock: mediatek: Add #reset-cells property for MT8188 clk: imx: Fix an out-of-bounds access in dispmix_csr_clk_dev_data clk: scmi: Handle case where child clocks are initialized before their parents
2025-07-13dt-bindings: iio: adc: mt6359: Add MT6373 PMIC AuxADCAngeloGioacchino Del Regno1-0/+1
Add a compatible and channel bindings for MediaTek's MT6373 PMIC, featuring an Auxiliary ADC IP with 15 ADC channels for external (SoC) temperatures and external voltage inputs. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250703141146.171431-3-angelogioacchino.delregno@collabora.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13dt-bindings: iio: adc: mt6359: Add MT6363 PMIC AuxADCAngeloGioacchino Del Regno1-0/+1
Add a compatible and channel bindings for MediaTek's MT6363 PMIC, featuring an Auxiliary ADC IP with 15 ADC channels used for both internal temperatures and voltages and for external voltage inputs. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250703141146.171431-2-angelogioacchino.delregno@collabora.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-12media: dt-bindings: rockchip: Add RK3576 Video Decoder bindingsDetlev Casanova1-1/+4
The video decoder in RK3576 (vdpu383) is described the same way as the one in RK3588 (vdpu381). A new compatible is added as the driver implementation will be different. Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-07-12media: dt-bindings: rockchip: Document RK3588 Video Decoder bindingsDetlev Casanova1-3/+74
Document the Rockchip RK3588 Video Decoder bindings. Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-07-11dt-bindings: pinctrl: document the Milos Top Level Mode MultiplexerLuca Weiss1-0/+133
Document the Top Level Mode Multiplexer on the Milos Platform. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250702-sm7635-pinctrl-v2-1-c138624b9924@fairphone.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-07-11dt-bindings: pinctrl: qcom,pmic-gpio: Add PM7550 supportLuca Weiss1-0/+2
Update the Qualcomm Technologies, Inc. PMIC GPIO binding documentation to include the compatible string for the PM7550 PMICs. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250709-sm7635-pmxr2230-v2-3-09777dab0a95@fairphone.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-07-11dt-bindings: pinctrl: qcom,pmic-gpio: Add PMIV0104 supportLuca Weiss1-0/+2
Update the Qualcomm Technologies, Inc. PMIC GPIO binding documentation to include the compatible string for the PMIV0104 PMICs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/20250709-sm7635-pmiv0104-v2-2-ebf18895edd6@fairphone.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-07-11dt-bindings: arm: tegra: Add Asus Portable AiO P1801-TMaxim Schwalm1-0/+4
Add a compatible for the Asus Portable AiO P1801-T. Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250616073947.13675-2-clamor95@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11dt-bindings: arm: tegra: Add Asus VivoTab RT TF600TMaxim Schwalm1-0/+4
Add a compatible for the Asus VivoTab RT TF600T. Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250617070320.9153-2-clamor95@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11dt-bindings: tegra: Document P3971-0089+P3834-0008 PlatformThierry Reding1-0/+5
This is an engineering reference platform for the Tegra264 SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250507143802.1230919-4-thierry.reding@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11dt-bindings: rtc: tegra: Document Tegra264 RTCThierry Reding1-0/+1
Add the compatible string for the RTC block found on the Tegra264 SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250507143802.1230919-3-thierry.reding@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11dt-bindings: dma: Add Tegra264 compatible stringThierry Reding1-0/+1
Document the compatible string used for the GPCDMA controller on Tegra264. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250507143802.1230919-2-thierry.reding@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11dt-bindings: misc: Document Tegra264 APBMISC compatibleThierry Reding1-0/+1
Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506133118.1011777-6-thierry.reding@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11dt-bindings: firmware: Document Tegra264 BPMPThierry Reding1-0/+1
While the BPMP found on Tegra264 is similar to the versions found on previous chips and should be backwards-compatible, some changes could eventually be needed. Anticipate such changes and introduce a chip- specific compatible string. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506133118.1011777-5-thierry.reding@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11dt-bindings: mailbox: tegra-hsp: Properly sort compatible string listThierry Reding1-3/+4
Device tree maintainers prefer all single entry cases to be grouped under an enum. Furthermore, alphanumeric ordering is easier for the majority of people to understand than ordering by release, which is quirky. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506133118.1011777-4-thierry.reding@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11dt-bindings: mailbox: tegra-hsp: Bump number of shared interruptsThierry Reding1-1/+20
It turns out that some instances of the HSP block on Tegra264 can have up to 16 shared interrupts, so bump the maximum number of allowed interrupts. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506133118.1011777-3-thierry.reding@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11dt-bindings: memory: tegra: Add Tegra264 supportSumit Gupta1-2/+82
Add bindings for the Memory Controller (MC) and External Memory Controller (EMC) found on the Tegra264 SoC. Tegra264 SoC has a different number of interrupt lines for MC sub-units: UCF_SOC, hub, hub common, syncpoint and MC channel. The total number of interrupt lines is eight. Update maxItems for MC interrupts accordingly. This also adds a header containing the memory client ID definitions that are used by the interconnects property in DT and the tegra_mc_client table in the MC driver. These IDs are defined by the hardware, so the numbering doesn't start at 0 and contains holes. Also added are the stream IDs for various hardware blocks found on Tegra264. These are allocated as blocks of 256 IDs and each block can be subdivided for additional fine-grained isolation if needed. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> [treding@nvidia.com: add SMMU stream IDs, squash patches] Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250709222147.3758356-2-thierry.reding@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11dt-bindings: tegra: pmc: Add Tegra264 compatibleThierry Reding1-0/+1
The PMC found on Tegra264 is similar to the version in earlier chips but some of the register offsets and bitfields differ, so add a specific compatible string for this new generation. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250506133118.1011777-2-thierry.reding@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 boardJohn Clark1-0/+6
Add device tree documentation for rk3576-nanopi-m5 Signed-off-by: John Clark <inindev@gmail.com> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250628143229.74460-2-inindev@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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