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2025-08-19Handle shared reset GPIO for WSA883x speakersMark Brown2-3/+14
Merge series from Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>: On some Qualcomm platforms such as QCS6490-RB3Gen2, the multiple WSA8830/WSA8835 speakers share a common reset (shutdown) GPIO. To handle such cases, use the reset controller framework along with the "reset-gpio" driver. Tested on: - QCS6490-RB3Gen2
2025-08-19dt-bindings: PCI: mediatek-gen3: Add support for MT6991/MT8196AngeloGioacchino Del Regno1-0/+35
Add compatible strings for MT8196 and MT6991 (which are fully compatible between each other) and clock definitions. These new SoCs don't have tl_96m and tl_32k clocks, but need an AHB to APB bus clock and a low power clock. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> [mani: changed 'maxItems' to 'minItems' for reset] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250703120847.121826-3-angelogioacchino.delregno@collabora.com
2025-08-19dt-bindings: power: mediatek: Document access-controllers propertyAngeloGioacchino Del Regno1-0/+37
Allow specifying access-controllers in the main power controller node and deprecate the old mediatek,infracfg, mediatek,infracfg-nao and mediatek,smi properties located in the children. This is done in order to both simplify the power controller nodes and in preparation for adding support for new generation SoCs like MT8196/MT6991 and other variants, which will need to set protection on new busses. Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250805074746.29457-4-angelogioacchino.delregno@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-08-19dt-bindings: pinctrl: Document Tegra186 pin controllersAaron Kling1-0/+285
Tegra186 contains two pin controllers. Document their compatible strings and describe the list of pins and functions that they provide. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Aaron Kling <webgeek1234@gmail.com> Link: https://lore.kernel.org/20250812-tegra186-pinctrl-v3-1-115714eeecb1@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-19dt-bindings: eeprom: Add ST M24LR supportAbd-Alrhman Masalkhi1-0/+52
Add support for STMicroelectronics M24LR RFID/NFC EEPROM chips. These devices use two I2C addresses: the primary address provides access to control and system parameter registers, while the secondary address is used for EEPROM access. Signed-off-by: Abd-Alrhman Masalkhi <abd.masalkhi@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250717063934.5083-2-abd.masalkhi@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-19dt-bindings: soc: imx-blk-ctrl: add i.MX91 blk-ctrl compatibleJoy Zou1-12/+47
Add new compatible string "fsl,imx91-media-blk-ctrl" for i.MX91, which has different input clocks compared to i.MX93. Update the clock-names list and handle it in the if-else branch accordingly. Keep the same restriction for the existed compatible strings. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Joy Zou <joy.zou@nxp.com> Link: https://lore.kernel.org/r/20250806114119.1948624-3-joy.zou@nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-08-19dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the SM8750 QMP PCIe ↵Krishna Chaitanya Chundru1-0/+2
PHY Gen3 x2 Document the QMP PCIe PHY on the SM8750 platform. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250809-pakala-v1-1-abf1c416dbaa@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-19dt-bindings: net: realtek,rtl82xx: document wakeup-source propertyRussell King (Oracle)1-1/+5
The RTL8211F PHY has two modes for a single INTB/PMEB pin: 1. INTB mode, where it signals interrupts to the CPU, which can include wake-on-LAN events. 2. PMEB mode, where it only signals a wake-on-LAN event, which may either be a latched logic low until software manually clears the WoL state, or pulsed mode. In the case of (1), there is no way to know whether the interrupt to which the PHY is connected is capable of waking the system. In the case of (2), there would be no interrupt property in the PHY's DT description, and thus there is nothing to describe whether the pin is even wired to anything such as a power management controller. There is a "wakeup-source" property which can be applied to any device - see Documentation/devicetree/bindings/power/wakeup-source.txt Case 1 above matches example 2 in this document, and case 2 above matches example 3. Therefore, it seems reasonable to make use of this existing specification, albiet it hasn't been converted to YAML. Document the wakeup-source property in the device description, which will indicate that the PHY has been wired up in such a way that it can wake the system from a low power state. We will use this in a rewrite of the existing broken Wake-on-Lan code that was merged during the 6.16 merge window to support case 1. Case 2 can be added to the driver later without needing to further alter the DT description. To be clear, the existing Wake-on-Lan code that was recently merged has multiple functional issues. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/E1um9Xj-008kBx-72@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-08-19Merge tag 'drm-misc-next-2025-08-14' of ↵Dave Airlie7-0/+481
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next drm-misc-next for v6.18: UAPI Changes: - Add DRM_IOCTL_GEM_CHANGE_HANDLE for reassigning GEM handles - Document DRM_MODE_PAGE_FLIP_EVENT Cross-subsystem Changes: fbcon: - Add missing declarations in fbcon.h Core Changes: bridge: - Fix ref counting panel: - Replace and remove mipi_dsi_generic_write_{seq/_chatty}() sched: - Fixes Rust: - Drop Opaque<> from ioctl arguments Driver Changes: amdxdma: - Support buffers allocated by user space - Streamline PM interfaces - Fixes bridge: - cdns-dsi: Various improvements to mode setting - Support Solomon SSD2825 plus DT bindings - Support Waveshare DSI2DPI plus DT bindings gud: - Fixes ivpu: - Fixes nouveau: - Use GSP firmware by default - Fixes panel: - panel-edp: Support mt8189 Chromebooks; Support BOE NV140WUM-N64; Support SHP LQ134Z1; Fixes - panel-simple: Support Olimex LCD-OLinuXino-5CTS plus DT bindings - Support Samsung AMS561RA01 - Support Hydis HV101HD1 plus DT bindings panthor: - Print task/pid on errors - Fixes renesas: - convert to RUNTIME_PM_OPS repaper: - Use shadow-plane helpers rocket: - Add driver for Rockchip NPU plus DT bindings sharp-memory: - Use shadow-plane helpers simpledrm: - Use of_reserved_mem_region_to_resource() helper tidss: - Use crtc_ fields for programming display mode - Remove other drivers from aperture v3d: - Support querying nubmer of GPU resets for KHR_robustness vmwgfx: - Fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://lore.kernel.org/r/20250814072454.GA18104@linux.fritz.box
2025-08-18dt-bindings: iio: adc: Add BD7910[0,1,2,3]Matti Vaittinen1-1/+9
The ROHM BD79100, BD79101, BD79102, BD79103 are very similar ADCs as the ROHM BD79104. The BD79100 has only 1 channel. BD79101 has 2 channels and the BD79102 has 4 channels. Both BD79103 and BD79104 have 4 channels, and, based on the data sheets, they seem identical from the software point-of-view. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/0874c5933cf56430b9440d19ff46f746e4897952.1755504346.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-18spi: offload-trigger: followupMark Brown1-2/+4
Merge series from David Lechner <dlechner@baylibre.com>: This cleans up a few loose ends from the series that added the ADI Util Sigma-Delta SPI driver [1]. [1]: https://lore.kernel.org/linux-spi/20250701-iio-adc-ad7173-add-spi-offload-support-v3-0-42abb83e3dac@baylibre.com/
2025-08-18ASoC: dt-bindings: qcom,wsa8830: Add reset-gpios for shared lineMohammad Rafi Shaik1-1/+10
On Qualcomm platforms such as QCS6490-RB3Gen2, the WSA883x speaker amplifiers share the SD_N GPIO line between two speakers, thus requires coordinated control when asserting the GPIO. Linux supports shared GPIO handling via the "reset-gpios" property, which can be used to specify either the powerdown or reset GPIOs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Link: https://patch.msgid.link/20250815172353.2430981-2-mohammad.rafi.shaik@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-18dt-bindings: pinctrl: mediatek: mt8183: Allow gpio-line-namesJulien Massot1-0/+2
Add support for the 'gpio-line-names' property in the MT8183 pinctrl binding. This allows naming the GPIOs, which is already done in several device trees (e.g. mt8183-kukui-jacuzzi.dtsi, mt8183-kukui-kakadu.dtsi, mt8183-kukui-krane.dtsi), but was previously generating DT schema warnings. Signed-off-by: Julien Massot <julien.massot@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250801-mtk-dtb-warnings-v1-7-6ba4e432427b@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-18dt-bindings: arm: sti: drop B2120 board supportRaphael Gallais-Pou1-4/+0
B2120 boards are internal boards which never were commercialised. Remove them from bindings. Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-08-18dt-bindings: mmc: fsl,esdhc: Add explicit reference to mmc-controller-commonAlexander Stein1-0/+1
Even though it is referenced by mmc/mmc-controller.yaml it still raises the warning: esdhc@1560000 (fsl,ls1021a-esdhc): Unevaluated properties are not allowed ('bus-width' was unexpected) Adding an explicit reference fixes this. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250725060152.262094-1-alexander.stein@ew.tq-group.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-08-16dt-bindings: iio: Replace bouncing Analog emailsKrzysztof Kozlowski7-7/+12
Emails to stefan.popa@analog.com and alexandru.tachici@analog.com bounce permanently: Remote Server returned '550 5.1.10 RESOLVER.ADR.RecipientNotFound; Recipient not found by SMTP address lookup' so replace them with Marcelo Schmitt and Nuno Sá (listed alphabetically by first name) from Analog where appropriate. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Nuno Sá <nuno.sa@analog.com> Acked-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/20250812132445.75398-2-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: adc: ad7476: Add ROHM bd79105Matti Vaittinen1-0/+52
The ROHM BD79105 is a simple, 16-bit, 1-channel ADC with a 'CONVSTART' pin used to start the ADC conversion. Other than the 'CONVSTART', there are 3 supply pins (one used as a reference), analog inputs, ground and communication pins. It's worth noting that the pin somewhat confusingly labeled as 'DIN', is a pin which should be used as a chip-select. The IC does not have any writable registers. The device is designed so that the output pin can, in addition to outputting the data, be used as a 'data-ready'-IRQ. There are cases where the IRQ can't be used (because it is delivered via SPI data-line). Hence, some systems may use a GPIO for polling the data readiness. Add a compatible for the bd79105 and add the data-ready GPIO to the binding. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/3f70f68665225be3091f8a0412e74037b6a2a88e.1754901948.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: adc: ad7476: Drop redundant prop: trueMatti Vaittinen1-30/+24
The ad7476 supports a few variants with different power-supplies and control GPIOs. The binding first unconditionally introduces all the properties, and later sets them 'true' or 'false' based on the combatible. The 'true' seems to be implied by the initial property introduction so the 'true' -branches in later conditional handling (based on the compatible) can be omitted. Drop the redundant true -branches. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/bee66444bf628ba9a34a02738a1842e2abc14290.1754901948.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: light: veml6046x00: add color sensorAndreas Klinger1-0/+51
Add a new compatible for Vishay high accuracy RGBIR color sensor veml6046x00. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Andreas Klinger <ak@it-klinger.de> Link: https://patch.msgid.link/20250728075447.338725-2-ak@it-klinger.de Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: pressure: add invensense,icp10100Rodrigo Gobbi1-0/+52
There is no txt file for it, add yaml for invensense,icp10100 which is already used in the driver. Also, document other compatibles for ICP-101xx family and add invensense,icp10100 as a fallback. Acked-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com> Signed-off-by: Rodrigo Gobbi <rodrigo.gobbi.7@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250801221424.132305-1-rodrigo.gobbi.7@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: light: Simplify interrupts property in the exampleKrzysztof Kozlowski2-2/+2
dynaimage,al3010 and dynaimage,al3320a are I2C devices, so their interrupts are not routed to GIC and rarely first interrupt cell is <0>. This looks like copy-paste from some SoC block, so drop it and also for readability use known defines instead of hard-coding interrupt flag. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: David Heidelberg <david@ixit.cz> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250724111345.47889-8-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: adc: samsung,exynos-adc: Use correct IRQ level in exampleKrzysztof Kozlowski1-2/+5
The interrupt line to GIC is IRQ_TYPE_LEVEL_HIGH, so use that instead of "none". Also replace the hard-coded GIC_SPI flag. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250724111345.47889-7-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: adc: Replace hard-coded GPIO/IRQ flag with a defineKrzysztof Kozlowski2-2/+2
For readability use known defines instead of hard-coding GPIO or interrupt flag. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://patch.msgid.link/20250724111345.47889-6-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: Drop unused header includes in examplesKrzysztof Kozlowski20-26/+0
Drop includes of headers which example code does not use. No functional impact. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: David Heidelberg <david@ixit.cz> Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250724111345.47889-5-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: adc: rockchip-saradc: Allow use of a power-domainJonas Karlman1-0/+3
The SARADC controller in most Rockchip SoCs are part of power domains that are always powered on, i.e. PD_BUS or PD_PERI. These always powered on power domains have typically not been described in the device tree. Because these power domains have been left out of the device tree there has not been any real need to properly describe the power domain of the SARADC controller. On RK3528 the SARADC controller is part of the PD_VPU power domain. Add support to describe an optional power-domains for the SARADC controller in Rockchip SoCs. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250723085654.2273324-4-jonas@kwiboo.se Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: powerpc: Drop duplicate fsl/mpic.txtRob Herring (Arm)2-232/+16
The chrp,open-pic binding schema already supports the "fsl,mpic" compatible. Add a couple of missing properties and support for 4 "#interrupt-cells" to the chrp,open-pic binding, so fsl/mpic.txt can be removed. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250814135157.2747346-2-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-16dt-bindings: perf: Convert apm,xgene-pmu to DT schemaRob Herring (Arm)2-112/+142
Convert the Applied Micro X-Gene PMU binding to DT schema format. It is a straightforward conversion. Link: https://lore.kernel.org/r/20250812181422.68286-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-16dt-bindings: arm: Convert marvell,berlin to DT schemaRob Herring (Arm)2-89/+45
Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Link: https://lore.kernel.org/r/20250806212733.1633662-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-16dt-bindings: arm: cpus: Add edac-enabled propertySascha Hauer1-0/+17
Some ARM Cortex CPUs including A72 have Error Detection And Correction (EDAC) support on their L1 and L2 caches. That functionality is in implementation defined registers, so using it is not safe in virtualized environments or when EL3 already uses these registers. Add a edac-enabled flag which can be explicitly set when EDAC can be used. [ bp: Massage commit message. ] Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vijay Balakrishna <vijayb@linux.microsoft.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/1752714390-27389-3-git-send-email-vijayb@linux.microsoft.com
2025-08-15scsi: ufs: qcom: dt-bindings: Split SM8650 and similarKrzysztof Kozlowski2-32/+178
The binding for Qualcomm SoC UFS controllers grew and it will grow further. Split SM8650 and SM8750 UFS controllers which: 1. Do not reference ICE as IO address space, but as phandle, 2. Have same order of clocks. 3. Have MCQ I/O address space. Document that MCQ address space as optional to maintain backwards compatibility and because Linux drivers can operate perfectly fine without it (thus without MCQ feature). Linux driver already uses "mcq" as possible name for "reg-names" property. The split allows easier review and maintenance of the binding. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250731-dt-bindings-ufs-qcom-v2-3-53bb634bf95a@linaro.org Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-08-15scsi: ufs: qcom: dt-bindings: Split SC7180 and similarKrzysztof Kozlowski2-69/+202
The binding for Qualcomm SoC UFS controllers grew and it will grow further. Split SC7180 and several other devices which: 1. Do not reference ICE as I/O address space, but as a phandle, 2. Have same order of clocks (SC7180 has one clock less than SC7280 and other variants in split binding). The split allows easier review and maintenance of the binding. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250731-dt-bindings-ufs-qcom-v2-2-53bb634bf95a@linaro.org Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-08-15scsi: ufs: qcom: dt-bindings: Split common part to qcom,ufs-common.yamlKrzysztof Kozlowski2-52/+68
The binding for Qualcomm SoC UFS controllers grew and it will grow further. It already includes several conditionals, partially for difference in handling encryption block (ICE, either as phandle or as I/O address space) but it will further grow for MCQ. Prepare for splitting this one big binding into several ones for common group of devices by defining common part for all Qualcomm UFS schemas. This only moves code, no functional impact expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250731-dt-bindings-ufs-qcom-v2-1-53bb634bf95a@linaro.org Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-08-15dt-bindings: riscv: spacemit: Add OrangePi RV2 boardHendrik Hamerlinck1-0/+1
Document the compatible string for the OrangePi RV2 board [1]. The board is described as using the Ky X1 SoC, which, based on available downstream sources and testing, appears to be identical or very closely related to the SpacemiT K1 SoC [2]. Link: http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-RV2.html [1] Link: https://www.spacemit.com/en/key-stone-k1 [2] Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be> Reviewed-by: Yixun Lan <dlan@gentoo.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250813092240.180333-2-hendrik.hamerlinck@hammernet.be Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-08-15dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in ↵Raviteja Laggyshetty1-0/+172
Glymur SoC Document the RPMh Network-On-Chip Interconnect in Glymur platform. Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250814-glymur-icc-v2-1-596cca6b6015@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-08-14Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski11-54/+171
Cross-merge networking fixes after downstream PR (net-6.17-rc2). No conflicts. Adjacent changes: drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c d7a276a5768f ("net: stmmac: rk: convert to suspend()/resume() methods") de1e963ad064 ("net: stmmac: rk: put the PHY clock on remove") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-08-14dt-bindings: interrupt-controller: Convert hisilicon,mbigen-v2 to DT schemaRob Herring (Arm)2-84/+76
Convert the HiSilicon MBIGEN binding to DT schema format. It's a straight-forward conversion. Link: https://lore.kernel.org/r/20250812203327.730393-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14dt-bindings: arm/cpus: Add missing Applied Micro CPU compatiblesRob Herring (Arm)1-0/+2
"apm,potenza" and "apm,strega" CPU compatibles have been in use for some time. Link: https://lore.kernel.org/r/20250812181428.69490-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14Merge tag 'net-6.17-rc2' of ↵Linus Torvalds1-2/+4
git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net Pull networking fixes from Paolo Abeni: "Including fixes from Netfilter and IPsec. Current release - regressions: - netfilter: nft_set_pipapo: - don't return bogus extension pointer - fix null deref for empty set Current release - new code bugs: - core: prevent deadlocks when enabling NAPIs with mixed kthread config - eth: netdevsim: Fix wild pointer access in nsim_queue_free(). Previous releases - regressions: - page_pool: allow enabling recycling late, fix false positive warning - sched: ets: use old 'nbands' while purging unused classes - xfrm: - restore GSO for SW crypto - bring back device check in validate_xmit_xfrm - tls: handle data disappearing from under the TLS ULP - ptp: prevent possible ABBA deadlock in ptp_clock_freerun() - eth: - bnxt: fill data page pool with frags if PAGE_SIZE > BNXT_RX_PAGE_SIZE - hv_netvsc: fix panic during namespace deletion with VF Previous releases - always broken: - netfilter: fix refcount leak on table dump - vsock: do not allow binding to VMADDR_PORT_ANY - sctp: linearize cloned gso packets in sctp_rcv - eth: - hibmcge: fix the division by zero issue - microchip: fix KSZ8863 reset problem" * tag 'net-6.17-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (54 commits) net: usb: asix_devices: add phy_mask for ax88772 mdio bus net: kcm: Fix race condition in kcm_unattach() selftests: net/forwarding: test purge of active DWRR classes net/sched: ets: use old 'nbands' while purging unused classes bnxt: fill data page pool with frags if PAGE_SIZE > BNXT_RX_PAGE_SIZE netdevsim: Fix wild pointer access in nsim_queue_free(). net: mctp: Fix bad kfree_skb in bind lookup test netfilter: nf_tables: reject duplicate device on updates ipvs: Fix estimator kthreads preferred affinity netfilter: nft_set_pipapo: fix null deref for empty set selftests: tls: test TCP stealing data from under the TLS socket tls: handle data disappearing from under the TLS ULP ptp: prevent possible ABBA deadlock in ptp_clock_freerun() ixgbe: prevent from unwanted interface name changes devlink: let driver opt out of automatic phys_port_name generation net: prevent deadlocks when enabling NAPIs with mixed kthread config net: update NAPI threaded config even for disabled NAPIs selftests: drv-net: don't assume device has only 2 queues docs: Fix name for net.ipv4.udp_child_hash_entries riscv: dts: thead: Add APB clocks for TH1520 GMACs ...
2025-08-14dt-bindings: arm: Drop obsolete cavium-thunder2.txtRob Herring (Arm)1-8/+0
The binding is already converted to schema and is located in Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml. Link: https://lore.kernel.org/r/20250806212812.1634740-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14dt-bindings: arm: Convert cavium,thunder-88xx to DT schemaRob Herring (Arm)2-10/+19
Convert Cavium Thunder-88xx boards to DT schema format. There's not any defined board compatibles in this case. Link: https://lore.kernel.org/r/20250806212741.1633917-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14dt-bindings: display: Drop duplicate ti,opa362 bindingRob Herring (Arm)1-38/+0
The "ti,opa362" binding is already supported in simple-bridge.yaml, so remove the old binding doc. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://lore.kernel.org/r/20250807214508.4174167-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14dt-bindings: reset: add compatible for bcm63xx ephy controlKyle Hendry1-1/+3
Add compatible string for bcm63xx ephy control. Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250715234605.36216-3-kylehendrydev@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2025-08-14dt-bindings: serial: 8250: allow "main" and "uart" as clock namesAlex Elder1-1/+9
There are two compatible strings defined in "8250.yaml" that require two clocks to be specified, along with their names: - "spacemit,k1-uart", used in "spacemit/k1.dtsi" - "nxp,lpc1850-uart", used in "lpc/lpc18xx.dtsi" When only one clock is used, the name is not required. However there are two places that do specify a name: - In "mediatek/mt7623.dtsi", the clock for the "mediatek,mtk-btif" compatible serial device is named "main" - In "qca/ar9132.dtsi", the clock for the "ns8250" compatible serial device is named "uart" In commit d2db0d7815444 ("dt-bindings: serial: 8250: allow clock 'uartclk' and 'reg' for nxp,lpc1850-uart"), Frank Li added the restriction that two named clocks be used for the NXP platform mentioned above. Change that logic, so that an additional condition for (only) the SpacemiT platform similarly restricts the two clocks to have the names "core" and "bus". Finally, add "main" and "uart" as allowed names when a single clock is specified. Fixes: 2c0594f9f0629 ("dt-bindings: serial: 8250: support an optional second clock") Cc: stable <stable@kernel.org> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202507160314.wrC51lXX-lkp@intel.com/ Signed-off-by: Alex Elder <elder@riscstar.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250813031338.2328392-1-elder@riscstar.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-14dt-bindings: serial: 8250: move a constraintAlex Elder1-24/+22
A block that required a "spacemit,k1-uart" compatible node to specify two clocks was placed in the wrong spot in the binding. Conor Dooley pointed out it belongs earlier in the file, as part of the initial "allOf". Fixes: 2c0594f9f0629 ("dt-bindings: serial: 8250: support an optional second clock") Cc: stable <stable@kernel.org> Reported-by: Conor Dooley <conor@kernel.org> Closes: https://lore.kernel.org/lkml/20250729-reshuffle-contented-e6def76b540b@spud/ Signed-off-by: Alex Elder <elder@riscstar.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250813032151.2330616-1-elder@riscstar.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-14dt-bindings: serial: brcm,bcm7271-uart: Constrain clocksKrzysztof Kozlowski1-1/+1
Lists should have fixed constraints, because binding must be specific in respect to hardware, thus add missing constraints to number of clocks. Cc: stable <stable@kernel.org> Fixes: 88a499cd70d4 ("dt-bindings: Add support for the Broadcom UART driver") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250812121630.67072-2-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-13dt-bindings: clock: adi,axi-clkgen: add clock-output-names propertyDavid Lechner1-0/+4
Add an optional `clock-output-names` property to the ADI AXI Clock Generator binding. This is already being used in the Linux driver and real-world dtbs, so we should document it to allow for correct binding validation. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20250811-dt-bindings-clk-axi-clkgen-add-clock-output-names-property-v1-1-f02727736aa7@baylibre.com Reviewed-by: Nuno Sá <nuno.sa@analog.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: clock: Remove unused fujitsu,mb86s70-crg11 bindingRob Herring (Arm)1-26/+0
The fujitsu,mb86s70-crg11 binding is unused. The driver for it was removed in 2017. It's not used for Synquacer DT either like some other mb86s70 bindings are. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250804175304.3423965-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: clock: Convert silabs,si570 to DT schemaRob Herring (Arm)2-41/+80
Convert the Silicon Labs SI570 binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250804222010.4082782-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: clock: Convert silabs,si5341 to DT schemaRob Herring (Arm)2-175/+217
Convert the Silicon Labs SI5341 binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250804222034.4083410-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: clock: Convert silabs,si514/544 to DT schemaRob Herring (Arm)3-49/+54
Convert the Silicon Labs SI514 and SI544 bindings to DT schema format. Combine the bindings into a single schema as they are the same. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250804222042.4083656-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2026-05-22 22:13:22 +0300