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2025-08-28dt-bindings: ata: highbank: Minor whitespace cleanup in exampleKrzysztof Kozlowski1-1/+1
The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2025-08-28dt-bindings: nfc: ti,trf7970a: Restrict the ti,rx-gain-reduction-db valuesFabio Estevam1-1/+2
Instead of stating the supported values for the ti,rx-gain-reduction-db property in free text format, add an enum entry that can help validating the devicetree files. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250826141736.712827-1-festevam@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-08-27dt-bindings: PCI: qcom,pcie-sm8550: Add SM8750 compatibleKrishna Chaitanya Chundru1-0/+1
PCIe controller present in SM8750 SoC is backwards compatible with the controller present in SM8550 SoC. Hence, add the compatible with SM8550 fallback. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> [mani: reworded description] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250826-pakala-v3-1-721627bd5bb0@oss.qualcomm.com
2025-08-27dt-bindings: PCI: Add STM32MP25 PCIe Root Complex bindingsChristian Bruel2-0/+145
Document the bindings for STM32MP25 PCIe Controller configured in root complex mode with one root port. Supports 4 INTx and MSI interrupts from the ARM GICv2m controller. STM32 PCIe may be in a power domain which is the case for the STM32MP25 based boards. Supports WAKE# from wake-gpios Signed-off-by: Christian Bruel <christian.bruel@foss.st.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://patch.msgid.link/20250820075411.1178729-4-christian.bruel@foss.st.com
2025-08-27dt-bindings: panel: lvds: Append ampire,amp19201200b5tzqw-t03 in panel-lvdsRaphael Gallais-Pou1-0/+2
List Ampire AMP19201200B5TZQW-T03 in the LVDS panel enumeration. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250826-drm-misc-next-v1-1-980d0a0592b9@foss.st.com Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-08-27dt-bindings: PCI: Correct example indentationKrzysztof Kozlowski2-41/+41
DTS example in the bindings should be indented with 2- or 4-spaces, so correct a mixture of different styles to keep consistent 4-spaces. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250818142138.129327-2-krzysztof.kozlowski@linaro.org
2025-08-26dt-bindings: gpio: Minor whitespace cleanup in exampleKrzysztof Kozlowski2-4/+4
The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20250821083213.46642-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-08-26dt-bindings: gpio: Move fsl,mxs-pinctrl.txt into gpio-mxs.yamlFrank Li2-132/+75
Move mxs-pinctrl part into gpio-mxs.yaml and add pinctrl examples to fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/mxs/imx28-xea.dtb: pinctrl@80018000 (fsl,imx28-pinctrl): 'auart0-2pins@0', 'auart0@0', ... 'usb1@1' do not match any of the regexes: 'gpio@[0-9]+$', 'pinctrl-[0-9]+' Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250820164946.3782702-1-Frank.Li@nxp.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-08-26Merge tag 'devicetree-fixes-for-6.17-1' of ↵Linus Torvalds1-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes from Rob Herring: - Fix a memory leak for of_pci_add_properties() failure case. Then fix the introduced UAF. - Add missing IORESOURCE_MEM flag on of_reserved_mem_region_to_resource() - Add already in use vendor prefix "eswin" - Clarify "of of" comment in of_match_device(). After many years of drive-by patches dropping the 2nd "of" (which referred to OpenFirmware), a correct patch finally arrived * tag 'devicetree-fixes-for-6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: of: dynamic: Fix use after free in of_changeset_add_prop_helper() dt-bindings: vendor-prefixes: add eswin of: reserved_mem: Add missing IORESOURCE_MEM flag on resources of: dynamic: Fix memleak when of_pci_add_properties() failed of: Clarify OF device context in of_match_device() comment
2025-08-26dt-bindings: net: Drop vim style annotationKrzysztof Kozlowski2-3/+0
Bindings files should not carry markings of editor setup, so drop vim style annotation. No functional impact. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Gabriel Somlo <gsomlo@gmail.com> Link: https://patch.msgid.link/20250821083038.46274-4-krzysztof.kozlowski@linaro.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-08-26dt-bindings: net: litex,liteeth: Correct example indentationKrzysztof Kozlowski1-5/+5
DTS example in the bindings should be indented with 2- or 4-spaces, so correct a mixture of different styles to keep consistent 4-spaces. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Gabriel Somlo <gsomlo@gmail.com> Link: https://patch.msgid.link/20250821083038.46274-3-krzysztof.kozlowski@linaro.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-08-26dt-bindings: display/msm: qcom,mdp5: drop lut clockDmitry Baryshkov1-1/+0
None of MDP5 platforms have a LUT clock on the display-controller, it was added by the mistake. Drop it, fixing DT warnings on MSM8976 / MSM8956 platforms. Technically it's an ABI break, but no other platforms are affected. Fixes: 385c8ac763b3 ("dt-bindings: display/msm: convert MDP5 schema to YAML format") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/667822/ Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2025-08-25dt-bindings: gpio-mmio: Add MMIO for IXP4xx expansion busLinus Walleij1-1/+29
This expansion is a simple MMIO-mapped GPIO device but the bus has a number of additional properties that we need to bring in using a reference to the bus child node schema. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250822-ixp4xx-eb-mmio-gpio-v2-2-bd2edd4a9c74@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-08-25dt-bindings: gpio-mmio: Support hogsLinus Walleij1-0/+6
We use hogs on some MMIO GPIO controllers so make sure the bindings support this using a pattern property. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250822-ixp4xx-eb-mmio-gpio-v2-1-bd2edd4a9c74@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-08-25dt-bindings: iio: adi,ltc2664: Minor whitespace cleanup in exampleKrzysztof Kozlowski1-1/+1
The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250821083150.46554-2-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-25dt-bindings: iio: adc: max1238: Add #io-channel-cells propertyFrank Li1-0/+3
Add #io-channel-cells property with a constant value of 1 because it is multi-channel ADC. Fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/ls/ls1021a-iot.dtb: adc@35 (maxim,max1239): '#io-channel-cells' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/iio/adc/maxim,max1238.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250818200014.3700738-1-Frank.Li@nxp.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-25dt-bindings: iio: mcp9600: Add microchip,mcp9601 and add constraintsBen Collins1-3/+52
Add microchip,mcp9601 compatible in addition to the original microchip,mcp9600 to designate support between these two chips. The current dt-binding has open-circuit and short-circuit as interrupt names, but these are only supported in mcp9601. The OC and SC detection requires that mcp9601 VSENSE be wired up, which not only enables the OC SC interrupts, but also the OC and SC status register bits. Add a microchip,vsense boolean to show the chip is wired for this support. Add constraints so this feature only applies if the mcp9601 compatible is selected. Signed-off-by: Ben Collins <bcollins@watter.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250822-upstream-changes-v8-2-40bb1739e3e2@watter.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-25dt-bindings: pinctrl: qcom,sc7280-lpass-lpi-pinctrl: Document the clock propertyMohammad Rafi Shaik1-0/+16
Document the clock property in sc7280 LPASS LPI pinctrl node. Clock settings required for Audioreach solution. The existing SC7280 platform only supports non-ADSP audio solutions. To enable audio functionality on ADSP with the AudioReach solution. additional core and audio hardware clocks must be configured. Without these clocks, the ADSP will crash. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/20250821044914.710044-3-quic_pkumpatl@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-25dt-bindings: iio: mcp9600: Set default 3 for thermocouple-typeBen Collins1-0/+1
As is already documented in this file, Type-K is the default, so make that explicit in the dt-bindings. Signed-off-by: Ben Collins <bcollins@watter.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250822-upstream-changes-v8-1-40bb1739e3e2@watter.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-25MAINTAINERS: Update xilinx-ams driver maintainersSalih Erim1-1/+2
Anand left AMD/Xilinx some time ago. Salih and Connall are new maintainers of xilinx-ams driver. Signed-off-by: Salih Erim <salih.erim@amd.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Michal Simek <michal.simek@amd.com> Acked-by: O'Griofa, Conall <conall.ogriofa@amd.com> Link: https://patch.msgid.link/20250820100519.2272509-1-salih.erim@amd.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-25Merge 6.17-rc3 into char-misc-nextGreg Kroah-Hartman1-1/+1
We need the char/misc/iio fixes in here as well to build on. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-25Merge 6.17-rc3 into usb-nextGreg Kroah-Hartman2-3/+5
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-24dt-bindings: arm: rockchip: Add HINLINK H66K / H68KChukun Pan1-0/+7
The HINLINK H66K/H68K are 2.5GbE SBC based on the RK3568 SoC. Add devicetree binding documentation for them. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250818100009.170202-3-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24dt-bindings: vendor-prefixes: Add HINLINKChukun Pan1-0/+2
Add vendor prefix for HINLINK, which is an SBC manufacturer. Link: https://www.hinlink.cn/ Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250818100009.170202-2-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-23dt-bindings: mailbox: apple,mailbox: Add ASC mailboxes on Apple A11 and T2Nick Chan1-0/+7
Add bindings for ASC mailboxes as found on Apple A11 and T2 SoCs. These mailboxes are used for coprocessors including Secure Enclave Processor (SEP), the NVMe coprocessor and the system management controller. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Nick Chan <towinchenmi@gmail.com> Link: https://lore.kernel.org/r/20250821-t8015-nvme-v3-1-14a4178adf68@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2025-08-23dt-bindings: soc: rockchip: add rk3576 mipi dcphy sysconHeiko Stuebner1-0/+1
RK3576 CSI and DSI support requires the GRF for its DC-PHY. The "general register files" provide additional setting-bits outside the regular ip-block reg-space. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250707164906.1445288-8-heiko@sntech.de
2025-08-23dt-bindings: display: rockchip: Add rk3576 to RK3588 DW DSI2 controller schemaHeiko Stuebner1-0/+1
The rk3576 controller is based on the same newer Synopsis IP as the one found in the rk3588. Its external setting bits in the GRF are different though, so it needs its own distinct compatible. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250707164906.1445288-9-heiko@sntech.de
2025-08-23dt-bindings: display: ili9881c: Add Bestar BSD1218-A101KL68 LCD panelHeiko Stuebner1-0/+1
Document the compatible value for Bestar BSD1218-A101KL68 LCD panels that are based around the ili9881c controller. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250707164906.1445288-6-heiko@sntech.de
2025-08-23dt-bindings: vendor-prefixes: Add prefix for Shenzhen Bestar ElectronicHeiko Stuebner1-0/+2
Add the prefix for Bestar, named in full both on Panelook.com and their display datasheets as Shenzhen Bestar Electronic Technology Co., Ltd. which produces at least DSI displays and maybe more. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250707164906.1445288-5-heiko@sntech.de
2025-08-22dt-bindings: display: simple-bridge: Add ra620 compatibleAndy Yan1-0/+1
RA620 is a DP to HDMI bridge converter from RADXA, which first found be used on ROCK 5 ITX. This chip can be used without involving software. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250822063959.692098-6-andyshrk@163.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-08-22dt-bindings: mmc: sdhci-pxa: add state_uhs pinctrlDuje Mihanović1-3/+26
On the pxav3 controller, increasing the drive strength of the data pins might be required to maintain stability on fast bus clocks (above 100 MHz). Add a state_uhs pinctrl to allow this. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz> Link: https://lore.kernel.org/r/20250821-pxav3-uhs-v4-1-bb588314f3c3@dujemihanovic.xyz Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-08-22dt-bindings: arm: fsl: add i.MX91 11x11 evk boardPengfei Li1-0/+6
Add the board imx91-11x11-evk in the binding document. Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com> Signed-off-by: Joy Zou <joy.zou@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-08-22dt-bindings: arm: fsl: add TQMLS1012ALMatthias Schiffer1-0/+6
TQMLS1012AL is a SOM using NXP LS1012A CPU. MBLS1012AL is a carrier reference design. [1] https://www.tq-group.com/en/products/tq-embedded/qoriq-layerscape/tqmls1012al Signed-off-by: Matthias Schiffer <matthias.schiffer@tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-08-22dt-bindings: input: convert lpc32xx-key.txt to yaml formatFrank Li2-34/+61
Convert lpc32xx-key.txt to yaml format. Additional changes: - set maximum of key-row(column) to 4. - add ref to matrix-keymap.yaml. Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250818183814.3603308-1-Frank.Li@nxp.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-08-21Merge tag 'regulator-fix-v6.17-rc2' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator Pull regulator fixes from Mark Brown: "A couple of fairly minor device specific fixes that came in over the past week or so, plus the addition of an actual maintainer for the IR38060" * tag 'regulator-fix-v6.17-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: regulator: tps65219: regulator: tps65219: Fix error codes in probe() regulator: pca9450: Use devm_register_sys_off_handler regulator: dt-bindings: infineon,ir38060: Add Guenter as maintainer from IBM
2025-08-21dt-bindings: vendor-prefixes: add eswinPritesh Patel1-0/+2
Add new vendor string to dt bindings. This new vendor string is used by - ESWIN EIC770X SoC - HiFive Premier P550 board which uses EIC7700 SoC. Link: https://www.eswin.com/en/ Signed-off-by: Pritesh Patel <pritesh.patel@einfochips.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250616112316.3833343-4-pinkesh.vaghela@einfochips.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-21dt-bindings: firmware: arm,scmi: Allow multiple instancesNikunj Kela1-1/+1
Enable multiple SCMI instances by appending an instance-number suffix to the 'scmi' node name. The SCMI spec assumes a single SCMI platform, but in practice its responsibilities may be split across several SCMI platform/server instances. However, only one instance can serve as the system-wide (true) SCMI platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> Signed-off-by: Deepti Jaggi <quic_djaggi@quicinc.com> Message-Id: <20250730-8255-scmi-v6-1-a7d8ba19aded@quicinc.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2025-08-21ASoC: dt-bindings: Minor whitespace cleanup in exampleKrzysztof Kozlowski2-2/+2
The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250821083100.46340-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-21dt-bindings: pinctrl: rp1: Describe groups for RP1 pin controllerAndrea della Porta1-1/+34
The DT binding for RP1 pin controller currently lacks the group definitions. Add groups enumeration to the schema. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250812084639.13442-1-andrea.porta@suse.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-21dt-bindings: net: Add PPE for Qualcomm IPQ9574 SoCLuo Jie1-0/+533
The PPE (packet process engine) hardware block is available in Qualcomm IPQ chipsets that support PPE architecture, such as IPQ9574. The PPE in the IPQ9574 SoC includes six Ethernet ports (6 GMAC and 6 XGMAC), which are used to connect with external PHY devices by PCS. It includes an L2 switch function for bridging packets among the 6 Ethernet ports and the CPU port. The CPU port enables packet transfer between the Ethernet ports and the ARM cores in the SoC, using the Ethernet DMA. The PPE also includes packet processing offload capabilities for various networking functions such as route and bridge flows, VLANs, different tunnel protocols and VPN. The PPE switch is modeled according to the Ethernet switch schema, with additional properties defined for the switch node for interrupts, clocks, resets, interconnects and Ethernet DMA. The switch port node is extended with additional properties for clocks and resets. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-1-1d4ff641fce9@quicinc.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-08-21dt-bindings: arm: fsl: add i.MX8ULP EVK9 boardLaurentiu Mihalcea1-0/+1
Add DT compatible string for the i.MX8ULP EVK9 board. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-08-21dt-bindings: w1: imx: Add an entry for the interrupts propertyFabio Estevam1-0/+4
There is an interrupt line connected to the one-wire block on the i.MX51 and i.MX53. Add an entry for the interrupt property to avoid the following dt-schema warning: 'interrupts' does not match any of the regexes: '^pinctrl-[0-9]+$' Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250819121344.2765940-1-festevam@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-08-20ASoC: dt-bindings: Convert TI TWL4030 soundMark Brown4-108/+188
Merge series from Jihed Chaibi <jihed.chaibi.dev@gmail.com>: This series converts the legacy TXT bindings for the TI TWL4030 sound-related modules to the modern YAML DT schema format. This work was previously part of a larger series but is now being sent as a focused submission for the ASoC subsystem.
2025-08-20dt-bindings: dma: nvidia,tegra20-apbdma: Add undocumented compatibles and ↵Rob Herring (Arm)1-1/+11
"clock-names" Add the undocumented NVIDIA APBDMA compatibles and "clock-names" which are already in use. There doesn't appear to be any per compatible differences. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250812203308.727731-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-20dt-bindings: phy: Add eDP PHY compatible for QCS8300Yongxing Mou1-7/+12
Add compatible string for the supported eDP PHY on QCS8300 platform. QCS8300 have the same eDP PHY with SA8775P. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Yongxing Mou <quic_yongmou@quicinc.com> Link: https://lore.kernel.org/r/20250730072725.1433360-1-quic_yongmou@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-20dt-bindings: phy: renesas,usb2-phy: Add RZ/T2H and RZ/N2H supportLad Prabhakar1-0/+17
Document the USB2 PHY controller for the Renesas RZ/T2H (r9a09g077) and RZ/N2H (r9a09g087) SoCs. These SoCs share the same PHY block, which is similar to the one on RZ/G2L but differs in clocks, resets, and register bits. To account for these differences, a new compatible string `renesas,usb2-phy-r9a09g077` is introduced. The RZ/N2H SoC uses the same PHY as RZ/T2H, so it reuses the RZ/T2H compatible string as a fallback. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250808215209.3692744-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-20dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp: Reference usb-switch.yaml to ↵Neil Armstrong1-4/+3
allow mode-switch The QMP USB3/DP Combo PHY can work in 3 modes: - DisplayPort Only - USB3 Only - USB3 + DisplayPort Combo mode In order to switch between those modes, the PHY needs to receive Type-C events, allow marking to the phy with the mode-switch property in order to allow the PHY to Type-C events. Reference usb-switch.yaml as a simpler way to allow the mode-switch property instead of duplicating the property definition. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on Lenovo Thinkpad T14S Link: https://lore.kernel.org/r/20250807-topic-4ln_dp_respin-v4-1-43272d6eca92@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-20ASoC: dt-bindings: omap-twl4030: convert to DT schemaJihed Chaibi2-62/+98
Convert the legacy TXT binding for the OMAP TWL4030 sound card to the modern YAML DT schema format. This adds formal validation and improves documentation. Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Jihed Chaibi <jihed.chaibi.dev@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250819201302.80712-3-jihed.chaibi.dev@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-20ASoC: dt-bindings: ti,twl4030-audio: convert to DT schemaJihed Chaibi2-46/+90
Convert the TWL4030 audio module bindings from txt to YAML format and move them to the sound subsystem bindings directory. This patch also refines the schema by adding an enum constraint for ti,enable-vibra and updates the example to remove irrelevant I2C clock-frequency property. Signed-off-by: Jihed Chaibi <jihed.chaibi.dev@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250819201302.80712-2-jihed.chaibi.dev@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-20dt-bindings: arm: imx8mp: Add Ultratronik Ultra-MACH SBCGoran Rađenović1-0/+1
Document the Ultratronik Ultra-MACH SBC, based on the NXP i.MX8MP SoC. This board is manufactured by Ultratronik GmbH and uses the compatible string "ux,imx8mp-ultra-mach-sbc". Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Goran Rađenović <goran.radni@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2026-05-22 21:03:48 +0300