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2026-01-13mtd: spinand: Octal DTR supportMark Brown3-3/+16
Merge series from Miquel Raynal <miquel.raynal@bootlin.com>: This series adds support for 8D-8D-8D in SPI NAND, which can already be leveraged without any SPI changes as controllers already have this support for some SPI NOR devices. Among the few spi-mem patches, they are needed for building the SPI NAND changes (especially the ODTR introduction at the end) and therefore an immutable tag will be needed for merging in the MTD tree (unless all the series goes through MTD directly ofc).
2026-01-13dt-bindings: gpu: mali-valhall-csf: Add shader-present nvmem cellNicolas Frattaroli1-0/+14
On the MediaTek MT8196 SoC, the bitmask for which shader cores are present and functional is not the one in the Mali GPU's registers, but in an external efuse. Add the nvmem cell properties to describe such a setup, and make them required on MT8196. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://patch.msgid.link/20251220-mt8196-shader-present-v2-1-45b1ff1dfab0@collabora.com Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2026-01-13dt-bindings: i2c: brcm,iproc-i2c: Allow 2 reg entries for brcm,iproc-nic-i2cRob Herring (Arm)1-1/+9
The brcm,iproc-nic-i2c variant has 2 reg entries. The second one is related to the brcm,ape-hsls-addr-mask property, but it's not clear what a proper description would be. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2026-01-13dt-bindings: PCI: qcom,sa8255p-pcie-ep: Document firmware managed PCIe endpointMrinmay Sarkar1-0/+110
Document the required configuration to enable the PCIe Endpoint controller on SA8255p which is managed by firmware using power-domain based handling. Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar@oss.qualcomm.com> [mani: added MAINTAINERS entry] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260106-firmware_managed_ep-v5-1-1933432127ec@oss.qualcomm.com
2026-01-13Merge branch 'icc-mtk' into icc-nextGeorgi Djakov1-0/+1
This series is a combination of binding changes, driver cleanups and new driver code to enable the interconnect on the MediaTek MT8196 SoC. * icc-mtk dt-bindings: interconnect: mt8183-emi: Add support for MT8196 EMI interconnect: mediatek: Add support for MediaTek MT8196 EMI ICC interconnect: mediatek: Don't hijack parent device interconnect: mediatek: Aggregate bandwidth with saturating add Link: https://lore.kernel.org/r/20251124-mt8196-dvfsrc-v2-0-d9c1334db9f3@collabora.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-01-13dt-bindings: interconnect: qcom,qcs615-rpmh: Drop IPA interconnectsKonrad Dybcio1-2/+0
This has been agreed to be characterized as a clock resource, not an interconnect provider. Bring QCS615 in line with the expectation. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250627-topic-qcs615_icc_ipa-v1-3-dc47596cde69@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-01-13Axiado AX3000 SoC SPI DB controller driverMark Brown1-0/+73
Merge series from Vladimir Moravcevic <vmoravcevic@axiado.com>: This series introduces new SPI controller driver for Axiado AX3000 SoC and its evaluation board. The SPI controller provides: - Full-duplex and half-duplex transfer support - Configurable clock polarity and phase - Interrupt-driven Functionality has been verified using the `jedec,spi-nor` interface to access onboard flash memory. This ensures compatibility with common NOR flash devices used in boot and storage subsystem. Further improvements, including performance tuning and extended hardware feature support, will be submitted in follow-up patches.
2026-01-13dt-bindings: arm: rockchip: Add Radxa CM3J on RPi CM4 IO BoardFUKAUMI Naoki1-0/+7
The Radxa CM3J is a feature rich industrial compute module developed by Radxa, based on the Rockchip RK3568 SoC. [1] Add devicetree binding documentation for the Radxa CM3J on RPi CM4 IO Board. [1] https://dl.radxa.com/cm3j/docs/hw/radxa_cm3j_product_brief_Revision_1.0.pdf Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260108113341.14037-1-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-01-13dt-bindings: arm: rockchip: add TS133 to RK356x-based QNAP NAS devicesHeiko Stuebner1-5/+9
QNAP builds a number of variants of the RK356x-based NAS design. Add the 1-bay TS133 variant. This one is a tiny bit special as it is based around the RK3566 variant of the mostly similar RK3566/RK3568 SoCs. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260104191448.2693309-5-heiko@sntech.de
2026-01-13dt-bindings: PCI: loongson: Document msi-parent propertyYao Zi1-0/+2
Loongson PCI controllers found in LS2K1000/2000 SoCs (loongson,ls2k-pci), 7A1000/2000 bridge chips (loongson,ls7a-pci), and RS780E bridge chips (loongson,rs780e-pci) all have their paired MSI controllers. Though only the one in LS2K2000 SoC is described in devicetree, we should document the property for all variants. For the same reason, it isn't marked as required for now. Fixes: 83e757ecfd5d ("dt-bindings: Document Loongson PCI Host Controller") Signed-off-by: Yao Zi <me@ziyao.cc> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251209140006.54821-3-me@ziyao.cc
2026-01-13regulator: dt-bindings: mediatek,mt6331: Add missing ldo-vio28 vregAngeloGioacchino Del Regno1-2/+2
The MT6331 has a "ldo-vio28" regulator but this was missing in the list: add it to resolve a dtbs_check warning. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patch.msgid.link/20260113110000.36953-4-angelogioacchino.delregno@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-13dt-bindings: leds: bd72720: Add BD72720Matti Vaittinen1-3/+4
Add the ROHM BD72720 documentation to the binding documents. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/b9854f77ee1dca8c99a9a9a198b79fbc76f8da67.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2026-01-13dt-bindings: mfd: ROHM BD72720Matti Vaittinen1-0/+339
The ROHM BD72720 is a power management IC integrating regulators, GPIOs, charger, LEDs, RTC and a clock gate. Add dt-binding doc for ROHM BD72720. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://patch.msgid.link/44cd4fcb2834ed613dd2d958cf4a4a34b3a316ab.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2026-01-13dt-bindings: battery: Voltage drop propertiesMatti Vaittinen1-0/+22
ROHM has developed a so called "zero-correction" -algorithm to improve the fuel-gauging accuracy close to the point where battery is depleted. This relies on battery specific "VDR" (voltage drop rate) tables, which are measured from the battery, and which describe the voltage drop rate. More thorough explanation about the "zero correction" and "VDR" parameters is here: https://lore.kernel.org/all/676253b9-ff69-7891-1f26-a8b5bb5a421b@fi.rohmeurope.com/ Document the VDR zero-correction specific battery properties used by the BD71815, BD71828, BD72720 and some other ROHM chargers. (Note, charger drivers aren't upstream yet). Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/461f2840a03e0189ecd4f1a7c261014342ddee91.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2026-01-13dt-bindings: battery: Add trickle-charge upper limitMatti Vaittinen1-0/+4
Some of the chargers for lithium-ion batteries use a trickle-charging as a first charging phase for very empty batteries, to "wake-up" the battery. Trickle-charging is a low current, constant current phase. After the voltage of the very empty battery has reached an upper limit for trickle charging, the pre-charge phase is started with a higher current. Allow defining the upper limit for trickle charging voltage, after which the charging should be changed to the pre-charging. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/9c3064ec7e32cda442336bf633fb93355ce6a97d.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2026-01-13dt-bindings: battery: Clarify trickle-chargeMatti Vaittinen1-1/+6
The term 'trickle-charging' is used to describe a very slow charging phase, where electrons "trickle-in" the battery. There are two different use-cases for this type of charging. At least some Li-Ion batteries can benefit from very slow, constant current, pre-pre phase 'trickle-charging', if a battery is very empty. Some other batteries use top-off phase 'trickle-charging', which is different from the above case. The battery bindings use the term 'trickle-charge' without specifying which of the use-cases properties are addressing. This has already caused some confusion. Clarify that the 'trickle-charge-current-microamp' refers to the first one, the "pre-pre" -charging use-case. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://patch.msgid.link/e2794140343103245410c3301f8994e1babaeb96.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2026-01-13dt-bindings: regulator: ROHM BD72720Matti Vaittinen1-0/+148
The ROHM BD72720 is a new PMIC with 10 BUCk and 11 LDO regulators. The BD72720 is designed to support using the BUCK10 as a supply for the LDOs 1 to 4. When the BUCK10 is used for this, it can be set to a LDON_HEAD mode. In this mode, the BUCK10 voltage can't be controlled by software, but the voltage is adjusted by PMIC to match the LDO1 .. LDO4 voltages with a given offset. Offset can be 50mV .. 300mV and is changeable at 50mV steps. Add 'ldon-head-microvolt' property to denote a board which is designed to utilize the LDON_HEAD mode. All other properties are already existing. Add dt-binding doc for ROHM BD72720 regulators to make it usable. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/81cb38d0ae1b3fa426e40d5b0a93f69a0f374657.1765804226.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2026-01-13ASoC: Update rtq9128 document and source fileMark Brown1-2/+10
Merge series from cy_huang@richtek.com: This patch series include two parts - Update initial setting for rtq9128 specific feature - Add rtq9154 backward compatible with rtq9128
2026-01-13regulator: Add TPS65185Mark Brown4-3/+112
Merge series from Andreas Kemnade <andreas@kemnade.info>: Add a driver for the TPS65185 regulator which provides the comparatively high voltages needed for electronic paper displays. Datasheet for the TPS65185 is at https://www.ti.com/lit/gpn/tps65185 To simplify things, include the hwmon part directly which is only one temperature sensor and there are no other functions besides regulators in this chip.
2026-01-15media: dt-bindings: ti,omap3isp: Convert to DT schemaAlex Tran2-71/+189
Convert binding for ti,omap3isp from TXT to YAML format. Signed-off-by: Alex Tran <alex.t.tran@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-15media: dt-bindings: i2c: toshiba,et8ek8: Convert to DT schemaAlex Tran2-55/+87
Convert binding for toshiba,et8ek8 from TXT to YAML format. Update MAINTAINERS file accordingly. The binding references video-interface-devices.yaml at top level to inherit flash-leds property. Signed-off-by: Alex Tran <alex.t.tran@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-15dt-bindings: media: ov5647: Allow props from video-interface-devicesJai Luthra1-1/+4
Allow properties from video-interface-devices. The change is identical to commit 08fbd355be3d ("media: dt-bindings: sony,imx219: Allow props from video-interface-devices") Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-15dt-bindings: media: ov5647: Add optional regulatorsJai Luthra1-0/+9
The OV5647 camera sensor takes 3 voltage supplies. So define those in the bindings as optional regulators, to not break existing users. Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-13dt-bindings: media: Add qcom,sm6150-camssWenmeng Liu1-0/+439
Add bindings for the Camera Subsystem on the SM6150 SoC The SM6150 platform provides: - 2 x VFE (version 170), each with 3 RDI - 1 x VFE Lite (version 170), each with 4 RDI - 2 x CSID (version 170) - 1 x CSID Lite (version 170) - 3 x CSIPHY (version 2.0.0) - 1 x BPS (Bayer Processing Segment) - 1 x ICP (Imaging Control Processor) - 1 x IPE (Image Postprocessing Engine) - 1 x JPEG Encoder/Decoder - 1 x LRME (Low Resolution Motion Estimation) Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-13dt-bindings: media: Correct camss supply descriptionDavid Heidelberg8-16/+16
Usually, the supply is around 1.2 V, not 1.8 V, and also correct wording. Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-13dt-bindings: media: qcom,qcs8300-camss: Add missing power suppliesVikram Sharma1-0/+13
Add missing vdda-phy-supply and vdda-pll-supply in the (monaco)qcs8300 camss binding. While enabling imx412 sensor for qcs8300 we see a need to add these supplies which were missing in initial submission. Fixes: 634a2958fae30 ("media: dt-bindings: Add qcom,qcs8300-camss compatible") Cc: stable@vger.kernel.org Co-developed-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-13dt-bindings: media: ti: vpe: Add support for Video Input PortDale Farnsworth1-0/+152
Add device tree bindings for the Video Input Port. Video Input Port (VIP) can be found on devices such as DRA7xx and provides a parallel interface to a video source such as a sensor or TV decoder. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Benoit Parrot <bparrot@ti.com> Signed-off-by: Sukrut Bellary <sbellary@baylibre.com> Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-13media: dt-bindings: adi,adv7180: add VPP and CSI register mapsMichael Tretter1-1/+96
Different variants of the ADV7280 chip have up to three register maps. The availability of the CSI and VPP register maps depends on the chip variant. The address of the additional register maps depends on the board design and other chips on the I2C but. They may be programmed via registers in the main register map. Allow to specify the addresses of the VPP and CSI register maps in the device tree to solve I2C address conflicts on a board level. The CSI and VPP register maps are always optional to allow backwards compatibility with existing device trees which may rely on the default address. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-13dt-bindings: display: panel-simple: Allow "data-mapping" for ↵Rob Herring (Arm)1-1/+3
"yes-optoelectronics,ytc700tlag-05-201c" The "data-mapping" property is in use already with the "yes-optoelectronics,ytc700tlag-05-201c" panel, so allow it in the schema. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260105193220.3166778-1-robh@kernel.org
2026-01-13dt-bindings: display: simple: Add Innolux G150XGE-L05 panelFabio Estevam1-0/+2
Add Innolux G150XGE-L05 15.0" TFT 1024x768 LVDS panel compatible string. Signed-off-by: Fabio Estevam <festevam@nabladev.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260102141706.36842-1-festevam@gmail.com
2026-01-12ASoC: dt-bindings: rtq9128: Add rtq9154 backward compatibleChiYuan Huang1-2/+10
Add rtq9154 backward compatible support. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/ab31e3965e9cb50ecdc14d5ea90d70dc26d1d187.1768180827.git.cy_huang@richtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-12regulator: dt-bindings: Document TI TPS65185Andreas Kemnade1-0/+96
Document the TPS65185. GPIO names are same as in the datasheet except for the PWRUP pad which is described as "enable". That pin is optional because the rising edge corresponds to setting one register bit and falling edge to another register bit. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Link: https://patch.msgid.link/20260102-tps65185-submit-v3-1-23bda35772f2@kemnade.info Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-12regulator: core: allow regulator_register() withMark Brown115-140/+163
Merge series from André Draszik <andre.draszik@linaro.org>: With these attached patches it becomes possible again to support hardware designs with multiple PMICs where individual rails of each act as required supplies for rails of the other (due to the latter being e.g. always-on), and vice-versa. Google Pixel 6 and 6 Pro (oriole and raven) are examples of such designs. Rather than returning -EPORBE_DEFER in regulator_register() when set_machine_constraints() fails with -EPROBE_DEFER (due to missing required supplies), we still allow rail registration and try to reresolve supplies each time a new rail gets registered. This is implemented using a bus (regulator bus), which allows the core to reresolve supplies for regulators that still need them whenever new regulators (i.e. devices) are added. Using a bus also solves existing problems around late resolution of supplies as mentioned in the commit message introducing that bus. The series starts with a few bug fixes and the last two commits implement the changes mentioned above, but do depend on the bug fixes.
2026-01-12spi: dt-bindings: nxp,lpc3220-spi: Add DMA specific propertiesVladimir Zapolskiy1-0/+8
NXP LPC32xx SPI controllers supports DMA operations over rx-tx channel, which is muxed with SSP SPI controller DMA. For additional reference see Table 69 in NXP LPC32xx User Manual. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Link: https://patch.msgid.link/20260109075032.3287109-1-vz@mleia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-12ASoC: dt-bindings: Convert realtek,rt5651 to DT schemaRob Herring (Arm)2-63/+100
Convert the Realtek RT5661 codec binding to DT schema format. Add missing clocks/clock-names for MCLK which is in use already. Also add the standard "#sound-dai-cells" property. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260108214443.1127685-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-12ASoC: dt-bindings: rockchip-spdif: Allow "port" nodeRob Herring (Arm)1-0/+3
Add a "port" node entry for Rockchip S/PDIF binding. It's already in use and a common property for DAIs. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260108224938.1320809-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-12ASoC: dt-bindings: realtek,rt5640: Allow 7 for realtek,jack-detect-sourceRob Herring (Arm)1-0/+1
The driver accepts and uses a value of 7 for realtek,jack-detect-source. What exactly it means isn't clear though. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260108215307.1138515-2-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-12ASoC: dt-bindings: realtek,rt5640: Add missing properties/nodeRob Herring (Arm)1-0/+9
The RT5640 has an MCLK pin and several users already define a clocks entry. A 'port' node is also in use and a common node for codecs. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260108215307.1138515-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-12Merge tag 'v6.19-rc5' of ↵Bartosz Golaszewski118-143/+179
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-next Linux 6.19-rc5 Pull in upstream shared GPIO fixes into the v7.0 branch.
2026-01-12Merge 6.19-rc5 into char-misc-nextGreg Kroah-Hartman5-3/+56
We need the char/misc fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-01-12dt-bindings: media: i2c: Add os05b10 sensorElgin Perumbilly1-0/+103
Add bindings for Omnivision OS05B10 sensor. Add MAINTAINERS entry for Omnivision OS05B10 binding documentation Signed-off-by: Elgin Perumbilly <elgin.perumbilly@siliconsignals.io> Signed-off-by: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-12dt-bindings: media: i2c: Add Samsung S5K3M5 image sensorVladimir Zapolskiy1-0/+103
Add device tree bindings documentation for Samsung S5K3M5 image sensor. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-12dt-bindings: media: i2c: Add Samsung S5KJN1 image sensorVladimir Zapolskiy1-0/+103
Add device tree bindings documentation for Samsung S5KJN1 image sensor. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-12dt-bindings: arm: cix: add OrangePi 6 Plus boardGary Yang1-2/+4
OrangePi 6 Plus adopts CIX CD8180/CD8160 SoC, built-in 12-core 64-bit processor + NPU processor,integrated graphics processor, equipped with 16GB/32GB/64GB LPDDR5, and provides two M.2 KEY-M interfaces 2280 for NVMe SSD,as well as SPI FLASH and TF slots to meet the needs of fast read/write and high-capacity storage Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Gary Yang <gary.yang@cixtech.com> Link: https://lore.kernel.org/r/20260110093406.2700505-2-gary.yang@cixtech.com Signed-off-by: Peter Chen <peter.chen@cixtech.com>
2026-01-11treewide: Update email addressThomas Gleixner1-1/+1
In a vain attempt to consolidate the email zoo switch everything to the kernel.org account. Signed-off-by: Thomas Gleixner <tglx@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-01-11dt-bindings: iio: adc: Add AD4134Marcelo Schmitt1-0/+191
Add device tree documentation for AD4134 24-Bit, 4-channel simultaneous sampling, precision ADC. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2026-01-11dt-bindings: iio: proximity: Add RF Digital RFD77402 ToF sensorShrikant Raskar2-0/+55
The RF Digital RFD77402 is a Time-of-Flight (ToF) proximity and distance sensor that provides absolute and highly accurate distance measurements from 100 mm up to 2000 mm over an I2C interface. It includes an optional interrupt pin that signals when new measurement data is ready. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Shrikant Raskar <raskar.shree97@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2026-01-11dt-bindings: pinctrl: samsung: Add exynos9610-wakeup-eint nodeAlexandru Chimac1-0/+1
Add a dedicated compatible for the exynos9610-wakeup-eint node, which is compatbile with Exynos850's implementation (and the Exynos7 fallback). Signed-off-by: Alexandru Chimac <alex@chimac.ro> Link: https://patch.msgid.link/20260102-exynos9610-pinctrl-v3-2-3f21f2cfb651@chimac.ro Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-01-11dt-bindings: pinctrl: samsung: Add exynos9610-pinctrl compatibleAlexandru Chimac1-0/+1
Document pin controller support on Exynos9610-series SoCs. Signed-off-by: Alexandru Chimac <alex@chimac.ro> Link: https://patch.msgid.link/20260102-exynos9610-pinctrl-v3-1-3f21f2cfb651@chimac.ro Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-01-10dt-bindings: soc: fsl: qe: Add an interrupt controller for QUICC Engine PortsChristophe Leroy (CS GROUP)1-0/+51
The QUICC Engine provides interrupts for a few I/O ports. This is handled via a separate interrupt ID and managed via a triplet of dedicated registers hosted by the SoC. Implement an interrupt driver for it so that those IRQs can then be linked to the related GPIOs. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/7708243d6cca21004de8b3da87369c06dbee3848.1767804922.git.chleroy@kernel.org Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> [moved from bindings/soc/fsl/cpm_qe/ to bindings/interrupt-controller/ while applying]