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2016-03-01phy: rcar-gen3-usb2: remove HSUSB registers handlingYoshihiro Shimoda1-11/+4
Since the related driver (CPG/MSSR driver) only manages the first module clock, this driver should not handle the HSUSB registers. So, this patch removes the HSUSB registers handling. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-03-01dt-bindings: add document for rockchip dp phyYakir Yang1-0/+22
Add dt binding documentation for rockchip display port PHY. Signed-off-by: Yakir Yang <ykk@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-03-01Documentation: bindings: add dt documentation for Rockchip eMMC PHYShawn Lin1-0/+19
This patch adds a binding that describes the Rockchip eMMC PHYs found on Rockchip SoCs eMMC interface. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-01-24Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds1-0/+18
Pull MIPS updates from Ralf Baechle: "This is the main pull request for MIPS for 4.5 plus some 4.4 fixes. The executive summary: - ATH79 platform improvments, use DT bindings for the ATH79 USB PHY. - Avoid useless rebuilds for zboot. - jz4780: Add NEMC, BCH and NAND device tree nodes - Initial support for the MicroChip's DT platform. As all the device drivers are missing this is still of limited use. - Some Loongson3 cleanups. - The unavoidable whitespace polishing. - Reduce clock skew when synchronizing the CPU cycle counters on CPU startup. - Add MIPS R6 fixes. - Lots of cleanups across arch/mips as fallout from KVM. - Lots of minor fixes and changes for IEEE 754-2008 support to the FPU emulator / fp-assist software. - Minor Ralink, BCM47xx and bcm963xx platform support improvments. - Support SMP on BCM63168" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (84 commits) MIPS: zboot: Add support for serial debug using the PROM MIPS: zboot: Avoid useless rebuilds MIPS: BMIPS: Enable ARCH_WANT_OPTIONAL_GPIOLIB MIPS: bcm63xx: nvram: Remove unused bcm63xx_nvram_get_psi_size() function MIPS: bcm963xx: Update bcm_tag field image_sequence MIPS: bcm963xx: Move extended flash address to bcm_tag header file MIPS: bcm963xx: Move Broadcom BCM963xx image tag data structure MIPS: bcm63xx: nvram: Use nvram structure definition from header file MIPS: bcm963xx: Add Broadcom BCM963xx board nvram data structure MAINTAINERS: Add KVM for MIPS entry MIPS: KVM: Add missing newline to kvm_err() MIPS: Move KVM specific opcodes into asm/inst.h MIPS: KVM: Use cacheops.h definitions MIPS: Break down cacheops.h definitions MIPS: Use EXCCODE_ constants with set_except_vector() MIPS: Update trap codes MIPS: Move Cause.ExcCode trap codes to mipsregs.h MIPS: KVM: Make kvm_mips_{init,exit}() static MIPS: KVM: Refactor added offsetof()s MIPS: KVM: Convert EXPORT_SYMBOL to _GPL ...
2016-01-04devicetree: Add bindings for the ATH79 USB phyAlban Bedel1-0/+18
Signed-off-by: Alban Bedel <albeu@free.fr> Acked-by: Rob Herring <robh@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11496/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-12-21phy: omap-usb2: use *syscon* framework API to power on/off the PHYKishon Vijay Abraham I1-1/+7
Deprecate using phy-omap-control driver to power on/off the PHY, and use *syscon* framework to do the same. This handles powering on/off the PHY for the USB2 PHYs used in various TI SoCs. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-12-21phy: ti-pipe3: use *syscon* framework API to set PCS value of the PHYKishon Vijay Abraham I1-0/+2
Deprecate using phy-omap-control driver to set PCS value of the PHY and start using *syscon* API to do the same. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Acked-by: Rob Herring <robh@kernel.org>
2015-12-21phy: ti-pipe3: use *syscon* framework API to power on/off the PHYKishon Vijay Abraham I1-2/+8
Deprecate using phy-omap-control driver to power on/off the PHY and use *syscon* framework to do the same. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Rob Herring <robh@kernel.org>
2015-12-20phy: phy_brcmstb_sata: add support for MIPS-based platformsJaedon Shin1-0/+1
The BCM7xxx ARM-based and MIPS-based platforms share a similar hardware block for AHCI SATA3. This new compatible string, "brcm,bcm7425-sata-phy", may be used for most MIPS-based platforms of 40nm process technology. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-12-20phy: rockchip-usb: expose the phy-internal PLLsHeiko Stuebner1-0/+1
The USB phys on Rockchip SoCs contain their own internal PLLs to create the 480MHz needed. Additionally this PLL output is also fed back into the core clock-controller as possible source for clocks like the GPU or others. Until now this was modelled incorrectly with a "virtual" factor clock in the clock controller. The one big caveat is that if we turn off the usb phy via the siddq signal, all analog components get turned off, including the PLLs. It is therefore possible that a source clock gets disabled without the clock driver ever knowing, possibly making the system hang. Therefore register the phy-plls as real clocks that the clock driver can then reference again normally, making the clock hirarchy finally reflect the actual hardware. The phy-ops get converted to simply turning that new clock on and off which in turn controls the siddq signal of the phy. Through this the driver gains handling for platform-specific data, to handle the phy->clock name association. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-12-20phy: rockchip-usb: add compatible values for rk3066a and rk3188Heiko Stuebner1-1/+4
We need custom handling for these two socs in the driver shortly, so add the necessary compatible values to binding and driver. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-12-20phy: add phy-hi6220-usbZhangfei Gao1-0/+16
Support hi6220 use phy for HiKey board Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-12-20phy-sun4i-usb: Add support for the host usb-phys found on the H3 SoCReinder de Haan1-0/+1
Note this commit only adds support for phys 1-3, phy 0, the otg phy, is not yet (fully) supported after this commit. Signed-off-by: Reinder de Haan <patchesrdh@mveas.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-12-20phy: rcar-gen3-usb2: add runtime ID/VBUS pin detectionYoshihiro Shimoda1-0/+2
This patch adds support for runtime ID/VBUS pin detection if the channel 0 of R-Car gen3 is used. So, we are able to use the channel as both host and peripheral. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-12-20phy: rcar-gen3-usb2: Add R-Car Gen3 USB2 PHY driverYoshihiro Shimoda1-0/+37
This patch adds support for R-Car generation 3 USB2 PHY driver. This SoC has 3 EHCI/OHCI channels, and the channel 0 is shared with the HSUSB (USB2.0 peripheral) device. And each channel has independent registers about the PHYs. So, the purpose of this driver is: 1) initializes some registers of SoC specific to use the {ehci,ohci}-platform driver. 2) detects id pin to select host or peripheral on the channel 0. For now, this driver only supports 1) above. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-11-06Merge tag 'devicetree-for-4.4' of ↵Linus Torvalds5-0/+206
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull DeviceTree updates from Rob Herring: "A fairly large (by DT standards) pull request this time with the majority being some overdue moving DT binding docs around to consolidate similar bindings. - DT binding doc consolidation moving similar bindings to common locations. The majority of these are display related which were scattered in video/, fb/, drm/, gpu/, and panel/ directories. - Add new config option, CONFIG_OF_ALL_DTBS, to enable building all dtbs in the tree for most arches with dts files (except powerpc for now). - OF_IRQ=n fixes for user enabled CONFIG_OF. - of_node_put ref counting fixes from Julia Lawall. - Common DT binding for wakeup-source and deprecation of all similar bindings. - DT binding for PXA LCD controller. - Allow ignoring failed PCI resource translations in order to ignore 64-bit addresses on non-LPAE 32-bit kernels. - Support setting the NUMA node from DT instead of only from parent device. - Couple of earlycon DT parsing fixes for address and options" * tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (45 commits) MAINTAINERS: update DT binding doc locations devicetree: add Sigma Designs vendor prefix of: simplify arch_find_n_match_cpu_physical_id() function Documentation: arm: Fixed typo in socfpga fpga mgr example Documentation: devicetree: fix reference to legacy wakeup properties Documentation: devicetree: standardize/consolidate on "wakeup-source" property drivers: of: removing assignment of 0 to static variable xtensa: enable building of all dtbs mips: enable building of all dtbs metag: enable building of all dtbs metag: use common make variables for dtb builds h8300: enable building of all dtbs arm64: enable building of all dtbs arm: enable building of all dtbs arc: enable building of all dtbs arc: use common make variables for dtb builds of: add config option to enable building of all dtbs of/fdt: fix error checking for earlycon address of/overlay: add missing of_node_put of/platform: add missing of_node_put ...
2015-10-22dt-bindings: move Calxeda bindings to appropriate subsystemsRob Herring1-0/+17
Move the Calxeda memory controller and PHY bindings to appropriate subsystem directories. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org>
2015-10-22dt-bindings: consolidate USB PHYs in bindings/phyRob Herring4-0/+189
Move USB PHY bindings under usb directory to phy directory which already contains other USB PHY bindings. The Samsung USB PHY binding is obsolete and can be removed. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org>
2015-10-06dt-bindings: Add Cygnus PCIe PHY binding docRay Jui1-0/+47
Add DT binding document for Broadcom Cygnus PCIe PHYs Signed-off-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Arun Parameswaran <aparames@broadcom.com> Reviewed-by: JD (Jiandong) Zheng <jdzheng@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-10-06dt-bindings: Add usb3.0 phy binding for MT65xx SoCsChunfeng Yun1-0/+68
add a DT binding documentation of usb3.0 phy for MT65xx SoCs from Mediatek. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-10-06phy: exynos-usb2: add vbus regulator supportMarek Szyprowski1-0/+3
Exynos USB2 PHY has separate power supply, which is usually provided by VBUS regulator. This patch adds support for it. VBUS regulator is optional, to keep compatibility with boards, which have VBUS provided from some always-on power source. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-08-15Merge tag 'phy-for-4.3' of ↵Greg Kroah-Hartman2-2/+46
git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next Kishon writes: phy: for 4.3 *) Add new NXP USB OTG PHY driver *) Add vbus/id detection, extcon support and fixes in phy-sun4i-usb driver *) Add support to use phy-sun4i-usb driver for sun8i-a23 and sun8i-a33 SoCs *) Other trivial code cleanups, dropping .owner assignment and constify phy_ops Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-08-01phy: ti-pipe3: i783 workaround for SATA lockup after dpll unlock/relockRoger Quadros1-0/+16
SATA_PLL_SOFT_RESET bit of CTRL_CORE_SMA_SW_0 must be toggled between a SATA DPLL unlock and re-lock to prevent SATA lockup. Introduce a new DT parameter 'syscon-pllreset' to provide the syscon regmap access to this register which sits in the control module. If the register is not provided we fallback to the old behaviour i.e. SATA DPLL refclk will not be disabled and we prevent SoC low power states. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-07-25phy-sun4i-usb: Add support for monitoring vbus via a power-supplyHans de Goede1-0/+1
On some boards there is no vbus_det gpio pin, instead vbus-detection for otg can be done via the pmic. This commit adds support for monitoring vbus_det via the power_supply exported by the pmic, enabling support for otg on these boards. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-07-25phy-sun4i-usb: Add support for the usb-phys on the sun8i-a33 SoCHans de Goede1-0/+1
The usb-phys on the sun8i-a33 SoC are mostly the same as sun8i-a23 but for some reason (hw bug?) the phyctl register was moved to a different address and is not initialized to 0 on reset. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-07-25phy-sun4i-usb: Add support for the usb-phys on the sun8i-a23 SoCHans de Goede1-0/+2
The usb-phys on the sun8i-a23 SoC have the same setup wrt clocks as on the sun6i-a31 SoC, but there are only 2 instead of 3 like on the sun5i-a13 SoC. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-07-25phy-sun4i-usb: Add id and vbus detection support for the otg phy (phy0)Hans de Goede1-2/+16
The usb0 phy is connected to an OTG controller, and as such needs some special handling: 1) It allows explicit control over the pullups, enable these on phy_init and disable them on phy_exit. 2) It has bits to signal id and vbus detect to the musb-core, add support for for monitoring id and vbus detect gpio-s for use in dual role mode, and set these bits to the correct values for operating in host only mode when no gpios are specified in the devicetree. While updating the devicetree binding documentation also add documentation for the sofar undocumented usage of regulators for vbus for all 3 phys. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-07-25phy: dt bindings: add NXP LPC18xx/43xx USB OTG PHY bindingsJoachim Eastwood1-0/+26
Add binding documentation for NXP LPC18xx/43xx USB OTG PHY. This PHY can found on NXP LPC18xx and LPC43xx devices with USB support. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-06-27Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds1-0/+29
Pull MIPS updates from Ralf Baechle: - Improvements to the tlb_dump code - KVM fixes - Add support for appended DTB - Minor improvements to the R12000 support - Minor improvements to the R12000 support - Various platform improvments for BCM47xx - The usual pile of minor cleanups - A number of BPF fixes and improvments - Some improvments to the support for R3000 and DECstations - Some improvments to the ATH79 platform support - A major patchset for the JZ4740 SOC adding support for the CI20 platform - Add support for the Pistachio SOC - Minor BMIPS/BCM63xx platform support improvments. - Avoid "SYNC 0" as memory barrier when unlocking spinlocks - Add support for the XWR-1750 board. - Paul's __cpuinit/__cpuinitdata cleanups. - New Malta CPU board support large memory so enable ZONE_DMA32. * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (131 commits) MIPS: spinlock: Adjust arch_spin_lock back-off time MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA MIPS: BCM47xx: Simplify handling SPROM revisions MIPS: Cobalt Don't use module_init in non-modular MTD registration. MIPS: BCM47xx: Move NVRAM driver to the drivers/firmware/ MIPS: use for_each_sg() MIPS: BCM47xx: Don't select BCMA_HOST_PCI MIPS: BCM47xx: Add helper variable for storing NVRAM length MIPS: IRQ/IP27: Move IRQ allocation API to platform code. MIPS: Replace smp_mb with release barrier function in unlocks. MIPS: i8259: DT support MIPS: Malta: Basic DT plumbing MIPS: include errno.h for ENODEV in mips-cm.h MIPS: Define GCR_GIC_STATUS register fields MIPS: BPF: Introduce BPF ASM helpers MIPS: BPF: Use BPF register names to describe the ABI MIPS: BPF: Move register definition to the BPF header MIPS: net: BPF: Replace RSIZE with SZREG MIPS: BPF: Free up some callee-saved registers MIPS: Xtalk: Update xwidget.h with known Xtalk device numbers ...
2015-06-21phy: Add binding document for Pistachio USB2.0 PHYAndrew Bresticker1-0/+29
Add a binding document for the USB2.0 PHY found on the IMG Pistachio SoC. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: James Hartley <james.hartley@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/9727/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-06-09dt-bindings: Add Marvell PXA1928 USB and HSIC PHY bindingsRob Herring1-0/+18
Add PHY binding for Marvell PXA1928 SOC's USB and HSIC PHYs. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: devicetree@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-05-22Documentation: devicetree: add Broadcom SATA PHY bindingBrian Norris1-0/+40
For 28nm STB chips, based on BCM7445. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-05-21phy: rcar-gen2: Add support for R-Car E2Yoshihiro Shimoda1-0/+1
This patch adds a compatible string to support for R-Car E2. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-04-18Merge tag 'devicetree-for-linus' of ↵Linus Torvalds1-0/+0
git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux Pull devicetree changes from Grant Likely: "Here are the devicetree changes queued up for v4.1. Nothing really exciting here. Rob has another few commits for big-endian attached UARTs, but those will be sent in a separate merge request since they haven't been as thoroughly tested as this batch. Here are the highlights: - lots of unittest cleanup from Frank Rowand - bugfixes and updates to the of_graph code - tighten up of_get_mac_address() code - documentation updates" * tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux: of/unittest: Fix of_platform_depopulate test case of/unittest: early return from test skips tests of/unittest: breadcrumbs to reduce pain of future maintainers of/unittest: reduce checkpatch noise - line after declarations of/unittest: typo in error string of/unittest: add const where needed of_net: factor out repetitive code from of_get_mac_address() drivers/of: Add empty ranges quirk for PA-Semi of: Allow selection of OF_DYNAMIC and OF_OVERLAY if OF_UNITTEST of: Empty node & property flag accessors when !OF of: Explicitly include linux/types.h in of_graph.h dt-bindings: brcm: rationalize Broadcom documentation naming of/unittest: replace 'selftest' with 'unittest' Documentation: rename of_selftest.txt to of_unittest.txt Documentation: update the of_selftest.txt dt: OF_UNITTEST make dependency broken MAINTAINERS: Pantelis Antoniou device tree overlay maintainer of: Add of_graph_get_port_by_id function of: Add for_each_endpoint_of_node helper macro of: Decrement refcount of previous endpoint in of_graph_get_next_endpoint
2015-04-03phy: miphy365x: Use the generic phy type constants in dt-bindings/phy/phy.hPeter Griffin1-4/+4
Now there are generic phy type constants declared in phy.h, migrate over to using them rather than defining our own. This change has been done as one atomic commit to be bisectable. Note: The values of the defines are the same, so there is no ABI breakage with this patch. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-04-03phy: Add driver to support individual USB PHYs on sun9iChen-Yu Tsai1-0/+38
Unlike previous Allwinner SoCs, there is no central PHY control block on the A80. Also, OTG support is completely split off into a different controller. This adds a new driver to support the regular USB PHYs. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-04-03phy: Add a driver for dm816x USB PHYTony Lindgren1-0/+24
Add a minimal driver for dm816x USB. This makes USB work on dm816x without any other changes needed as it can use the existing musb_dsps glue layer for the USB controller. Note that this phy is different from dm814x and am335x. Cc: Bin Liu <binmlist@gmail.com> Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Bolle <pebolle@tiscali.nl> Cc: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-03-26dt-bindings: brcm: rationalize Broadcom documentation namingScott Branden1-0/+0
This patchset attempts to standardize the naming of dt-bindings documents based on the Broadcom vendor prefix of brcm. Although there are no guidelines currently present for how to name the dt-bindings document the "vendor,binding.txt" style is in use by some of the other vendors. Acked-by: Lee Jones <lee@kernel.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Rob Herring <robh@kernel.org>
2015-03-26phy: exynos5-usbdrd: Add to support for Exynos5433 SoCJaewon Kim1-1/+2
This patch adds driver data to support for Exynos5433 SoC. The Exynos5433 has one USB3.0 Host and USB3.0 DRD(Dual Role Device). Exynos5433 is simplar to Eyxnos7 but Exynos5433 have one more USB3.0 Host controller. Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-30phy: miphy365x: Pass sysconfig register offsets via syscfg dt property.Peter Griffin1-7/+8
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, update the miphy365 phy driver to access sysconfig register offsets via syscfg dt property. This is because the reg property should not be mixing address spaces like it does currently for miphy365. This change then also aligns us to how other platforms such as keystone and bcm7445 pass there syscon offsets via DT. This patch breaks DT compatibility, but this platform is considered WIP, and is only used by a few developers who are upstreaming support for it. This change has been done as a single atomic commit to ensure it is bisectable. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Tested-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-01-30phy: exynos-video-mipi: Fix regression by adding support for PMU regmapSylwester Nawrocki1-1/+1
After the Exynos Power Management Unit (PMU) driver was converted to the platform device driver in commit 14fc8b93d47323561edf5d482 ("ARM: EXYNOS: Add platform driver support for Exynos PMU") and then PMU device nodes added to Exynos4 DTs in commit 7b9613aca42a5522d269 ("ARM: dts: add PMU syscon node for exynos4") the mipi video phy driver started failing probing, due to overlapping memory mapped register region resources. Now all the Exynos peripheral devices which have registers in the PMU region are supposed to use the regmap provided by the syscon driver. So support for regmap is added in this patch, this unfortunately creates yet another indirection into that supposedly trivial driver. The additional mutex is required because single register is used by PHY pairs (they share bit in a register). An improvement here could be to allow a PHY instance be created with a driver custom mutex, which would then be common for each PHY pair. This would eliminate one of 3 mutexes which need to be taken in the phy_power_on/ phy_power_off code path. However, I tried to keep this bug fix patch possibly simple. This change is needed to make MIPI DSI displays and MIPI CSI-2 camera sensors working again on Exynos4 boards. Cc: Pankaj Dubey <pankaj.dubey@samsung.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-30Documentation: bindings: add dt documentation for Rockchip usb PHYYunzhi Li1-0/+37
This patch adds a binding that describes the Rockchip usb PHYs found on Rockchip SoCs usb interface. Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-21phy: phy-stih407-usb: Pass sysconfig register offsets via syscfg property.Peter Griffin1-8/+2
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, update the phy driver to not use the reg property to access the sysconfig register offsets. This is because other phy's (miphy28, miphy365) have a combination of memory mapped registers and sysconfig control regs, and we shouldn't be mixing address spaces in the reg property. In addition we would ideally like the sysconfig offsets to be passed via DT in a uniform way. This new method will also allow us to support devices which have sysconfig registers in different banks more easily and it is also analagous to how keystone and bcm7745 platforms pass there syscon offsets in DT. This breaks DT compatibility, but this platform is considered WIP, and is only used by a few developers who are upstreaming support for it. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-21phy: miphy28lp: Pass sysconfig register offsets via syscfg dt property.Gabriel FERNANDEZ1-27/+16
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161, update the miphy28lp phy driver to access sysconfig register offsets via syscfg dt property. This is because the reg property should not be mixing address spaces like it does currently for miphy28lp. This change then also aligns us to how other platforms such as keystone and bcm7445 pass there syscon offsets via DT. I have updated the miphy28lp phy driver same way as Peter's implementation. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-26Phy: DT binding documentation for the Armada 375 USB cluster bindingGregory CLEMENT1-0/+21
Armada 375 comes with an USB2 host and device controller and an USB3 controller. The USB cluster control register allows to manage common features of both USB controllers. This commit adds the Device Tree binding documentation for this piece of hardware. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-26Phy: DT binding documentation for Marvell MVEBU SATA phy.Andrew Lunn1-0/+22
Describe the binding for the Marvell MVEBU SATA phy. This driver can be used at least with Kirkwood, Dove and maybe others. Additionally, update the SATA binding with the properties to link to the phy nodes. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-22phy: exynos5-usbdrd: Add pipe-clk, utmi-clk and itp-clk supportVivek Gautam1-0/+6
Exynos7 SoC has now separate gate control for 125MHz pipe3 phy clock, as well as 60MHz utmi phy clock. Additionally, separate gate control is available for the clock used for ITP (Isochronous Transfer Packet) generation. So get the same and control in the phy-exynos5-usbdrd driver. Suggested-by: Anton Tikhomirov <av.tikhomirov@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-21Documentation: bindings: add doc for the Berlin USB PHYAntoine Tenart1-0/+16
Document the bindings of the Marvell Berlin USB PHY driver. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-13phy: berlin-sata: Document BG2 compatibleSebastian Hesselbarth1-1/+3
Berlin BG2 SATA PHY is slightly different from currently supported BG2Q SATA PHY. Document the new compatible for BG2's PHY. Acked-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-12phy: miphy28lp: Tune tx impedance across Soc cutsGabriel FERNANDEZ1-0/+1
This patch to compensate tx impedance (Sata, PCIe) depending on Soc cuts the kernel is built for. Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>