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On some boards the 100MHz PCIe reference clock to both controller and
devices is controllable. Add that clock to the list of clocks.
The clock is optional, so the minItems stays the same.
Link: https://lore.kernel.org/linux-pci/20231206145041.667900-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Rockchip RK356x and RK3588 handle legacy interrupts via a ganged
interrupts. The RK356x DT implements this via a sub-node named
"legacy-interrupt-controller", just like a couple of other PCIe
implementations. This adds proper documentation for this and updates
the example to avoid regressions.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230731165723.53069-5-sebastian.reichel@collabora.com
Signed-off-by: Rob Herring <robh@kernel.org>
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Use the generic binding for Rockchip. This should either be
ignored/dropped or squashed into the previous commit.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230731165723.53069-4-sebastian.reichel@collabora.com
Signed-off-by: Rob Herring <robh@kernel.org>
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The RK356x (and RK3588) have 5 ganged interrupts. For example the
"legacy" interrupt combines "inta/intb/intc/intd" with a register
providing the details, which specific interrupt triggered. The
interrupts from the second level are part of the Synopsys DW PCIe
System Information Interface (SII). Some of them are listed in the
Interrupt Signals section, the others are mostly common SII output
signals. The grouping and the ganged interrupt controllers are
specific to the Rockchip implementation.
Currently the binding is not specifying these interrupts resulting
in a bunch of errors for all rk356x/rk3588 boards using PCIe.
Fix this by specifying the interrupts and add them to the example
to prevent regressions.
This changes the reference from snps,dw-pcie.yaml to
snps,dw-pcie-common.yaml, since the interrupts are vendor
specific and should not be listed in the generic file. The
only other bit from the generic binding are the reg-names,
which are overwritten by this binding.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230731165723.53069-3-sebastian.reichel@collabora.com
Signed-off-by: Rob Herring <robh@kernel.org>
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The PCIe 2.0 controllers on RK3588 need one additional clock,
one additional reset line and one for ranges entry.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230616170022.76107-4-sebastian.reichel@collabora.com
Signed-off-by: Rob Herring <robh@kernel.org>
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PCIe for RK3588 is the same as RK3568.
Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230314135555.44162-2-lucas.tanure@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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As the DT-bindings description states the Rockchip PCIe controller is
based on the DW PCIe RP IP-core thus its DT-nodes are supposed to be
compatible with the common DW PCIe controller schema. Let's make sure they
are evaluated against it by referring to the snps,dw-pcie.yaml schema in
the allOf sub-schemas composition.
Link: https://lore.kernel.org/r/20221113191301.5526-14-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
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The snps,dw-pcie binds to a standalone driver. It is not fully
compatible with the Rockchip implementation and causes a hang if it
binds to the device.
Remove this binding as a valid fallback.
Link: https://lore.kernel.org/r/20220429123832.2376381-2-pgwipeout@gmail.com
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
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Document DT bindings for PCIe controller found on Rockchip SoC.
Link: https://lore.kernel.org/r/20210818093406.157788-1-xxm@rock-chips.com
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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