Age | Commit message (Collapse) | Author | Files | Lines |
|
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
- Add Krzysztof Kozlowski as co-maintainer for DT bindings providing
much needed help.
- DT schema validation now takes DTB files as input rather than
intermediate YAML files. This decouples the validation from the
source level syntax information. There's a bunch of schema fixes as a
result of switching to DTB based validation which exposed some errors
and incomplete schemas and examples.
- Kbuild improvements to explicitly warn users running 'make
dt_binding_check' on missing yamllint
- Expand DT_SCHEMA_FILES kbuild variable to take just a partial
filename or path instead of the full path to 1 file.
- Convert various bindings to schema format: mscc,vsc7514-switch,
multiple GNSS bindings, ahci-platform, i2c-at91, multiple UFS
bindings, cortina,gemini-sata-bridge, cortina,gemini-ethernet, Atmel
SHA, Atmel TDES, Atmel AES, armv7m-systick, Samsung Exynos display
subsystem, nuvoton,npcm7xx-timer, samsung,s3c2410-i2c, zynqmp_dma,
msm/mdp4, rda,8810pl-uart
- New schemas for u-boot environment variable partition, TI clksel
- New compatible strings for Renesas RZ/V2L SoC
- Vendor prefixes for Xen, HPE, deprecated Synopsys, deprecated
HiSilicon
- Add/fix schemas for QEMU Arm 'virt' machine
- Drop unused of_alias_get_alias_list() function
- Add a script to check DT unittest EXPECT message output. Pass
messages also now print by default at PR_INFO level to help test
automation.
* tag 'devicetree-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (96 commits)
dt-bindings: kbuild: Make DT_SCHEMA_LINT a recursive variable
dt-bindings: nvmem: add U-Boot environment variables binding
dt-bindings: ufs: qcom: Add SM6350 compatible string
dt-bindings: dmaengine: sifive,fu540-c000: include generic schema
dt-bindings: gpio: pca95xx: drop useless consumer example
Revert "of: base: Introduce of_alias_get_alias_list() to check alias IDs"
dt-bindings: virtio,mmio: Allow setting devices 'dma-coherent'
dt-bindings: gnss: Add two more chips
dt-bindings: gnss: Rewrite sirfstar binding in YAML
dt-bindings: gnss: Modify u-blox to use common bindings
dt-bindings: gnss: Rewrite common bindings in YAML
dt-bindings: ata: ahci-platform: Add rk3568-dwc-ahci compatible
dt-bindings: ata: ahci-platform: Add power-domains property
dt-bindings: ata: ahci-platform: Convert DT bindings to yaml
dt-bindings: kbuild: Use DTB files for validation
dt-bindings: kbuild: Pass DT_SCHEMA_FILES to dt-validate
dt-bindings: Add QEMU virt machine compatible
dt-bindings: arm: Convert QEMU fw-cfg to DT schema
dt-bindings: i2c: at91: Add SAMA7G5 compatible strings list
dt-bindings: i2c: convert i2c-at91 to json-schema
...
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull MTD updates from Miquel Raynal:
"There has been a lot of activity in the MTD subsystem recently, with a
number of SPI-NOR cleanups as well as the introduction of ECC engines
that can be used by SPI controllers (hence a few SPI patches in here).
Core MTD changes:
- Replace the expert mode symbols with a single helper
- Fix misuses of of_match_ptr()
- Remove partid and partname debugfs files
- tests: Fix eraseblock read speed miscalculation for lower partition
sizes
- TRX parser: Allow to use on MediaTek MIPS SoCs
MTD driver changes:
- spear_smi: use GFP_KERNEL
- mchp48l640: Add SPI ID table
- mchp23k256: Add SPI ID table
- blkdevs: Avoid soft lockups with some mtd/spi devices
- aspeed-smc: Improve probe resilience
Hyperbus changes:
- HBMC_AM654 should depend on ARCH_K3
NAND core changes:
- ECC:
- Add infrastructure to support hardware engines
- Add a new helper to retrieve the ECC context
- Provide a helper to retrieve a pilelined engine device
NAND-ECC changes:
- Macronix ECC engine:
- Add Macronix external ECC engine support
- Support SPI pipelined mode
- Make two read-only arrays static const
- Fix compile test issue
Raw NAND core changes:
- Fix misuses of of_match_node()
- Rework of_get_nand_bus_width()
- Remove of_get_nand_on_flash_bbt() wrapper
- Protect access to rawnand devices while in suspend
- bindings: Document the wp-gpios property
Rax NAND controller driver changes:
- atmel: Fix refcount issue in atmel_nand_controller_init
- nandsim:
- Add NS_PAGE_BYTE_SHIFT macro to replace the repeat pattern
- Merge repeat codes in ns_switch_state
- Replace overflow check with kzalloc to single kcalloc
- rockchip: Fix platform_get_irq.cocci warning
- stm32_fmc2: Add NAND Write Protect support
- pl353: Set the nand chip node as the flash node
- brcmnand: Fix sparse warnings in bcma_nand
- omap_elm: Remove redundant variable 'errors'
- gpmi:
- Support fast edo timings for mx28
- Validate controller clock rate
- Fix controller timings setting
- brcmnand:
- Add BCMA shim
- BCMA controller uses command shift of 0
- Allow platform data instantation
- Add platform data structure for BCMA
- Allow working without interrupts
- Move OF operations out of brcmnand_init_cs()
- Avoid pdev in brcmnand_init_cs()
- Allow SoC to provide I/O operations
- Assign soc as early as possible
Onenand changes:
- Check for error irq
SPI-NAND core changes:
- Delay a little bit the dirmap creation
- Create direct mapping descriptors for ECC operations
SPI-NAND driver changes:
- macronix: Use random program load
SPI NOR core changes:
- Move vendor specific code out of the core into vendor drivers.
- Unify all function and object names in the vendor modules.
- Make setup() callback optional to improve readability.
- Skip erase logic when the SPI_NOR_NO_ERASE flag is set at flash
declaration.
SPI changes:
- Macronix SPI controller:
- Fix the transmit path
- Create a helper to configure the controller before an operation
- Create a helper to ease the start of an operation
- Add support for direct mapping
- Add support for pipelined ECC operations
- spi-mem:
- Introduce a capability structure
- Check the controller extra capabilities
- cadence-quadspi/mxic: Provide capability structures
- Kill the spi_mem_dtr_supports_op() helper
- Add an ecc parameter to the spi_mem_op structure
Binding changes:
- Dropped mtd/cortina,gemini-flash.txt
- Convert BCM47xx partitions to json-schema
- Vendor prefixes: Clarify Macronix prefix
- SPI NAND: Convert spi-nand description file to yaml
- Raw NAND chip: Create a NAND chip description
- Raw NAND controller:
- Harmonize the property types
- Fix a comment in the examples
- Fix the reg property description
- Describe Macronix NAND ECC engine
- Macronix SPI controller:
- Document the nand-ecc-engine property
- Convert to yaml
- The interrupt property is not mandatory"
* tag 'mtd/changes-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (104 commits)
mtd: nand: ecc: mxic: Fix compile test issue
mtd: nand: mxic-ecc: make two read-only arrays static const
mtd: hyperbus: HBMC_AM654 should depend on ARCH_K3
mtd: core: Remove partid and partname debugfs files
dt-bindings: mtd: partitions: convert BCM47xx to the json-schema
mtd: tests: Fix eraseblock read speed miscalculation for lower partition sizes
mtd: rawnand: atmel: fix refcount issue in atmel_nand_controller_init
mtd: rawnand: rockchip: fix platform_get_irq.cocci warning
mtd: spi-nor: Skip erase logic when SPI_NOR_NO_ERASE is set
mtd: spi-nor: renumber flags
mtd: spi-nor: slightly change code style in spi_nor_sr_ready()
mtd: spi-nor: spansion: rename vendor specific functions and defines
mtd: spi-nor: spansion: convert USE_CLSR to a manufacturer flag
mtd: spi-nor: move all spansion specifics into spansion.c
mtd: spi-nor: spansion: slightly rework control flow in late_init()
mtd: spi-nor: micron-st: rename vendor specific functions and defines
mtd: spi-nor: micron-st: convert USE_FSR to a manufacturer flag
mtd: spi-nor: move all micron-st specifics into micron-st.c
mtd: spi-nor: xilinx: correct the debug message
mtd: spi-nor: xilinx: rename vendor specific functions and defines
...
|
|
Raw NAND core changes:
* Rework of_get_nand_bus_width()
* Remove of_get_nand_on_flash_bbt() wrapper
* Protect access to rawnand devices while in suspend
* bindings: Document the wp-gpios property
Rax NAND controller driver changes:
* atmel: Fix refcount issue in atmel_nand_controller_init
* nandsim:
- Add NS_PAGE_BYTE_SHIFT macro to replace the repeat pattern
- Merge repeat codes in ns_switch_state
- Replace overflow check with kzalloc to single kcalloc
* rockchip: Fix platform_get_irq.cocci warning
* stm32_fmc2: Add NAND Write Protect support
* pl353: Set the nand chip node as the flash node
* brcmnand: Fix sparse warnings in bcma_nand
* omap_elm: Remove redundant variable 'errors'
* gpmi:
- Support fast edo timings for mx28
- Validate controller clock rate
- Fix controller timings setting
* brcmnand:
- Add BCMA shim
- BCMA controller uses command shift of 0
- Allow platform data instantation
- Add platform data structure for BCMA
- Allow working without interrupts
- Move OF operations out of brcmnand_init_cs()
- Avoid pdev in brcmnand_init_cs()
- Allow SoC to provide I/O operations
- Assign soc as early as possible
Onenand changes:
* Check for error irq
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
|
|
This helps validating DTS files.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220216104135.31307-1-zajec5@gmail.com
|
|
Another pass at removing unnecessary use of 'allOf' with a '$ref'.
json-schema versions draft7 and earlier have a weird behavior in that
any keywords combined with a '$ref' are ignored (silently). The correct
form was to put a '$ref' under an 'allOf'. This behavior is now changed
in the 2019-09 json-schema spec and '$ref' can be mixed with other
keywords.
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Guenter Roeck <groeck@chromium.org>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Marek Behún <kabel@kernel.org>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Jakub Kicinski <kuba@kernel.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228213802.1639658-1-robh@kernel.org
|
|
The Xilinx QSPI controller has two advanced modes which allow the
controller to behave differently and consider two flashes as one single
storage.
One of these two modes is quite complex to support from a binding point
of view and is the dual parallel memories. In this mode, each byte of
data is stored in both devices: the even bits in one, the odd bits in
the other. The split is automatically handled by the QSPI controller and
is transparent for the user.
The other mode is simpler to support, it is called dual stacked
memories. The controller shares the same SPI bus but each of the devices
contain half of the data. Once in this mode, the controller does not
follow CS requests but instead internally wires the two CS levels with
the value of the most significant address bit.
Supporting these two modes will involve core changes which include the
possibility of providing two CS for a single SPI device
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220126112608.955728-2-miquel.raynal@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|
|
A few drivers use this property to describe the GPIO pin used to protect
the NAND during program/erase operations.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220217144755.270679-2-christophe.kerello@foss.st.com
|
|
Drop mtd/cortina,gemini-flash.txt since it is nearly already handled by
Documentation/devicetree/bindings/mtd/mtd-physmap.yaml.
We add jedec-flash to list of compatible because one board (gemini-dlink-dns-313.dts) needs it.
See commit a10d862e585e ("ARM: dts: Fix the DNS-313 flash compatible")
The flash on the DNS-313 needs to be probed as JEDEC, it does not conform to the common CFI standard.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220211120842.3388592-1-clabbe@baylibre.com
|
|
Describe Macronix NAND ECC engine. This engine may be used as an
external engine or can be pipelined with either a raw NAND controller or
a SPI controller. Both hardware designs with a SPI controller are shown
in the examples.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-11-miquel.raynal@bootlin.com
|
|
Let's get rid of spi-nand.txt by converting it to yaml schema. While at
converting this file, let's actually pull all the generic properties
from nand-chip.yaml which might apply to a SPI-NAND chip.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-6-miquel.raynal@bootlin.com
|
|
Move the NAND chip description out of the NAND controller file. Indeed,
a subsequent part of the properties supported by a raw NAND chip are
also supported by SPI-NAND chips. So let's create a generic NAND chip
description which will be pulled by nand-controller.yaml and later by
spi-nand.yaml as well.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-5-miquel.raynal@bootlin.com
|
|
Harmonize the different properties in this file by:
* dropping the non-necessary allOf's
* always defining the keywords in the following order:
- first the "description" (when relevant),
- then the "type"/"$ref" and the other generic keywords ("enum",
"default", etc).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-4-miquel.raynal@bootlin.com
|
|
The controller properties should be in the controller 'parent' node,
while properties in the children nodes are specific to the NAND
*chip*. This error was already present during the yaml conversion.
Fixes: 2d472aba15ff ("mtd: nand: document the NAND controller/NAND chip DT representation")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-3-miquel.raynal@bootlin.com
|
|
The reg property of a NAND device always references the chip-selects.
The ready/busy lines are described in the nand-rb property. I believe
this was a harmless copy/paste error during the conversion to yaml.
Fixes: 212e49693592 ("dt-bindings: mtd: Add YAML schemas for the generic NAND options")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-2-miquel.raynal@bootlin.com
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"This has mostly been a quiet release for the SPI subsystem, almost all
cleanups and fixes to existing drivers.
A couple of changes that stand out:
- Cleanups and support for version specific features in the
DesignWare controller.
- Removal of support for Netlogic devices from the XLP driver, the
platform had previously been removed by MIPS so the support
couldn't be used.
- Conversion of several DT bindings to YAML format"
* tag 'spi-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (53 commits)
spi: don't include ptp_clock_kernel.h in spi.h
spi: spi-meson-spifc: Add missing pm_runtime_disable() in meson_spifc_probe
spi: atmel: Fix typo
spi: dt-bindings: mediatek,spi-mtk-nor: Fix example 'interrupts' property
spi: qcom: geni: handle timeout for gpi mode
spi: qcom: geni: set the error code for gpi transfer
spi: spi-mux: Add reference to spi-peripheral-props.yaml schema
spi: ar934x: fix transfer size
spi: pxa2xx: Propagate firmware node
spi: dw: Propagate firmware node
spi: dln2: Propagate firmware node
spi: ar934x: fix transfer and word delays
spi: uniphier: Fix a bug that doesn't point to private data correctly
spi: spi-mtk-nor: add new clock name 'axi' for spi nor
spi: atmel,quadspi: Define sama7g5 QSPI
spi: atmel,quadspi: Convert to json-schema
spi: Fix incorrect cs_setup delay handling
dt-bindings: mtd: spi-nor: Add a reference to spi-peripheral-props.yaml
spi: dt-bindings: cdns,qspi-nor: Move peripheral-specific properties out
spi: dt-bindings: add schema listing peripheral-specific properties
...
|
|
Add a Yaml description for this Renesas NAND controller.
As this controller is embedded on different SoC families, provide:
* a family-specific "r-car-gen3" compatible and a more specific
"r8a77951" one
* a family-specific "rzn1" compatible and a more specific "r9a06g032"
one
More compatibles can be added later if new SoCs with this controller
must be supported.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/linux-mtd/20211217142033.353599-2-miquel.raynal@bootlin.com
|
|
AM64 SoC contains the GPMC NAND controller. Add compatible for it.
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20211209090458.24830-2-rogerq@kernel.org
|
|
With 'unevaluatedProperties' support implemented, the TI GPMC example
has a warning:
Documentation/devicetree/bindings/memory-controllers/ti,gpmc.example.dt.yaml: nand@0,0: Unevaluated properties are not allowed ('rb-gpios' was unexpected)
Add the missing definition for 'rb-gpios'.
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Roger Quadros <rogerq@kernel.org>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20211206174209.2297565-1-robh@kernel.org
|
|
The spi-peripheral-props.yaml schema contains peripheral-specific
properties for SPI controllers that should be present in the peripheral
node. Add a reference to that so its constraints are followed.
additionalProperties: false cannot be used since it marks the controller
properties as unknown. Use unevaluatedProperties: false instead. This
has the side effect of allowing extra properties that are not specified
in the schema. The alternative is to list all the controller properties
in this schema but that would mean every peripheral binding would have
to repeat the same set of properties for each controller.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211109181911.2251-4-p.yadav@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|
|
Not all @st.com email address are concerned, only people who have
a specific @foss.st.com email will see their entry updated.
For some people, who left the company, remove their email.
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Cc: Fabien Dessenne <fabien.dessenne@foss.st.com>
Cc: Christophe Roullier <christophe.roullier@foss.st.com>
Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Cc: Lionel Debieve <lionel.debieve@foss.st.com>
Cc: Amelie Delaunay <amelie.delaunay@foss.st.com>
Cc: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
Cc: Ludovic Barre <ludovic.barre@foss.st.com>
Cc: Christophe Kerello <christophe.kerello@foss.st.com>
Cc: pascal Paillet <p.paillet@foss.st.com>
Cc: Erwan Le Ray <erwan.leray@foss.st.com>
Cc: Philippe CORNU <philippe.cornu@foss.st.com>
Cc: Yannick Fertre <yannick.fertre@foss.st.com>
Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Cc: Olivier Moysan <olivier.moysan@foss.st.com>
Cc: Hugues Fruchet <hugues.fruchet@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20211110150144.18272-6-patrice.chotard@foss.st.com
Signed-off-by: Rob Herring <robh@kernel.org>
|
|
Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files
related to Ingenic SoCs with 'ingenic,'.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net
|
|
Convert gpmc-onenand.txt to ti,gpmc-onenand.yaml.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Convert gpmc-nand.txt to ti,gpmc-nand.yaml.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
There is no GPMC NOR compatible or device driver. GPMC is just
a bus interface over which standard (CFI/JEDC) NOR Flash chips
can be attached.
For NOR chip bindings, please refer to
Documentation/devicetree/bindings/mtd/mtd-physmap.yaml
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull MTD updates from Miquel Raynal:
"MTD changes:
- blkdevs:
- Simplify the refcounting in blktrans_{open, release}
- Simplify blktrans_getgeo
- Remove blktrans_ref_mutex
- Simplify blktrans_dev_get
- Use lockdep_assert_held
- Don't hold del_mtd_blktrans_dev in blktrans_{open, release}
- ftl:
- Don't cast away the type when calling add_mtd_blktrans_dev
- Don't cast away the type when calling add_mtd_blktrans_dev
- Use container_of() rather than cast
- Fix use-after-free
- Add discard support
- Allow use of MTD_RAM for testing purposes
- concat:
- Check _read, _write callbacks existence before assignment
- Judge callback existence based on the master
- maps:
- Maps: remove dead MTD map driver for PMC-Sierra MSP boards
- mtdblock:
- Warn if added for a NAND device
- Add comment about UBI block devices
- Update old JFFS2 mention in Kconfig
- partitions:
- Redboot: convert to YAML
NAND core changes:
- Repair Miquel Raynal's email address in MAINTAINERS
- Fix a couple of spelling mistakes in Kconfig
- bbt: Skip bad blocks when searching for the BBT in NAND
- Remove never changed ret variable
Raw NAND changes:
- cafe: Fix a resource leak in the error handling path of 'cafe_nand_probe()'
- intel: Fix error handling in probe
- omap: Fix kernel doc warning on 'calcuate' typo
- gpmc: Fix the ECC bytes vs. OOB bytes equation
SPI-NAND core changes:
- Properly fill the OOB area.
- Fix comment
SPI-NAND drivers changes:
- macronix: Add Quad support for serial NAND flash"
* tag 'mtd/for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (30 commits)
mtd: rawnand: cafe: Fix a resource leak in the error handling path of 'cafe_nand_probe()'
mtd_blkdevs: simplify the refcounting in blktrans_{open, release}
mtd_blkdevs: simplify blktrans_getgeo
mtd_blkdevs: remove blktrans_ref_mutex
mtd_blkdevs: simplify blktrans_dev_get
mtd/rfd_ftl: don't cast away the type when calling add_mtd_blktrans_dev
mtd/ftl: don't cast away the type when calling add_mtd_blktrans_dev
mtd_blkdevs: use lockdep_assert_held
mtd_blkdevs: don't hold del_mtd_blktrans_dev in blktrans_{open, release}
mtd: rawnand: intel: Fix error handling in probe
mtd: mtdconcat: Check _read, _write callbacks existence before assignment
mtd: mtdconcat: Judge callback existence based on the master
mtd: maps: remove dead MTD map driver for PMC-Sierra MSP boards
mtd: rfd_ftl: use container_of() rather than cast
mtd: rfd_ftl: fix use-after-free
mtd: rfd_ftl: add discard support
mtd: rfd_ftl: allow use of MTD_RAM for testing purposes
mtdblock: Warn if added for a NAND device
mtd: spinand: macronix: Add Quad support for serial NAND flash
mtdblock: Add comment about UBI block devices
...
|
|
NAND core changes:
* Repair Miquel Raynal's email address in MAINTAINERS
* Fix a couple of spelling mistakes in Kconfig
* bbt: Skip bad blocks when searching for the BBT in NAND
* Remove never changed ret variable
Raw NAND changes:
* cafe: Fix a resource leak in the error handling path of 'cafe_nand_probe()'
* intel: Fix error handling in probe
* omap: Fix kernel doc warning on 'calcuate' typo
* gpmc: Fix the ECC bytes vs. OOB bytes equation
SPI-NAND core changes:
* Properly fill the OOB area.
* Fix comment
SPI-NAND drivers changes:
* macronix: Add Quad support for serial NAND flash
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
- Refactor arch kdump DT related code to a common implementation
- Add fw_devlink tracking for 'phy-handle', 'leds', 'backlight',
'resets', and 'pwm' properties
- Various clean-ups to DT FDT code
- Fix a runtime error for !CONFIG_SYSFS
- Convert Synopsys DW PCI and derivative binding docs to schemas. Add
Toshiba Visconti PCIe binding.
- Convert a bunch of memory controller bindings to schemas
- Covert eeprom-93xx46, Samsung Exynos TRNG, Samsung Exynos IRQ
combiner, arm-charlcd, img-ascii-lcd, UniPhier eFuse, Xilinx Zynq
MPSoC FPGA, Xilinx Zynq MPSoC reset, Mediatek mmsys, Gemini boards,
brcm,iproc-i2c, faraday,ftpci100, and ks8851 net to DT schema.
- Extend nvmem bindings to handle bit offsets in unit-addresses
- Add DT schemas for HiKey 970 PCIe PHY
- Remove unused ZTE, energymicro,efm32-timer, and Exynos SATA bindings
- Enable dtc pci_device_reg warning by default
- Fixes for handling 'unevaluatedProperties' in preparation to enable
pending support in the tooling for jsonschema 2020-12 draft
* tag 'devicetree-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
dt-bindings: display: remove zte,vou.txt binding doc
dt-bindings: hwmon: merge max1619 into trivial devices
dt-bindings: mtd-physmap: Add 'arm,vexpress-flash' compatible
dt-bindings: PCI: imx6: convert the imx pcie controller to dtschema
dt-bindings: Use 'enum' instead of 'oneOf' plus 'const' entries
dt-bindings: Add vendor prefix for Topic Embedded Systems
of: fdt: Rename reserve_elfcorehdr() to fdt_reserve_elfcorehdr()
arm64: kdump: Remove custom linux,usable-memory-range handling
arm64: kdump: Remove custom linux,elfcorehdr handling
riscv: Remove non-standard linux,elfcorehdr handling
of: fdt: Use IS_ENABLED(CONFIG_BLK_DEV_INITRD) instead of #ifdef
of: fdt: Add generic support for handling usable memory range property
of: fdt: Add generic support for handling elf core headers property
crash_dump: Make elfcorehdr address/size symbols always visible
dt-bindings: memory: convert Samsung Exynos DMC to dtschema
dt-bindings: devfreq: event: convert Samsung Exynos PPMU to dtschema
dt-bindings: devfreq: event: convert Samsung Exynos NoCP to dtschema
kbuild: Enable dtc 'pci_device_reg' warning by default
dt-bindings: soc: remove obsolete zte zx header
dt-bindings: clock: remove obsolete zte zx header
...
|
|
The 'arm,vexpress-flash' compatible is in use, but has never been documented,
so add it now.
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210819182427.1175753-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
|
|
Changeset 63f8e9e0ac65 ("dt-bindings: mtd: Convert mtd-physmap to DT schema")
renamed: Documentation/devicetree/bindings/mtd/mtd-physmap.txt
to: Documentation/devicetree/bindings/mtd/mtd-physmap.yaml.
Update its cross-reference accordingly.
Fixes: 63f8e9e0ac65 ("dt-bindings: mtd: Convert mtd-physmap to DT schema")
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/ab2ff9ee66110c37691b467ec8b4679e9d426416.1626947923.git.mchehab+huawei@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
|
|
"PAGESIZE / 512" is the number of ECC chunks.
"ECC_BYTES" is the number of bytes needed to store a single ECC code.
"2" is the space reserved by the bad block marker.
"2 + (PAGESIZE / 512) * ECC_BYTES" should of course be lower or equal
than the total number of OOB bytes, otherwise it won't fit.
Fix the equation by substituting s/>=/<=/.
Suggested-by: Ryan J. Barnett <ryan.barnett@collins.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20210610143945.3504781-1-miquel.raynal@bootlin.com
|
|
Converts mtd/partitions/redboot-fis.txt to YAML.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210628191440.2823024-1-clabbe@baylibre.com
|
|
Another round of removing redundant minItems/maxItems from new schema in
the recent merge window.
If a property has an 'items' list, then a 'minItems' or 'maxItems' with the
same size as the list is redundant and can be dropped. Note that is DT
schema specific behavior and not standard json-schema behavior. The tooling
will fixup the final schema adding any unspecified minItems/maxItems.
This condition is partially checked with the meta-schema already, but
only if both 'minItems' and 'maxItems' are equal to the 'items' length.
An improved meta-schema is pending.
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Will Deacon <will@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Kamal Dasu <kdasu.kdev@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: linux-clk@vger.kernel.org
Cc: iommu@lists.linux-foundation.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-rtc@vger.kernel.org
Cc: linux-usb@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210713193453.690290-1-robh@kernel.org
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull MTD updates from Richard Weinberger:
"MTD core changes:
- Convert list_for_each to entry variant
- Use MTD_DEVICE_ATTR_RO/RW() helper macros
- Remove unnecessary OOM messages
- Potential NULL dereference in mtd_otp_size()
- Fix freeing of otp_info buffer
- Create partname and partid debug files for child MTDs
- tests:
- Remove redundant assignment to err
- Fix error return code in mtd_oobtest_init()
- Add OTP NVMEM provider support
- Allow specifying of_node
- Convert sysfs sprintf/snprintf family to sysfs_emit
Bindings changes:
- Convert ti,am654-hbmc.txt to YAML schema
- spi-nor: add otp property
- Add OTP bindings
- add YAML schema for the generic MTD bindings
- Add brcm,trx-magic
MTD device drivers changes:
- Add support for microchip 48l640 EERAM
- Remove superfluous "break"
- sm_ftl:
- Fix alignment of block comment
- nftl:
- Return -ENOMEM when kmalloc failed
- nftlcore:
- Remove set but rewrite variables
- phram:
- Fix error return code in phram_setup()
- plat-ram:
- Remove redundant dev_err call in platram_probe()
MTD parsers changes:
- Qcom:
- Fix leaking of partition name
- Redboot:
- Fix style issues
- Seek fis-index-block in the right node
- trx:
- Allow to use TRX parser on Mediatek SoCs
- Allow to specify brcm, trx-magic in DT
Raw NAND core:
- Allow SDR timings to be nacked
- Bring support for NV-DDR timings which involved a number of small
preparation changes to bring new helpers, properly introduce NV-DDR
structures, fill them, differenciate them and pick the best timing
set.
- Add the necessary infrastructure to parse the new gpio-cs property
which aims at enlarging the number of available CS when a hardware
controller is too constrained.
- Update dead URL
- Silence static checker warning in nand_setup_interface()
- BBT:
- Fix corner case in bad block table handling
- onfi:
- Use more recent ONFI specification wording
- Use the BIT() macro when possible
Raw NAND controller drivers:
- Atmel:
- Ensure the data interface is supported.
- Arasan:
- Finer grain NV-DDR configuration
- Rename the data interface register
- Use the right DMA mask
- Leverage additional GPIO CS
- Ensure proper configuration for the asserted target
- Add support for the NV-DDR interface
- Fix a macro parameter
- brcmnand:
- Convert bindings to json-schema
- OMAP:
- Various fixes and style improvements
- Add larger page NAND chips support
- PL35X:
- New driver
- QCOM:
- Avoid writing to obsolete register
- Delete an unneeded bool conversion
- Allow override of partition parser
- Marvell:
- Minor documentation correction
- Add missing clk_disable_unprepare() on error in
marvell_nfc_resume()
- R852:
- Use DEVICE_ATTR_RO() helper macro
- MTK:
- Remove redundant dev_err call in mtk_ecc_probe()
- HISI504:
- Remove redundant dev_err call in probe
SPI-NAND core:
- Light reorganisation for the introduction of a core resume handler
- Fix double counting of ECC stats
SPI-NAND manufacturer drivers:
- Macronix:
- Add support for serial NAND flash
SPI NOR core changes:
- Ability to dump SFDP tables via sysfs
- Support for erasing OTP regions on Winbond and similar flashes
- Few API doc updates and fixes
- Locking support for MX25L12805D
SPI NOR controller drivers changes:
- Use SPI_MODE_X_MASK in nxp-spifi
- Intel Alder Lake-M SPI serial flash support"
* tag 'mtd/for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (125 commits)
mtd: spi-nor: remove redundant continue statement
mtd: rawnand: omap: Add larger page NAND chips support
mtd: rawnand: omap: Various style fixes
mtd: rawnand: omap: Check return values
mtd: rawnand: omap: Rename a macro
mtd: rawnand: omap: Aggregate the HW configuration of the ELM
mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controller
dt-bindings: mtd: pl353-nand: Describe this hardware controller
MAINTAINERS: Add PL353 NAND controller entry
mtd: rawnand: qcom: avoid writing to obsolete register
mtd: rawnand: marvell: Minor documentation correction
mtd: rawnand: r852: use DEVICE_ATTR_RO() helper macro
mtd: spinand: add SPI-NAND MTD resume handler
mtd: spinand: Add spinand_init_flash() helper
mtd: spinand: add spinand_read_cfg() helper
mtd: rawnand: marvell: add missing clk_disable_unprepare() on error in marvell_nfc_resume()
mtd: rawnand: arasan: Finer grain NV-DDR configuration
mtd: rawnand: arasan: Rename the data interface register
mtd: rawnand: onfi: Fix endianness when reading NV-DDR values
mtd: rawnand: arasan: Use the right DMA mask
...
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next
Raw NAND core:
* Allow SDR timings to be nacked
* Bring support for NV-DDR timings which involved a number of small
preparation changes to bring new helpers, properly introduce NV-DDR
structures, fill them, differenciate them and pick the best timing set.
* Add the necessary infrastructure to parse the new gpio-cs property
which aims at enlarging the number of available CS when a hardware
controller is too constrained.
* Update dead URL
* Silence static checker warning in nand_setup_interface()
* BBT:
- Fix corner case in bad block table handling
* onfi:
- Use more recent ONFI specification wording
- Use the BIT() macro when possible
Raw NAND controller drivers:
* Atmel:
- Ensure the data interface is supported.
* Arasan:
- Finer grain NV-DDR configuration
- Rename the data interface register
- Use the right DMA mask
- Leverage additional GPIO CS
- Ensure proper configuration for the asserted target
- Add support for the NV-DDR interface
- Fix a macro parameter
* brcmnand:
- Convert bindings to json-schema
* OMAP:
- Various fixes and style improvements
- Add larger page NAND chips support
* PL35X:
- New driver
* QCOM:
- Avoid writing to obsolete register
- Delete an unneeded bool conversion
- Allow override of partition parser
* Marvell:
- Minor documentation correction
- Add missing clk_disable_unprepare() on error in marvell_nfc_resume()
* R852:
- Use DEVICE_ATTR_RO() helper macro
* MTK:
- Remove redundant dev_err call in mtk_ecc_probe()
* HISI504:
- Remove redundant dev_err call in probe
SPI-NAND core:
* Light reorganisation for the introduction of a core resume handler
* Fix double counting of ECC stats
SPI-NAND manufacturer drivers:
* Macronix:
- Add support for serial NAND flash
|
|
Add a yaml description of this NAND controller which is described as a
subnode of the SMC bus.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20210610082040.2075611-18-miquel.raynal@bootlin.com
|
|
Convert ti,am654-hbmc.txt to YAML schema for better checks and
validations of DT.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
|
|
The Microchip 48l640 is a 8KByte EERAM connected via SPI.
Add devicetree bindings documentation.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210607033909.1424605-2-hs@denx.de
|
|
Convert the mtd-physmap binding to DT schema format. The arm-versatile,
cypress,hyperflash and intel,ixp4xx-flash are all just an additional
compatible string, so they are all merged into the main schema.
There doesn't appear to be any users nor support for 'vendor-id' and
'device-id', so these have been dropped.
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20210607193500.3085920-1-robh@kernel.org
|
|
Convert the mux controller bindings to DT schema.
Cc: Peter Rosin <peda@axentia.se>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Wolfram Sang <wsa@kernel.org>
Acked-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210526184839.2937899-4-robh@kernel.org
|
|
To reach higher capacities, arrays of chips are now pretty common.
Unfortunately, most of the controllers have been designed a decade ago
and did not all anticipate the need for several chip-selects. The new
cs-gpios property allows to workaround this limitation by adding as many
GPIO chip-select as needed.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20210510171800.27225-1-miquel.raynal@bootlin.com
|
|
SPI-NOR flashes may have OTP regions and have a nvmem binding. This
binding is described in mtd.yaml.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210424110608.15748-5-michael@walle.cc
|
|
Flash devices can have one-time-programmable regions. Add a nvmem
binding so they can be used as a nvmem provider.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210424110608.15748-4-michael@walle.cc
|
|
Convert MTD's common.txt to mtd.yaml.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210424110608.15748-3-michael@walle.cc
|
|
This adds the description of an additional property which allows to
specify a custom partition parser magic to detect a trx partition.
Buffalo has multiple device which are using the trx format, but with
different magic values.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210418214616.239574-2-hauke@hauke-m.de
|
|
This helps validating DTS files.
Changes that require mentioning:
1. Property "clock" was renamed to "clocks"
2. Duplicated properties (defined in nand-controller.yaml) were dropped
3. Compatible "brcm,nand-bcm63168" was added
4. SoC specific "compatible" cases got limited controller versions
Examples changes:
1. Nodes "nand" were renamed to "nand-controller"
2. Nodes "nandcs" were renamed to "nand"
3. Dropped partitions as they were using old syntax and are well
documented elsewhere anyway
This rewritten binding validates cleanly using the "dt_binding_check".
Some Linux stored DTS files will require updating to make "dtbs_check"
happy.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210423050536.29504-1-zajec5@gmail.com
|
|
The Sigma Designs Tango support has been removed, but 2 binding docs
for NAND and PCIe were missed. Remove them.
Cc: Marc Gonzalez <marc.w.gonzalez@free.fr>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-mtd@lists.infradead.org
Cc: linux-pci@vger.kernel.org
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210430153225.3366000-1-robh@kernel.org/
Signed-off-by: Rob Herring <robh@kernel.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next
MTD core:
* Handle possible -EPROBE_DEFER from parse_mtd_partitions()
NAND core:
* Fix error handling in nand_prog_page_op() (x2)
* Add a helper to retrieve the number of ECC bytes per step
* Add a helper to retrieve the number of ECC steps
* Let ECC engines advertize the exact number of steps
* ECC Hamming:
- Populate the public nsteps field
- Use the public nsteps field
* ECC BCH:
- Populate the public nsteps field
- Use the public nsteps field
Raw NAND core:
* Add support for secure regions in NAND memory
* Try not to use the ECC private structures
* Remove duplicate include in rawnand.h
* BBT:
- Skip bad blocks when searching for the BBT in NAND
Raw NAND controller drivers:
* Qcom:
- Convert bindings to YAML
- Use dma_mapping_error() for error check
- Add missing nand_cleanup() in error path
- Return actual error code instead of -ENODEV
- Update last code word register
- Add helper to configure location register
- Rename parameter name in macro
- Add helper to check last code word
- Convert nandc to chip in Read/Write helper
- Update register macro name for 0x2c offset
* GPMI:
- Fix a double free in gpmi_nand_init
* Rockchip:
- Use flexible-array member instead of zero-length array
* Atmel:
- Update ecc_stats.corrected counter
* MXC:
- Remove unneeded of_match_ptr()
* R852:
- replace spin_lock_irqsave by spin_lock in hard IRQ
* Brcmnand:
- Move to polling in pio mode on oops write
- Read/write oob during EDU transfer
- Fix OOB R/W with Hamming ECC
* FSMC:
- Fix error code in fsmc_nand_probe()
* OMAP:
- Use ECC information from the generic structures
SPI-NAND core:
* Add missing MODULE_DEVICE_TABLE()
SPI-NAND drivers:
* gigadevice: Support GD5F1GQ5UExxG
|
|
On a typical end product, a vendor may choose to secure some regions in
the NAND memory which are supposed to stay intact between FW upgrades.
The access to those regions will be blocked by a secure element like
Trustzone. So the normal world software like Linux kernel should not
touch these regions (including reading).
So let's add a property for declaring such secure regions so that the
drivers can skip touching them.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210402150128.29128-3-manivannan.sadhasivam@linaro.org
|
|
Convert Qcom NANDc devicetree binding to YAML.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210402150128.29128-2-manivannan.sadhasivam@linaro.org
|
|
Linksys on Broadcom Northstar devices uses fixed flash layout with
multiple firmware partitions.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210312134919.7767-1-zajec5@gmail.com
|