summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/mmc
AgeCommit message (Collapse)AuthorFilesLines
2015-03-25mmc: sdhci-esdhc-imx: support voltage-range propertySascha Hauer1-0/+4
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-03-23mmc: sdhci-iproc: add device tree bindingsScott Branden1-0/+23
Add device tree binding documentation for IPROC SDHCI driver. Acked-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Corneliu Doban <cdoban@broadcom.com> Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-03-23mmc: dw_mmc: exynos: Support eMMC's HS400 modeSeungwon Jeon1-0/+7
Implements HS400 mode support for exynos host driver. This also include some updates as new mode is added. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> [Alim: addressed review comments] Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-02-21Merge tag 'clk-for-linus-3.20' of ↵Linus Torvalds1-4/+4
git://git.linaro.org/people/mike.turquette/linux Pull clock framework updates from Mike Turquette: "The clock framework changes contain the usual driver additions, enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based devices. Additionally the framework core underwent a bit of surgery with two major changes: - The boundary between the clock core and clock providers (e.g clock drivers) is now more well defined with dedicated provider helper functions. struct clk no longer maps 1:1 with the hardware clock but is a true per-user cookie which helps us tracker users of hardware clocks and debug bad behavior. - The addition of rate constraints for clocks. Rate ranges are now supported which are analogous to the voltage ranges in the regulator framework. Unfortunately these changes to the core created some breakeage. We think we fixed it all up but for this reason there are lots of last minute commits trying to undo the damage" * tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits) clk: Only recalculate the rate if needed Revert "clk: mxs: Fix invalid 32-bit access to frac registers" clk: qoriq: Add support for the platform PLL powerpc/corenet: Enable CLK_QORIQ clk: Replace explicit clk assignment with __clk_hw_set_clk clk: Add __clk_hw_set_clk helper function clk: Don't dereference parent clock if is NULL MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr clkdev: Always allocate a struct clk and call __clk_get() w/ CCF clk: shmobile: div6: Avoid division by zero in .round_rate() clk: mxs: Fix invalid 32-bit access to frac registers clk: omap: compile legacy omap3 clocks conditionally clkdev: Export clk_register_clkdev clk: Add rate constraints to clocks clk: remove clk-private.h pci: xgene: do not use clk-private.h arm: omap2+ remove dead clock code clk: Make clk API return per-user struct clk instances clk: tegra: Define PLLD_DSI and remove dsia(b)_mux clk: tegra: Add support for the Tegra132 CAR IP block ...
2015-02-12Merge tag 'devicetree-for-3.20' of ↵Linus Torvalds1-1/+5
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull DeviceTree changes from Rob Herring: - DT unittests for I2C probing and overlays from Pantelis Antoniou - Remove DT unittest dependency on OF_DYNAMIC from Gaurav Minocha - Add Tegra compatible strings missing for newer parts from Paul Walmsley - Various vendor prefix additions * tag 'devicetree-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: of: Add vendor prefix for OmniVision Technologies of: Use ovti for Omnivision of: Add vendor prefix for Truly Semiconductors Limited of: Add vendor prefix for Himax Technologies Inc. of/fdt: fix sparse warning of: unitest: Add I2C overlay unit tests. Documentation: DT: document compatible string existence requirement Documentation: DT bindings: add nvidia, tegra132-denver compatible string Documentation: DT bindings: add more Tegra chip compatible strings of: EXPORT_SYMBOL_GPL of_property_read_u64_array of: Fix brace position for struct of_device_id definition of/unittest: Remove obsolete code dt-bindings: use isil prefix for Intersil in vendor-prefixes.txt Add AD Holdings Plc. to vendor-prefixes. dt-bindings: Add Silicon Mitus vendor prefix Removes OF_UNITTEST dependency on OF_DYNAMIC config symbol pinctrl: fix up device tree bindings DT: Vendors: Add Everspin doc: add bindings document for altera fpga manager drivers: of: Export of_reserved_mem_device_{init,release}
2015-02-04mmc: pwrseq: add driver for emmc hardware resetMarek Szyprowski1-0/+25
This patch provides a simple mmc-pwrseq-emmc driver, which controls single gpio line. It perform standard eMMC hw reset procedure, as descibed by Jedec 4.4 specification. This procedure is performed just after MMC core enabled power to the given mmc host (to fix possible issues if bootloader has left eMMC card in initialized or unknown state), and before performing complete system reboot (also in case of emergency reboot call). The latter is needed on boards, which doesn't have hardware reset logic connected to emmc card and (limited or broken) ROM bootloaders are unable to read second stage from the emmc card if the card is left in unknown or already initialized state. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-02-04Documentation: DT bindings: add more Tegra chip compatible stringsPaul Walmsley1-1/+5
Align compatible strings for several IP blocks present on Tegra chips with the latest doctrine from the DT maintainers: http://marc.info/?l=devicetree&m=142255654213019&w=2 The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 DT binding text files have been updated for the following IP blocks: - PCIe - SOR - SoC timers - AHB "gizmo" - APB_MISC - pinmux control - UART - PWM - I2C - SPI - RTC - PMC - eFuse - AHCI - HDA - XUSB_PADCTRL - SDHCI - SOC_THERM - AHUB - I2S - EHCI - USB PHY N.B. The nvidia,tegra20-timer compatible string is removed from the nvidia,tegra30-timer.txt documentation file because it's already mentioned in the nvidia,tegra20-timer.txt documentation file. This second version takes into account the following requests from Rob Herring <robherring2@gmail.com>: - Per-IP block patches have been combined into a single patch - Explicit documentation about which compatible strings are actually matched by the driver has been removed. In its place is implicit documentation that loosely follows Rob's prescribed format: "Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where <chip> is tegra30, tegra132, ..." [...] "You should attempt to document known values of <chip> if you use it" Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Dylan Reid <dgreid@chromium.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Jingchang Lu <jingchang.lu@freescale.com> Cc: John Crispin <blogic@openwrt.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mikko Perttunen <mperttunen@nvidia.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Peter Hurley <peter@hurleysoftware.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Takashi Iwai <tiwai@suse.de> Cc: Tejun Heo <tj@kernel.org> Cc: "Terje Bergström" <tbergstrom@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Zhang Rui <rui.zhang@intel.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-i2c@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-pwm@vger.kernel.org Cc: linux-tegra@vger.kernel.org Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
2015-01-30mmc: pwrseq: Document optional clock for the simple power sequenceJavier Martinez Canillas1-0/+4
Some WLAN chips attached to a SDIO interface, need an external clock to be operational. Since this is very common, extend the simple MMC power sequence DT binding to support an optional clock. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-30mmc: pwrseq: Document that simple sequence support more than one GPIOJavier Martinez Canillas1-3/+4
Many SDIO/MMC attached WLAN chips need more than one ping for their reset sequence. Extend the pwrseq_simple binding to support more than one pin. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-29mmc: sdhci-pxav3: Extend binding with SDIO3 conf reg for the Armada 38xGregory CLEMENT1-4/+11
The SDHCI unit used on the Armada 38x needs using an extra register to do specific clock adjustments in order to support the SDR50 and DDR50 modes. This patch extends the binding to allow using this register. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-28mmc: pwrseq: Document DT bindings for the simple MMC power sequenceUlf Hansson2-0/+34
To support SOCs which specifies specific MMC power sequences, document some MMC DT bindings to be able to describe these hardwares. Let's also document bindings for a simple MMC power sequence provider, which purpose is to support a set of common properties between various SOCs. In this initial step, let's also document a top level description of the MMC power sequence and describe the compatible string used for the simple MMC power sequence provider. The simple MMC power sequence provider will initially support a reset GPIO. From several earlier posted patches, it's clear that such hardware exists. Especially some WLAN chips which are attached to an SDIO interface may use a GPIO reset. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
2015-01-20mmc: sdhci: host: add new f_sdh30Vincent Yang1-0/+30
This patch adds new host controller driver for Fujitsu SDHCI controller f_sdh30. Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Tetsuya Takinishi <t.takinishi@jp.fujitsu.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-19mmc: Add SDIO function subnode DT documentationSascha Hauer1-1/+47
While SDIO devices are runtime probable they sometimes need nonprobable additional information on embedded systems, like an additional gpio interrupt or a clock. This binding describes how to add child nodes to the devicetree to supply this information. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [hdegoede@redhat.com: Documented the need for #address- and #size-cells] [hdegoede@redhat.com: Added a real world example] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-01-14mmc: sunxi: Convert MMC driver to the standard clock phase APIMaxime Ripard1-4/+4
Now that we have proper support to use the generic phase API in our clock driver, switch the MMC driver to use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Chen-Yu Tsai <wens@csie.org>
2014-11-26mmc: dw_mmc: Add support for IMG PistachioAndrew Bresticker1-0/+29
Add support for the DW MMC host found on the Imagination Pistachio SoC. Like the DW MMC hosts found on SOCFPGA and Rockchip SoCs, the DW MMC host on Pistachio requires the use of SDMMC_CMD_USE_HOLD_REG. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: dw_mmc: exynos: Add support for exynos7Abhilash Kesavan1-0/+4
The Exynos7 has a DWMMC controller (v2.70a) which is different from prior versions. This patch adds new compatible strings for exynos7. This patch also fixes the CLKSEL register offset on exynos7. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Tested-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-pxav3: Document clocks and additional clock-names propertySebastian Hesselbarth1-0/+7
Now that sdhci-pxav3 driver allows to have more than one IP clock defined, document both clocks and clock-names properties. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09mmc: tmio-mmc: Add support for SDHI on new R-Car Gen2 SoCsGeert Uytterhoeven1-0/+3
- r8a7792 (R-Car V2H) - r8a7793 (R-Car M2-N) - r8a7794 (R-Car E2) Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09mmc: implement Driver Stage Register handlingSascha Hauer1-0/+2
Some eMMC and SD cards implement a DSR register that allows to tune raise/fall times and drive strength of the CMD and DATA outputs. The values to use depend on the card in use and the host. It might be needed to reduce the drive strength to prevent voltage peaks above the host's specification. Implement a 'dsr' devicetree property that allows to specify the value to set the DSR to. For non-dt setups the new members of mmc_host can be set by board code. This patch was initially authored by Sascha Hauer. It contains improvements authored by Markus Niebel and Uwe Kleine-König. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-09-09mmc: dw_mmc: add support for RK3288Addy Ke1-2/+4
This patch focuses on clock setting for RK3288 mmc controller. In RK3288 mmc controller, CLKDIV register can only be set 0 or 1, and if DDR 8bit mode, CLKDIV register must be set 1. Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-08-11mmc: dw_mmc: modify the dt-binding for removing slot-node and supports-highspeedJaehoon Chung3-26/+15
Almost all SoCs use one slot per host controller. (Even if controller can support the multiple slot, Recommend to use one slot per host controller.) Don't use the slot-node and deprecate the "supports-highspeed" property. Instead, use the cap-mmc/sd-highspeed. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Tushar Behera <trblinux@gmail.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Sachin Kamat <sachin.kamat@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-26mmc: sh_mmcif: Document DT bindingsLaurent Pinchart1-0/+32
The sh-mmcif driver implements DT support but the bindings are not documented. Document them. Cc: devicetree@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-26mmc: sdhci-msm: Fix the binding exampleGeorgi Djakov1-4/+4
The DT binding example in the documentation is missing the -supply suffix for the vmmc and vqmmc regulators. Fix it. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-10mmc: sdhci-st: ST Microelectronics SDHCI binding documentation.Peter Griffin1-0/+33
This patch adds the device tree binding documentation for the ST SDHCI driver. It documents the differences between the core properties described by mmc.txt and the properties used by the sdhci-st driver. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: tmio-mmc: Add renesas, sdhi-r8a7791 to binding documentationGeert Uytterhoeven1-0/+1
The driver already supports the r8a7791 SoC, and "renesas,sdhi-r8a7791" is already in use. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Ian Molton <ian.molton@codethink.co.uk> Cc: Chris Ball <chris@printf.net> Cc: linux-mmc@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: core: Fix DT documentation of eMMC high-speed DDR 1.8/1.2V bindingsPeter Griffin1-2/+2
Currently the documentation doesn't match the code in mmc_of_parse. This patch rectifies this. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: omap_hsmmc: Pin remux workaround to support SDIO interrupt on AM335xAndreas Fenkart1-0/+53
The am335x can't detect pending cirq in PM runtime suspend. This patch reconfigures dat1 as a GPIO before going to suspend. SDIO interrupts are detected with the GPIO, the GPIO will only wake the module from suspend, SDIO irq detection will still happen through the IP block. Idea of remuxing the pins by Tony Lindgren. Code contributions from Tony Lindgren and Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-07-09mmc: omap_hsmmc: Enable SDIO interruptAndreas Fenkart1-0/+1
There have been various patches floating around for enabling the SDIO IRQ for hsmmc, but none of them ever got merged. Probably the reason for not merging the SDIO interrupt patches has been the lack of wake-up path for SDIO on some omaps that has also needed remuxing the SDIO DAT1 line to a GPIO making the patches complex. This patch adds the minimal SDIO IRQ support to hsmmc for omaps that do have the wake-up path. For those omaps, the DAT1 line need to have the wake-up enable bit set, and the wake-up interrupt is the same as for the MMC controller. This patch has been tested on am3730 es1.2 with mwifiex connected to MMC3 with mwifiex waking to Ethernet traffic from off-idle mode. Note that for omaps that do not have the SDIO wake-up path, this patch will not work for idle modes and further patches for remuxing DAT1 to GPIO are needed. Based on earlier patches [1][2] by David Vrabel <david.vrabel@csr.com>, Steve Sakoman <steve@sakoman.com> For now, only support SDIO interrupt if we are booted with a separate wake-irq configued via device tree. This is because omaps need the wake-irq for idle states, and some omaps need special quirks. And we don't want to add new legacy mux platform init code callbacks any longer as we are moving to DT based booting anyways. To use it, you need to specify the wake-irq using the interrupts-extended property. [1] http://www.sakoman.com/cgi-bin/gitweb.cgi?p=linux.git;a=commitdiff_plain;h=010810d22f6f49ac03da4ba384969432e0320453 [2] http://comments.gmane.org/gmane.linux.kernel.mmc/20446 Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-06-11Merge tag 'mmc-updates-for-3.16-rc1' of ↵Linus Torvalds4-5/+65
git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC update from Chris Ball: "MMC highlights for 3.16: Core: - support HS400 mode of eMMC 5.0, via DT bindings mmc-hs400-1_{2,8}v - if card init at 3.3v doesn't work, try 1.8v and 1.2v too Drivers: - moxart: New driver for MOXA ART SoCs - rtsx_usb_sdmmc: New driver for Realtek USB card readers - sdhci: Large rework around IRQ/regulator handling, remove card_tasklet - sdhci-pci-o2micro: Add SeaBird SeaEagle SD3 support - sunxi: New driver for Allwinner sunxi SoCs - usdhi6rol0: New driver for Renesas SD/SDIO controller" * tag 'mmc-updates-for-3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (95 commits) mmc: sdhci-s3c: use mmc_of_parse and remove the card_tasklet mmc: add a driver for the Renesas usdhi6rol0 SD/SDIO host controller mmc: sdhci-of-esdhc: Fixup compile error mmc: tegra: fix reporting of base clock frequency mmc: tegra: disable UHS modes mmc: sdhci-dove: use mmc_of_parse() and remove card_tasklet CD handler MAINTAINERS: mmc: Add path to git tree mmc: dove: fix missing MACH_DOVE dependency mmc: sdhci: SD tuning is broken for some controllers mmc: sdhci-esdhc-imx: fix mmc ddr mode regression issue mmc: sdhci-pci-o2micro: Add SeaBird SeaEagle SD3 support mmc: omap_hsmmc: split omap-dma header file mmc: omap_hsmmc: fix cmd23 multiblock read/write mmc: omap_hsmmc: use devm_ioremap_resource mmc: omap_hsmmc: use devm_request_threaded_irq mmc: omap_hsmmc: use devm_request_irq mmc: omap_hsmmc: use devm_clk_get mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs mmc: wmt-sdmmc: Use GFP_KERNEL instead of hard-coded value mmc: omap: Use DIV_ROUND_UP instead of open coded ...
2014-06-08Merge tag 'clk-for-linus-3.16' of ↵Linus Torvalds1-0/+43
git://git.linaro.org/people/mike.turquette/linux into next Pull clock framework updates from Mike Turquette: "The clock framework changes for 3.16 are pretty typical: mostly clock driver additions and fixes. There are additions to the clock core code for some of the basic types (e.g. the common divider type has some fixes and featured added to it). One minor annoyance is a last-minute dependency that wasn't handled quite right. Commit ba0fae3b06a6 ("clk: berlin: add core clock driver for BG2/BG2CD") in this pull request depends on include/dt-bindings/clock/berlin2.h, which is already in your tree via the arm-soc pull request. Building for the berlin platform will break when the clk tree is built on it's own, but merged into your master branch everything should be fine" * tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/linux: (75 commits) mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs clk: export __clk_round_rate for providers clk: versatile: free icst on error return clk: qcom: Return error pointers for unimplemented clocks clk: qcom: Support msm8974pro global clock control hardware clk: qcom: Properly support display clocks on msm8974 clk: qcom: Support display RCG clocks clk: qcom: Return highest rate when round_rate() exceeds plan clk: qcom: Fix mmcc-8974's PLL configurations clk: qcom: Fix clk_rcg2_is_enabled() check clk: berlin: add core clock driver for BG2Q clk: berlin: add core clock driver for BG2/BG2CD clk: berlin: add driver for BG2x complex divider cells clk: berlin: add driver for BG2x simple PLLs clk: berlin: add driver for BG2x audio/video PLL clk: st: Terminate of match table clk/exynos4: Fix compilation warning ARM: shmobile: r8a7779: Add clock index macros for DT sources clk: divider: Fix overflow in clk_divider_bestdiv clk: u300: Terminate of match table ...
2014-06-04Merge branch 'for-linus' of ↵Linus Torvalds2-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial into next Pull trivial tree changes from Jiri Kosina: "Usual pile of patches from trivial tree that make the world go round" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (23 commits) staging: go7007: remove reference to CONFIG_KMOD aic7xxx: Remove obsolete preprocessor define of: dma: doc fixes doc: fix incorrect formula to calculate CommitLimit value doc: Note need of bc in the kernel build from 3.10 onwards mm: Fix printk typo in dmapool.c modpost: Fix comment typo "Modules.symvers" Kconfig.debug: Grammar s/addition/additional/ wimax: Spelling s/than/that/, wording s/destinatary/recipient/ aic7xxx: Spelling s/termnation/termination/ arm64: mm: Remove superfluous "the" in comment of: Spelling s/anonymouns/anonymous/ dma: imx-sdma: Spelling s/determnine/determine/ ath10k: Improve grammar in comments ath6kl: Spelling s/determnine/determine/ of: Improve grammar for of_alias_get_id() documentation drm/exynos: Spelling s/contro/control/ radio-bcm2048.c: fix wrong overflow check doc: printk-formats: do not mention casts for u64/s64 doc: spelling error changes ...
2014-06-04mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCsDavid Lanzendörfer1-0/+43
The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in designware idmac controller, which is identical to the one found in the mmc-dw hosts. However the rest of the host is not identical to mmc-dw, it deals with sending stop commands in hardware which makes it significantly different from the mmc-dw devices. Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> [hdegoede@redhat.com: various cleanups and fixes] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Chris Ball <chris@printf.net> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-06-03mmc: add a driver for the Renesas usdhi6rol0 SD/SDIO host controllerGuennadi Liakhovetski1-0/+33
This patch adds a driver for the Renesas usdhi6rol0 SD/SDIO host controller in both PIO and DMA modes. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Chris Ball <chris@printf.net>
2014-05-22mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCsDavid Lanzendörfer1-0/+43
The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in designware idmac controller, which is identical to the one found in the mmc-dw hosts. However the rest of the host is not identical to mmc-dw, it deals with sending stop commands in hardware which makes it significantly different from the mmc-dw devices. Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> [hdegoede@redhat.com: various cleanups and fixes] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
2014-05-13mmc: core: add DT bindings for eMMC HS400 1.8/1.2VSeungwon Jeon1-0/+2
Provide the option to configure these speed modes per host, for those host driver's that can't distinguish this in runtime. Specially, if host can support HS400, it means that host can also support HS200. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
2014-05-13mmc: moxart: Add MOXA ART SD/MMC driverJonas Jensen1-0/+30
Add SD/MMC driver for MOXA ART SoCs. The "MOXA ART MMC controller" is likely a faraday "ftsdc010", a controller with support in U-Boot: http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/mmc/ftsdc010_mci.c Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
2014-05-13mmc: dw_mmc: use the mmc_of_parse() instead of local parserJaehoon Chung1-5/+0
mmc_of_parse() have been already parsed the general capability. Didn't need to use the local parser. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
2014-05-12mmc: mmci: Mark the DT bindings for highspeed mode as deprecatedUlf Hansson1-4/+6
The common mmc DT parser supports bindings for highspeed mode, thus there are no need for mmci to provide it's own versions for these. Mark them as deprecated in the documentation. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Rob Herring <robh@kernel.org>
2014-05-12mmc: mmci: Add DT bindings for feedback clock pinUlf Hansson1-0/+2
The ST Micro variant supports the option of using a feedback clock signal in favor of the clockout pin when latching incoming signals on the data bus. Since this is matter of how pins are being routed we need to provide a new DT binding to be able to configure this through DT. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2014-05-12mmc: mmci: Add DT bindings for signal directionUlf Hansson1-1/+10
Some variants have support for indicating the bus signal directions, which currently are configured through platform data. Add corresponding DT bindings to enable us to move away from using the platform data. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2014-05-12mmc: mmci: Update DT documentationUlf Hansson1-3/+36
Document how to configure the regulator supplies and add an example of a typical mmci DT node. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-05-05doc: spelling error changesCarlos Garcia2-2/+2
Fixed multiple spelling errors. Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Carlos E. Garcia <carlos@cgarcia.org> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2014-04-09Merge tag 'mmc-updates-for-3.15-rc1' of ↵Linus Torvalds4-1/+81
git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC updates from Chris Ball: "MMC highlights for 3.15: Core: - CONFIG_MMC_UNSAFE_RESUME=y is now default behavior - DT bindings for SDHCI UHS, eMMC HS200, high-speed DDR, at 1.8/1.2V - Add GPIO descriptor based slot-gpio card detect API Drivers: - dw_mmc: Refactor SOCFPGA support as a variant inside dw_mmc-pltfm.c - mmci: Support HW busy detection on ux500 - omap: Support MMC_ERASE - omap_hsmmc: Support MMC_PM_KEEP_POWER, MMC_PM_WAKE_SDIO_IRQ, (a)cmd23 - rtsx: Support pre-req/post-req async - sdhci: Add support for Realtek RTS5250 controllers - sdhci-acpi: Add support for 80860F16, fix 80860F14/SDIO card detect - sdhci-msm: Add new driver for Qualcomm SDHCI chipset support - sdhci-pxav3: Add support for Marvell Armada 380 and 385 SoCs" * tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (102 commits) mmc: sdhci-acpi: Intel SDIO has broken card detect mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller mmc: sdhci-msm: Add platform_execute_tuning implementation mmc: sdhci-msm: Initial support for Qualcomm chipsets mmc: sdhci-msm: Qualcomm SDHCI binding documentation sdhci: only reprogram retuning timer when flag is set mmc: rename ARCH_BCM to ARCH_BCM_MOBILE mmc: sdhci: Allow for irq being shared mmc: sdhci-acpi: Add device id 80860F16 mmc: sdhci-acpi: Fix broken card detect for ACPI HID 80860F14 mmc: slot-gpio: Add GPIO descriptor based CD GPIO API mmc: slot-gpio: Split out CD IRQ request into a separate function mmc: slot-gpio: Record GPIO descriptors instead of GPIO numbers Revert "dts: socfpga: Add support for SD/MMC on the SOCFPGA platform" mmc: sdhci-spear: use generic card detection gpio support mmc: sdhci-spear: remove support for power gpio mmc: sdhci-spear: simplify resource handling mmc: sdhci-spear: fix platform_data usage mmc: sdhci-spear: fix error handling paths for DT mmc: sdhci-bcm-kona: fix build errors when built-in ...
2014-03-29mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controllerMarcin Wojtas1-1/+16
The SDHCI unit used on the Armada 380 and 385 Marvell SoC is similar to the PXAv3 unit. The only difference is that on Armada 38x, the PXAv3 unit accesses memory through MBus windows which must be configured prior to using the device. Without this, DMA would not work. In order to achieve this, the sdhci-pxav3 driver is extended with an additional compatible string "marvell,armada-380-sdhci". When this compatible string is used, the MBus windows are initialized in a way that is identical to what all other DMA-capable drivers for Marvell EBU platforms do. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Chris Ball <chris@printf.net>
2014-03-27mmc: sdhci-msm: Qualcomm SDHCI binding documentationGeorgi Djakov1-0/+55
This patch adds the device-tree binding documentation for Qualcomm SDHCI driver. It contains the differences between the core properties in mmc.txt and the properties used by the sdhci-msm driver. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
2014-03-17Revert "dts: socfpga: Add support for SD/MMC on the SOCFPGA platform"Chris Ball1-23/+0
This reverts commit d9c3f5df539a8a74cc830b35838670fe0541fed1, which should not have been merged via mmc-next. It's in arm-soc instead now.
2014-03-10dts: socfpga: Add support for SD/MMC on the SOCFPGA platformDinh Nguyen1-0/+23
Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform specific implementation of the dw_mmc driver. Also add the "syscon" binding to the "altr,sys-mgr" node. The clock driver can use the syscon driver to toggle the register for the SD/MMC clock phase shift settings. Finally, fix an indentation error for the sysmgr node. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Chris Ball <chris@printf.net>
2014-03-04mmc: omap_hsmmc: Add support for quirky omap3 hsmmc controllerNishanth Menon1-0/+1
When device is booted using devicetree, platforms impacted by Erratum 2.1.1.128 is not detected easily in the mmc driver. This erratum indicates that the module cannot do multi-block transfers. Platforms such as LDP which use OMAP3 ES revision prior to ES3.0 are impacted by this. Provide a new compatible property "ti,omap3-pre-es3-hsmmc" to allow driver to determine if driver needs to implement quirks associated with the specific module version (primarily because the IP revision information is not sufficient for the same). Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Chris Ball <chris@printf.net>
2014-02-27dts: socfpga: Add support for SD/MMC on the SOCFPGA platformDinh Nguyen1-0/+23
Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform specific implementation of the dw_mmc driver. Also add the "syscon" binding to the "altr,sys-mgr" node. The clock driver can use the syscon driver to toggle the register for the SD/MMC clock phase shift settings. Finally, fix an indentation error for the sysmgr node. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Chris Ball <chris@printf.net>
2014-02-22mmc: core: Add DT bindings for eMMC HS200 1.8/1.2VJaehoon Chung1-0/+2
Provide the option to configure these speed modes per host, for those host driver's that can't distinguish this in runtime. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
generated by cgit v1.2.3 (git 2.39.0) at 2025-10-02 01:31:39 +0300