Age | Commit message (Collapse) | Author | Files | Lines | |
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2013-10-08 | clk: keystone: Add gate control clock driver | Santosh Shilimkar | 1 | -0/+29 | |
Add the driver for the clock gate control which uses PSC (Power Sleep Controller) IP on Keystone 2 based SOCs. It is responsible for enabling and disabling of the clocks for different IPs present in the SoC. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> |