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2022-05-31ARM: pxa/mmp: remove traces of plat-pxaArnd Bergmann1-7/+0
The missing include directory caused a W=1 warning that can be trivially fixed. I also noticed references in the marvell.rst documentation that can be removed at the same time. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-01-27Documentation: arm: marvell: Extend Avanta listPali Rohár1-0/+2
Include another two SoCs from Avanta family. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20220121115804.28824-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-11-15Documentation: arm: marvell: Fix link to armada_1000_pb.pdf documentPali Rohár1-1/+1
File armada_1000_pb.pdf is not available on Marvell website anymore. So update link to webarchive where is backup copy. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-11-15Documentation: arm: marvell: Put Armada XP section between Armada 370 and 375Pali Rohár1-26/+19
From evolution and feature point of view Armada XP belongs between Armada 370 and Armada 375 families. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-11-15Documentation: arm: marvell: Add some links to homepage / product infosPali Rohár1-0/+7
Webarchive contains some useful resources like product info or links to other documents. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-11-04Merge tag 'soc-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds3-0/+58
Pull ARM SoC updates from Arnd Bergmann: "The SoC updates this time are mainly removing obsolete code from the OMAP2 platform, another step in the eternal cleanup of that platform. There are two new SoCs getting added: STMicroelectronics stm32mp13 and Microchip lan966. Both fit into existing platforms and require minimal changes here. A couple of MAINTAINER file updates relate to those changes, and update some file paths" * tag 'soc-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (28 commits) MAINTAINERS: Update BCM7XXX entry with additional patterns MAINTAINERS: add pinctrl-apple-gpio to ARM/APPLE MACHINE MAINTAINERS: Add pasemi i2c to ARM/APPLE MACHINE ARM: SPEAr: Update MAINTAINERS entries ARM: OMAP2+: Drop unused CM defines for am3 ARM: OMAP2+: Drop unused CM and SCRM defines for omap4 ARM: OMAP2+: Drop unused CM and SCRM defines for omap5 ARM: OMAP2+: Drop unused CM defines for dra7 ARM: OMAP2+: Drop unused PRM defines for am3 ARM: OMAP2+: Drop unused PRM defines for am4 ARM: OMAP2+: Drop unused PRM defines for omap4 ARM: OMAP2+: Drop unused PRM defines for omap5 ARM: OMAP2+: Drop unused PRM defines for dra7 ARM: OMAP2+: Fix comment typo ARM: OMAP2+: Fix typo in some comments ARM: at91: add basic support for new SoC family lan966 dt-bindings: arm: at91: Document lan966 pcb8291 and pcb8290 boards ARM: at91: Documentation: add lan966 family ARM: at91: Documentation: add sama7g5 family MAINTAINERS: add an entry for NXP S32G boards ...
2021-10-21Merge tag 'stm32-soc-for-v5.16-1' of ↵Arnd Bergmann2-0/+38
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/soc STM32 SoC for v5.16, round 1 Highlights: ---------- Add support of new STM32MP13 SoC which enhances current STM32 MPU family. It is mainly a derivative of STM32MP15 SoCs (one Cortex-A7 plus standard peripherals). The STM32MP13 SoC diversity is composed by: -STM32MP131: -core: 1*CA7, 17*TIMERS, 5*LPTIMERS, DMA/MDMA/DMAMUX -storage: 3*SDMCC, 1*QSPI, FMC -com: USB (OHCI/EHCI, OTG), 5*I2C, 5*SPI/I2S, 8*U(S)ART -audio: 2*SAI -network: 1*ETH(GMAC) -STM32MP133: STM32MP131 + 2*CAN, ETH2(GMAC), ADC1 -STM32MP135: STM32MP133 + DCMIPP, LTDC * tag 'stm32-soc-for-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: stm32: add initial support for STM32MP13 family docs: arm: stm32: introduce STM32MP13 SoCs Link: https://lore.kernel.org/r/0b6c9657-dcca-3bad-601f-610dfc81d9ae@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-04ARM: at91: Documentation: add lan966 familyKavyasree Kotagiri1-0/+8
Add the new LAN966 ARMv7 based SoC family from Microchip. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> [nicolas.ferre@microchip.com: move entry as part of new Cortex-A7 core type] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211004105926.5696-3-kavyasree.kotagiri@microchip.com
2021-10-04ARM: at91: Documentation: add sama7g5 familyNicolas Ferre1-0/+12
Add the new SAMA7G5 ARMv7 based SoC family from Microchip to the AT91 documentation. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-09-27Documentation: arm: marvell: Add link to Orion Functional Errata documentPali Rohár1-0/+1
Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20210704181110.9254-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-09-22Documentation: arm: marvell: Add Octeon TX2 CN913x FlavorsPali Rohár1-0/+17
Marvell put CN913x into Octeon TX2 family but they are different from all other Octeon TX2 products. Instead CN913x is evolution from Armada 7k/8k products. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20210919143348.24338-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-09-22Documentation: arm: marvell: Add 88F6040 model into listPali Rohár1-0/+1
Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20210919143327.24289-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-09-20docs: arm: stm32: introduce STM32MP13 SoCsAlexandre Torgue2-0/+38
STM32MP13 SoCs are derivative of STM32MP15 SoCs. They embed one Cortex-A7 plus standard connectivity. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2021-08-24Documentation: arm: marvell: Add 88F6825 model into listPali Rohár1-0/+1
88F6825 is just 88F6820 but without encryption acceleration hardware and is used e.g. in DTS file arch/arm/boot/dts/armada-385-clearfog-gtr.dtsi Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20210814124805.14568-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-07-15Documentation: arm: marvell: Add few missing models and documentation filesPali Rohár1-0/+18
Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20210625215437.2156-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-06-04docs: Fix typo in Documentation/arm/marvell.rstNobuhiro Iwamatsu1-1/+1
Fix typo in the documentation, changed from 'comatible' to 'compatible. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Link: https://lore.kernel.org/r/20210531134235.720351-1-iwamatsu@nigauri.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-04-26Merge tag 'docs-5.13' of git://git.lwn.net/linuxLinus Torvalds2-79/+87
Pull documentation updates from Jonathan Corbet: "It's been a relatively busy cycle in docsland, though more than usually well contained to Documentation/ itself. Highlights include: - The Chinese translators have been busy and show no signs of stopping anytime soon. Italian has also caught up. - Aditya Srivastava has been working on improvements to the kernel-doc script. - Thorsten continues his work on reporting-issues.rst and related documentation around regression reporting. - Lots of documentation updates, typo fixes, etc. as usual" * tag 'docs-5.13' of git://git.lwn.net/linux: (139 commits) docs/zh_CN: add openrisc translation to zh_CN index docs/zh_CN: add openrisc index.rst translation docs/zh_CN: add openrisc todo.rst translation docs/zh_CN: add openrisc openrisc_port.rst translation docs/zh_CN: add core api translation to zh_CN index docs/zh_CN: add core-api index.rst translation docs/zh_CN: add core-api irq index.rst translation docs/zh_CN: add core-api irq irqflags-tracing.rst translation docs/zh_CN: add core-api irq irq-domain.rst translation docs/zh_CN: add core-api irq irq-affinity.rst translation docs/zh_CN: add core-api irq concepts.rst translation docs: sphinx-pre-install: don't barf on beta Sphinx releases scripts: kernel-doc: improve parsing for kernel-doc comments syntax docs/zh_CN: two minor fixes in zh_CN/doc-guide/ Documentation: dev-tools: Add Testing Overview docs/zh_CN: add translations in zh_CN/dev-tools/gcov docs: reporting-issues: make people CC the regressions list MAINTAINERS: add regressions mailing list doc:it_IT: align Italian documentation docs/zh_CN: sync reporting-issues.rst ...
2021-04-01Documentation: arm: stm32: Add stm32h750 value line docdillon min2-0/+35
This patchset add support for soc stm32h750, stm32h750 has mirror different from stm32h743 item stm32h743 stm32h750 flash size: 2MiB 128KiB adc: none 3 crypto-hash: none aes/hamc/des/tdes/md5/sha detail information can be found at: https://www.st.com/en/microcontrollers-microprocessors/stm32h750-value-line.html Signed-off-by: dillon min <dillon.minfei@gmail.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-07docs: arm: /chosen node parametersHeinrich Schuchardt1-0/+7
Add missing items to table of parameters set in the /chosen node by the EFI stub. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Link: https://lore.kernel.org/r/20210206084120.43305-1-xypron.glpk@gmx.de Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-03-07docs: arm: marvell: clarify some unimportant Armada 6x0 detailsLubomir Rintel1-3/+2
MMP2 is used in XO-1.75 and MMP3 is now supported in mainline. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lore.kernel.org/r/20210215220839.423709-4-lkundrak@v3.sk Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-03-07docs: arm: marvell: replace stale links with archive linksLubomir Rintel1-77/+79
Marvell has an annoying habit of moving stuff around their web site every full moon, and often just removing documents altogether. At this point basically none but four of the links still works and even those that work today weren't working for a long period of time previously. That is a shame because (short of the product briefs) the documents tend to be quite useful. Let's replace them with known working versions of IA's Wayback Machine links. That seems to be about the only way of getting a URL that's going to work the next week. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lore.kernel.org/r/20210215220839.423709-2-lkundrak@v3.sk Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-01-29Documentation: ARM: fix reference to DT format documentationBaruch Siach1-1/+1
The booting-without-of.rst file is no longer there. Link to devicetree.org instead. Fixes: 441848282c590 ("dt: Remove booting-without-of.rst") Signed-off-by: Baruch Siach <baruch@tkos.co.il> Cc: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/7f07e544d9fc584242d496c2f54f9303d8de0724.1611558630.git.baruch@tkos.co.il Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-01-29Documentation: arm: marvell: Update link to unrestricted Armada 38x ↵Pali Rohár1-1/+1
Functional Spec On Marvell website is documentation accessible without need to register or fill any other forms. Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20210125141529.32357-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-01-29Documentation: arm: marvell: Fix dead link to Armada 37xx Product BriefPali Rohár1-1/+1
Signed-off-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20210125141341.32200-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-01-29Documentation: arm: marvell: Add link to public Armada 37xx Hardware SpecPali Rohár1-0/+3
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20210121193418.22678-2-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2021-01-29Documentation: arm: Fix marvell file namePali Rohár2-1/+1
Fixes: dc7a12bdfccd ("docs: arm: convert docs to ReST and rename to *.rst") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20210121193418.22678-1-pali@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-12-23Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linuxLinus Torvalds1-1/+11
Pull ARM updates from Russell King: - Rework phys/virt translation - Add KASan support - Move DT out of linear map region - Use more PC-relative addressing in assembly - Remove FP emulation handling while in kernel mode - Link with '-z norelro' - remove old check for GCC <= 4.2 in ARM unwinder code - disable big endian if using clang's linker * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (46 commits) ARM: 9027/1: head.S: explicitly map DT even if it lives in the first physical section ARM: 9038/1: Link with '-z norelro' ARM: 9037/1: uncompress: Add OF_DT_MAGIC macro ARM: 9036/1: uncompress: Fix dbgadtb size parameter name ARM: 9035/1: uncompress: Add be32tocpu macro ARM: 9033/1: arm/smp: Drop the macro S(x,s) ARM: 9032/1: arm/mm: Convert PUD level pgtable helper macros into functions ARM: 9031/1: hyp-stub: remove unused .L__boot_cpu_mode_offset symbol ARM: 9044/1: vfp: use undef hook for VFP support detection ARM: 9034/1: __div64_32(): straighten up inline asm constraints ARM: 9030/1: entry: omit FP emulation for UND exceptions taken in kernel mode ARM: 9029/1: Make iwmmxt.S support Clang's integrated assembler ARM: 9028/1: disable KASAN in call stack capturing routines ARM: 9026/1: unwind: remove old check for GCC <= 4.2 ARM: 9025/1: Kconfig: CPU_BIG_ENDIAN depends on !LD_IS_LLD ARM: 9024/1: Drop useless cast of "u64" to "long long" ARM: 9023/1: Spelling s/mmeory/memory/ ARM: 9022/1: Change arch/arm/lib/mem*.S to use WEAK instead of .weak ARM: kvm: replace open coded VA->PA calculations with adr_l call ARM: head.S: use PC relative insn sequence to calculate PHYS_OFFSET ...
2020-12-17Merge tag 'arm-soc-drivers-5.11' of ↵Linus Torvalds4-22/+13
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "There are a couple of subsystems maintained by other people that merge their drivers through the SoC tree, those changes include: - The SCMI firmware framework gains support for sensor notifications and for controlling voltage domains. - A large update for the Tegra memory controller driver, integrating it better with the interconnect framework - The memory controller subsystem gains support for Mediatek MT8192 - The reset controller framework gains support for sharing pulsed resets For Soc specific drivers in drivers/soc, the main changes are - The Allwinner/sunxi MBUS gets a rework for the way it handles dma_map_ops and offsets between physical and dma address spaces. - An errata fix plus some cleanups for Freescale Layerscape SoCs - A cleanup for renesas drivers regarding MMIO accesses. - New SoC specific drivers for Mediatek MT8192 and MT8183 power domains - New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC identification. - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and SDX55. - A rework of the TI AM33xx 'genpd' power domain support to use information from DT instead of platform data - Support for TI AM64x SoCs - Allow building some Amlogic drivers as modules instead of built-in Finally, there are numerous cleanups and smaller bug fixes for Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips, Renesas, and Xilinx SoCs" * tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits) soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS firmware: xilinx: Properly align function parameter firmware: xilinx: Add a blank line after function declaration firmware: xilinx: Remove additional newline firmware: xilinx: Fix kernel-doc warnings firmware: xlnx-zynqmp: fix compilation warning soc: xilinx: vcu: add missing register NUM_CORE soc: xilinx: vcu: use vcu-settings syscon registers dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding soc: xilinx: vcu: drop useless success message clk: samsung: mark PM functions as __maybe_unused soc: samsung: exynos-chipid: initialize later - with arch_initcall soc: samsung: exynos-chipid: order list of SoCs by name memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe() memory: ti-emif-sram: only build for ARMv7 memory: tegra30: Support interconnect framework memory: tegra20: Support hardware versioning and clean up OPP table initialization dt-bindings: memory: tegra20-emc: Document opp-supported-hw property soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe() reset-controller: ti: force the write operation when assert or deassert ...
2020-12-04docs: archis: add a per-architecture features listMauro Carvalho Chehab2-0/+5
Add a feature list matrix for each architecture to their respective Kernel books. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/9c39d4dd93e05c0008205527d2c3450912f029ed.1606748711.git.mchehab+huawei@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-11-14documentation: arm: sunxi: add Allwinner H616 documentsWilken Gottwalt1-0/+10
Add the current and cleaned Allwinner H616 datasheet and user manual. Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net> Link: https://lore.kernel.org/r/20201108150104.GA66507@monster.powergraphx.local Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-10-31Documentation: Update paths of Samsung S3C machine filesKrzysztof Kozlowski4-22/+13
Documentation references Samsung S3C24xx and S3C64xx machine files in multiple places but the files were traveling around the kernel multiple times. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200911143343.498-1-krzk@kernel.org
2020-10-28documentation: arm: sunxi: add Allwinner H6 documentsWilken Gottwalt1-0/+10
Add the current Allwinner H6 datasheet and user manual. Signed-off-by: Wilken Gottwalt <wilken.gottwalt@linux-addicted.net> Link: https://lore.kernel.org/r/20201027062408.GA6761@monster.powergraphx.local Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-10-27ARM: 9015/2: Define the virtual space of KASan's shadow regionLinus Walleij1-0/+5
Define KASAN_SHADOW_OFFSET,KASAN_SHADOW_START and KASAN_SHADOW_END for the Arm kernel address sanitizer. We are "stealing" lowmem (the 4GB addressable by a 32bit architecture) out of the virtual address space to use as shadow memory for KASan as follows: +----+ 0xffffffff | | | | |-> Static kernel image (vmlinux) BSS and page table | |/ +----+ PAGE_OFFSET | | | | |-> Loadable kernel modules virtual address space area | |/ +----+ MODULES_VADDR = KASAN_SHADOW_END | | | | |-> The shadow area of kernel virtual address. | |/ +----+-> TASK_SIZE (start of kernel space) = KASAN_SHADOW_START the | | shadow address of MODULES_VADDR | | | | | | | | |-> The user space area in lowmem. The kernel address | | | sanitizer do not use this space, nor does it map it. | | | | | | | | | | | | | |/ ------ 0 0 .. TASK_SIZE is the memory that can be used by shared userspace/kernelspace. It us used for userspace processes and for passing parameters and memory buffers in system calls etc. We do not need to shadow this area. KASAN_SHADOW_START: This value begins with the MODULE_VADDR's shadow address. It is the start of kernel virtual space. Since we have modules to load, we need to cover also that area with shadow memory so we can find memory bugs in modules. KASAN_SHADOW_END This value is the 0x100000000's shadow address: the mapping that would be after the end of the kernel memory at 0xffffffff. It is the end of kernel address sanitizer shadow area. It is also the start of the module area. KASAN_SHADOW_OFFSET: This value is used to map an address to the corresponding shadow address by the following formula: shadow_addr = (address >> 3) + KASAN_SHADOW_OFFSET; As you would expect, >> 3 is equal to dividing by 8, meaning each byte in the shadow memory covers 8 bytes of kernel memory, so one bit shadow memory per byte of kernel memory is used. The KASAN_SHADOW_OFFSET is provided in a Kconfig option depending on the VMSPLIT layout of the system: the kernel and userspace can split up lowmem in different ways according to needs, so we calculate the shadow offset depending on this. When kasan is enabled, the definition of TASK_SIZE is not an 8-bit rotated constant, so we need to modify the TASK_SIZE access code in the *.s file. The kernel and modules may use different amounts of memory, according to the VMSPLIT configuration, which in turn determines the PAGE_OFFSET. We use the following KASAN_SHADOW_OFFSETs depending on how the virtual memory is split up: - 0x1f000000 if we have 1G userspace / 3G kernelspace split: - The kernel address space is 3G (0xc0000000) - PAGE_OFFSET is then set to 0x40000000 so the kernel static image (vmlinux) uses addresses 0x40000000 .. 0xffffffff - On top of that we have the MODULES_VADDR which under the worst case (using ARM instructions) is PAGE_OFFSET - 16M (0x01000000) = 0x3f000000 so the modules use addresses 0x3f000000 .. 0x3fffffff - So the addresses 0x3f000000 .. 0xffffffff need to be covered with shadow memory. That is 0xc1000000 bytes of memory. - 1/8 of that is needed for its shadow memory, so 0x18200000 bytes of shadow memory is needed. We "steal" that from the remaining lowmem. - The KASAN_SHADOW_START becomes 0x26e00000, to KASAN_SHADOW_END at 0x3effffff. - Now we can calculate the KASAN_SHADOW_OFFSET for any kernel address as 0x3f000000 needs to map to the first byte of shadow memory and 0xffffffff needs to map to the last byte of shadow memory. Since: SHADOW_ADDR = (address >> 3) + KASAN_SHADOW_OFFSET 0x26e00000 = (0x3f000000 >> 3) + KASAN_SHADOW_OFFSET KASAN_SHADOW_OFFSET = 0x26e00000 - (0x3f000000 >> 3) KASAN_SHADOW_OFFSET = 0x26e00000 - 0x07e00000 KASAN_SHADOW_OFFSET = 0x1f000000 - 0x5f000000 if we have 2G userspace / 2G kernelspace split: - The kernel space is 2G (0x80000000) - PAGE_OFFSET is set to 0x80000000 so the kernel static image uses 0x80000000 .. 0xffffffff. - On top of that we have the MODULES_VADDR which under the worst case (using ARM instructions) is PAGE_OFFSET - 16M (0x01000000) = 0x7f000000 so the modules use addresses 0x7f000000 .. 0x7fffffff - So the addresses 0x7f000000 .. 0xffffffff need to be covered with shadow memory. That is 0x81000000 bytes of memory. - 1/8 of that is needed for its shadow memory, so 0x10200000 bytes of shadow memory is needed. We "steal" that from the remaining lowmem. - The KASAN_SHADOW_START becomes 0x6ee00000, to KASAN_SHADOW_END at 0x7effffff. - Now we can calculate the KASAN_SHADOW_OFFSET for any kernel address as 0x7f000000 needs to map to the first byte of shadow memory and 0xffffffff needs to map to the last byte of shadow memory. Since: SHADOW_ADDR = (address >> 3) + KASAN_SHADOW_OFFSET 0x6ee00000 = (0x7f000000 >> 3) + KASAN_SHADOW_OFFSET KASAN_SHADOW_OFFSET = 0x6ee00000 - (0x7f000000 >> 3) KASAN_SHADOW_OFFSET = 0x6ee00000 - 0x0fe00000 KASAN_SHADOW_OFFSET = 0x5f000000 - 0x9f000000 if we have 3G userspace / 1G kernelspace split, and this is the default split for ARM: - The kernel address space is 1GB (0x40000000) - PAGE_OFFSET is set to 0xc0000000 so the kernel static image uses 0xc0000000 .. 0xffffffff. - On top of that we have the MODULES_VADDR which under the worst case (using ARM instructions) is PAGE_OFFSET - 16M (0x01000000) = 0xbf000000 so the modules use addresses 0xbf000000 .. 0xbfffffff - So the addresses 0xbf000000 .. 0xffffffff need to be covered with shadow memory. That is 0x41000000 bytes of memory. - 1/8 of that is needed for its shadow memory, so 0x08200000 bytes of shadow memory is needed. We "steal" that from the remaining lowmem. - The KASAN_SHADOW_START becomes 0xb6e00000, to KASAN_SHADOW_END at 0xbfffffff. - Now we can calculate the KASAN_SHADOW_OFFSET for any kernel address as 0xbf000000 needs to map to the first byte of shadow memory and 0xffffffff needs to map to the last byte of shadow memory. Since: SHADOW_ADDR = (address >> 3) + KASAN_SHADOW_OFFSET 0xb6e00000 = (0xbf000000 >> 3) + KASAN_SHADOW_OFFSET KASAN_SHADOW_OFFSET = 0xb6e00000 - (0xbf000000 >> 3) KASAN_SHADOW_OFFSET = 0xb6e00000 - 0x17e00000 KASAN_SHADOW_OFFSET = 0x9f000000 - 0x8f000000 if we have 3G userspace / 1G kernelspace with full 1 GB low memory (VMSPLIT_3G_OPT): - The kernel address space is 1GB (0x40000000) - PAGE_OFFSET is set to 0xb0000000 so the kernel static image uses 0xb0000000 .. 0xffffffff. - On top of that we have the MODULES_VADDR which under the worst case (using ARM instructions) is PAGE_OFFSET - 16M (0x01000000) = 0xaf000000 so the modules use addresses 0xaf000000 .. 0xaffffff - So the addresses 0xaf000000 .. 0xffffffff need to be covered with shadow memory. That is 0x51000000 bytes of memory. - 1/8 of that is needed for its shadow memory, so 0x0a200000 bytes of shadow memory is needed. We "steal" that from the remaining lowmem. - The KASAN_SHADOW_START becomes 0xa4e00000, to KASAN_SHADOW_END at 0xaeffffff. - Now we can calculate the KASAN_SHADOW_OFFSET for any kernel address as 0xaf000000 needs to map to the first byte of shadow memory and 0xffffffff needs to map to the last byte of shadow memory. Since: SHADOW_ADDR = (address >> 3) + KASAN_SHADOW_OFFSET 0xa4e00000 = (0xaf000000 >> 3) + KASAN_SHADOW_OFFSET KASAN_SHADOW_OFFSET = 0xa4e00000 - (0xaf000000 >> 3) KASAN_SHADOW_OFFSET = 0xa4e00000 - 0x15e00000 KASAN_SHADOW_OFFSET = 0x8f000000 - The default value of 0xffffffff for KASAN_SHADOW_OFFSET is an error value. We should always match one of the above shadow offsets. When we do this, TASK_SIZE will sometimes get a bit odd values that will not fit into immediate mov assembly instructions. To account for this, we need to rewrite some assembly using TASK_SIZE like this: - mov r1, #TASK_SIZE + ldr r1, =TASK_SIZE or - cmp r4, #TASK_SIZE + ldr r0, =TASK_SIZE + cmp r4, r0 this is done to avoid the immediate #TASK_SIZE that need to fit into a limited number of bits. Cc: Andrey Ryabinin <aryabinin@virtuozzo.com> Cc: Alexander Potapenko <glider@google.com> Cc: Dmitry Vyukov <dvyukov@google.com> Cc: kasan-dev@googlegroups.com Cc: Mike Rapoport <rppt@linux.ibm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> # QEMU/KVM/mach-virt/LPAE/8G Tested-by: Florian Fainelli <f.fainelli@gmail.com> # Brahma SoCs Tested-by: Ahmad Fatoum <a.fatoum@pengutronix.de> # i.MX6Q Reported-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Abbott Liu <liuwenliang@huawei.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-27ARM: 9012/1: move device tree mapping out of linear regionArd Biesheuvel1-1/+6
On ARM, setting up the linear region is tricky, given the constraints around placement and alignment of the memblocks, and how the kernel itself as well as the DT are placed in physical memory. Let's simplify matters a bit, by moving the device tree mapping to the top of the address space, right between the end of the vmalloc region and the start of the the fixmap region, and create a read-only mapping for it that is independent of the size of the linear region, and how it is organized. Since this region was formerly used as a guard region, which will now be populated fully on LPAE builds by this read-only mapping (which will still be able to function as a guard region for stray writes), bump the start of the [underutilized] fixmap region by 512 KB as well, to ensure that there is always a proper guard region here. Doing so still leaves ample room for the fixmap space, even with NR_CPUS set to its maximum value of 32. Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-10-13Merge tag 'docs-5.10' of git://git.lwn.net/linuxLinus Torvalds1-1/+1
Pull documentation updates from Jonathan Corbet: "As hoped, things calmed down for docs this cycle; fewer changes and almost no conflicts at all. This includes: - A reworked and expanded user-mode Linux document - Some simplifications and improvements for submitting-patches.rst - An emergency fix for (some) problems with Sphinx 3.x - Some welcome automarkup improvements to automatically generate cross-references to struct definitions and other documents - The usual collection of translation updates, typo fixes, etc" * tag 'docs-5.10' of git://git.lwn.net/linux: (81 commits) gpiolib: Update indentation in driver.rst for code excerpts Documentation/admin-guide: tainted-kernels: Fix typo occured Documentation: better locations for sysfs-pci, sysfs-tagging docs: programming-languages: refresh blurb on clang support Documentation: kvm: fix a typo Documentation: Chinese translation of Documentation/arm64/amu.rst doc: zh_CN: index files in arm64 subdirectory mailmap: add entry for <mstarovoitov@marvell.com> doc: seq_file: clarify role of *pos in ->next() docs: trace: ring-buffer-design.rst: use the new SPDX tag Documentation: kernel-parameters: clarify "module." parameters Fix references to nommu-mmap.rst docs: rewrite admin-guide/sysctl/abi.rst docs: fb: Remove vesafb scrollback boot option docs: fb: Remove sstfb scrollback boot option docs: fb: Remove matroxfb scrollback boot option docs: fb: Remove framebuffer scrollback boot option docs: replace the old User Mode Linux HowTo with a new one Documentation/admin-guide: blockdev/ramdisk: remove use of "rdev" Documentation/admin-guide: README & svga: remove use of "rdev" ...
2020-09-29efi: efivars: limit availability to X86 buildsArd Biesheuvel1-1/+1
CONFIG_EFI_VARS controls the code that exposes EFI variables via sysfs entries, which was deprecated before support for non-Intel architectures was added to EFI. So let's limit its availability to Intel architectures for the time being, and hopefully remove it entirely in the not too distant future. While at it, let's remove the module alias so that the module is no longer loaded automatically. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2020-09-24documentation: arm: sunxi: Allwinner H2+/H3 updateWilken Gottwalt1-1/+1
Replaced the link to the datasheet by a link to the current version. Signed-off-by: Wilken Gottwalt <wilken.gottwalt@mailbox.org> Link: https://lore.kernel.org/r/20200923065954.GA22809@monster.powergraphx.local Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-08-06Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds1-4/+2
Pull ARM updates from Russell King: - add arch/arm/Kbuild from Masahiro Yamada. - simplify act_mm macro, since it contains an open-coded get_thread_info. - VFP updates for Clang from Stefan Agner. - Fix unwinder for Clang from Nathan Huckleberry. - Remove unused it8152 PCI host controller, used by the removed cm-x2xx platforms from Mike Rapoport. - Further explanation of __range_ok(). - Remove kimage_voffset that isn't used anymore from Marc Zyngier. - Drop ancient Thumb-2 workaround for old binutils from Ard Biesheuvel. - Documentation cleanup for mach-* from Pete Zaitcev. * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 8996/1: Documentation/Clean up the description of mach-<class> ARM: 8995/1: drop Thumb-2 workaround for ancient binutils ARM: 8994/1: mm: drop kimage_voffset which was only used by KVM ARM: uaccess: add further explanation of __range_ok() ARM: 8993/1: remove it8152 PCI controller driver ARM: 8992/1: Fix unwind_frame for clang-built kernels ARM: 8991/1: use VFP assembler mnemonics if available ARM: 8990/1: use VFP assembler mnemonics in register load/store macros ARM: 8989/1: use .fpu assembler directives instead of assembler arguments ARM: 8982/1: mm: Simplify act_mm macro ARM: 8981/1: add arch/arm/Kbuild
2020-07-28ARM: 8996/1: Documentation/Clean up the description of mach-<class>Pete Zaitcev1-4/+2
Polish the description of machine classes a little bit, remove the duplicate directory name, so the reader does not feel compelled to dig through the output of "git blame". Signed-off-by: Pete Zaitcev <zaitcev@yahoo.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-06-26docs: dt: convert booting-without-of.txt to ReST formatMauro Carvalho Chehab1-1/+1
- Add a SPDX header; - Adjust document title; - Adjust document and section titles; - Some whitespace fixes and new line breaks; - Mark literal blocks as such; - Add table markups; - Add it to devicetree/index.rst. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/8dce14af13f66cb8393c21b58f0693e667a7045f.1592918949.git.mchehab+huawei@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-05-05docs: dt: convert ABI.txt to ReST formatMauro Carvalho Chehab1-1/+1
This file only requires a properly-formatted title to be recognized as a ReST file. As there will be more files under bindings/ that will be included at the documentation body, add a new index.rst file there. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
2020-02-19docs: arm: tcm: Fix a few typosJonathan Neuschäfer1-3/+3
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2020-01-11ARM: at91: Documentation: add sam9x60 product and datasheetNicolas Ferre1-0/+6
Add the new SAM9X60 ARM926-based SoC from Microchip and its associated datasheet. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20200110090103.7728-1-nicolas.ferre@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-09-30ARM: at91: Documentation: update the sama5d3 and armv7m datasheetsNicolas Ferre1-2/+2
Update SAMA5D3 and SAM E70/S70/V70/V71 Family SoC Datasheets. URL are updated in Microchip documentation. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20190819151219.19727-1-nicolas.ferre@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-08-13Documentation/arm/samsung-s3c24xx: Remove stray U+FEFF character to fix titleJonathan Neuschäfer1-1/+1
It seems a UTF-8 byte order mark (the least useful kind of BOM...) snuck into the file and broke Sphinx's detection of the title line. Besides making arm/samsung-s3c24xx/index.html look a little better, this patch also confines the non-index pages in arm/samsung-s3c24xx to their own table of contents. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2019-08-13Documentation/arm/sa1100/assabet: Fix 'make assabet_defconfig' commandJonathan Neuschäfer1-1/+1
"make assabet_config" doesn't work. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2019-08-13Documentation/arm/sa1100: Remove some obsolete documentationJonathan Neuschäfer13-452/+0
The support for the following boards, among others, was removed in 2004 with commit "[ARM] Remove broken SA1100 machine support.": - ADS Bitsy - Brutus - Freebird - ADS GraphicsClient Plus - ADS GraphicsMaster - Höft & Wessel Webpanel - Compaq Itsy - nanoEngine - Pangolin - PLEB - Yopy Tifon support has been removed in 2.4.3.3. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2019-07-31docs: arm: Remove orphan sh-mobile directoryGeert Uytterhoeven1-1/+0
This directory is empty, except for a .gitignore file, listing an executable file that can no longer be built since commit c6535e1e0361157e ("Documentation: Remove ZBOOT MMC/SDHI utility and docs"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2019-07-15docs: arm: fix a breakage with pdf outputMauro Carvalho Chehab1-0/+1
Add an extra blank line, as otherwise XeLaTex will complain with: ! LaTeX Error: Too deeply nested. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
2019-07-15docs: add SPDX tags to new index filesMauro Carvalho Chehab6-0/+12
All those new files I added are under GPL v2.0 license. Add the corresponding SPDX headers to them. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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