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2026-04-03enic: extend resource discovery for SR-IOV admin channelSatish Kharat3-0/+16
VIC firmware exposes admin channel resources (WQ, RQ, CQ) for PF-VF communication when SR-IOV is active. Add the corresponding resource type definitions and teach the discovery and access functions to handle them. Signed-off-by: Satish Kharat <satishkh@cisco.com> Link: https://patch.msgid.link/20260401-enic-sriov-v2-prep-v4-1-d5834b2ef1b9@cisco.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-04-03MAINTAINERS: orphan PPP over Ethernet driverQingfang Deng1-2/+1
We haven't seen activities from Michal Ostrowski for quite a long time. The last commit from him is fb64bb560e18 ("PPPoE: Fix flush/close races."), which was in 2009. Email to mostrows@earthlink.net also bounces. Signed-off-by: Qingfang Deng <dqfext@gmail.com> Link: https://patch.msgid.link/20260401022842.15082-1-dqfext@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-04-03Merge branch 'net-phy-microchip-add-downshift-support-for-lan88xx'Jakub Kicinski2-1/+83
Nicolai Buchwitz says: ==================== net: phy: microchip: add downshift support for LAN88xx Add standard ETHTOOL_PHY_DOWNSHIFT tunable support for the Microchip LAN88xx PHY, following the same pattern used by Marvell and other PHY drivers. Ethernet cables with faulty or missing pairs (specifically C and D) can successfully auto-negotiate 1000BASE-T but fail to establish a stable link. The LAN88xx PHY supports automatic downshift to 100BASE-TX after a configurable number of failed attempts (2-5). Patch 1 adds the get/set tunable implementation. Patch 2 enables downshift by default with a count of 2. The setting is stored in the driver's private data so that user changes via ethtool are preserved across suspend/resume cycles. Based on an earlier downstream implementation by Phil Elwell. Tested on Raspberry Pi 3B+ (LAN7515/LAN88xx). ==================== Link: https://patch.msgid.link/20260401123848.696766-1-nb@tipi-net.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-04-03net: phy: microchip: enable downshift by default on LAN88xxNicolai Buchwitz1-2/+15
Enable auto-downshift from 1000BASE-T to 100BASE-TX after 2 failed auto-negotiation attempts by default. This ensures that links with faulty or missing cable pairs (C and D) fall back to 100Mbps without requiring userspace configuration. The downshift count is stored in the driver's private data and applied in config_init, so user changes via ethtool are preserved across suspend/resume cycles. Users can override or disable downshift at runtime: ethtool --set-phy-tunable eth0 downshift off Signed-off-by: Nicolai Buchwitz <nb@tipi-net.de> Link: https://patch.msgid.link/20260401123848.696766-3-nb@tipi-net.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-04-03net: phy: microchip: add downshift tunable support for LAN88xxNicolai Buchwitz2-0/+69
Implement the standard ETHTOOL_PHY_DOWNSHIFT tunable for the LAN88xx PHY. This allows runtime configuration of the auto-downshift feature via ethtool: ethtool --set-phy-tunable eth0 downshift on count 3 The LAN88xx PHY supports downshifting from 1000BASE-T to 100BASE-TX after 2-5 failed auto-negotiation attempts. Valid count values are 2, 3, 4 and 5. This is based on an earlier downstream implementation by Phil Elwell. Signed-off-by: Nicolai Buchwitz <nb@tipi-net.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/20260401123848.696766-2-nb@tipi-net.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-04-03r8152: Add helper functions for SRAM2Chih Kai Hsu1-103/+75
Add the following helper functions for SRAM2 access to simplify the code and improve readability: - sram2_write() - write data to SRAM2 address - sram2_read() - read data from SRAM2 address - sram2_write_w0w1() - read-modify-write operation Signed-off-by: Chih Kai Hsu <hsu.chih.kai@realtek.com> Reviewed-by: Hayes Wang <hayeswang@realtek.com> Link: https://patch.msgid.link/20260401115542.34601-1-nic_swsd@realtek.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-04-03net: phy: bcm84881: add LED framework support for BCM84891/BCM84892Daniel Wagner1-0/+156
Expose LED1 and LED2 pins via the PHY LED framework. Each pin has a source mask (MASK_LOW + MASK_EXT registers) selecting which hardware events light it, plus a CTL field in the shared 0xA83B register (RMW; LED4 is firmware-controlled per the datasheet). Hardware can offload per-speed link triggers (1000/2500/5000/10000), RX/TX activity, and force-on. LINK_100 is accepted only alongside LINK_1000: source bit 4 lights at both speeds and 100-alone isn't representable, so the unrepresentable case falls to software. The chip has five LED pins; only LED1/LED2 are exposed here as those are the only ones characterized on tested hardware. LED4 is firmware- controlled regardless of strap configuration. Tested on TRENDnet TEG-S750 (LED1/LED2 wired to an antiparallel bicolor LED): brightness_set via sysfs; netdev trigger offloaded=1 with amber lit at 100M/1G/2.5G and green lit at 10G via respective link_* modes; LED off immediately on cable unplug with no software involvement. Signed-off-by: Daniel Wagner <wagner.daniel.t@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260401114931.3091818-1-wagner.daniel.t@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-04-03Merge branch 'macvlan-broadcast-delivery-changes'Jakub Kicinski1-3/+8
Eric Dumazet says: ==================== macvlan: broadcast delivery changes First patch adds data-race annotations. Second patch changes macvlan_broadcast_enqueue() to return early if the queue is full. ==================== Link: https://patch.msgid.link/20260401103809.3038139-1-edumazet@google.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-04-03macvlan: avoid spinlock contention in macvlan_broadcast_enqueue()Eric Dumazet1-0/+3
Under high stress, we spend a lot of time cloning skbs, then acquiring a spinlock, then freeing the clone because the queue is full. Add a shortcut to avoid these costs under pressure. Signed-off-by: Eric Dumazet <edumazet@google.com> Link: https://patch.msgid.link/20260401103809.3038139-3-edumazet@google.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-04-03macvlan: annotate data-races around port->bc_queue_len_usedEric Dumazet1-3/+5
port->bc_queue_len_used is read and written locklessly, add READ_ONCE()/WRITE_ONCE() annotations. While WRITE_ONCE() in macvlan_fill_info() is not yet needed, it is a prereq for future RTNL avoidance. Fixes: d4bff72c8401 ("macvlan: Support for high multicast packet rate") Signed-off-by: Eric Dumazet <edumazet@google.com> Link: https://patch.msgid.link/20260401103809.3038139-2-edumazet@google.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-04-03crypto: qat - add support for zstdGiovanni Cabiddu17-30/+773
Add support for the ZSTD algorithm for QAT GEN4, GEN5 and GEN6 via the acomp API. For GEN4 and GEN5, compression is performed in hardware using LZ4s, a QAT-specific variant of LZ4. The compressed output is post-processed to generate ZSTD sequences, and the ZSTD library is then used to produce the final ZSTD stream via zstd_compress_sequences_and_literals(). Only inputs between 8 KB and 512 KB are offloaded to the device. The minimum size restriction will be relaxed once polling support is added. The maximum size is limited by the use of pre-allocated per-CPU scratch buffers. On these generations, only compression is offloaded to hardware; decompression always falls back to software. For GEN6, both compression and decompression are offloaded to the accelerator, which natively supports the ZSTD algorithm. There is no limit on the input buffer size supported. However, since GEN6 is limited to a history size of 64 KB, decompression of frames compressed with a larger history falls back to software. Since GEN2 devices do not support ZSTD or LZ4s, add a mechanism that prevents selecting GEN2 compression instances for ZSTD or LZ4s when a GEN2 plug-in card is present on a system with an embedded GEN4, GEN5 or GEN6 device. In addition, modify the algorithm registration logic to allow registering the correct implementation, i.e. LZ4s based for GEN4 and GEN5 or native ZSTD for GEN6. Co-developed-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Laurent M Coquerel <laurent.m.coquerel@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: qat - use swab32 macroGiovanni Cabiddu1-4/+6
Replace __builtin_bswap32() with swab32 in icp_qat_hw_20_comp.h to fix the following build errors on architectures without native byte-swap support: alpha-linux-ld: drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.o: in function `adf_gen4_build_decomp_block': drivers/crypto/intel/qat/qat_common/icp_qat_hw_20_comp.h:141:(.text+0xeec): undefined reference to `__bswapsi2' alpha-linux-ld: drivers/crypto/intel/qat/qat_common/icp_qat_hw_20_comp.h:141:(.text+0xef8): undefined reference to `__bswapsi2' alpha-linux-ld: drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.o: in function `adf_gen4_build_comp_block': drivers/crypto/intel/qat/qat_common/icp_qat_hw_20_comp.h:57:(.text+0xf64): undefined reference to `__bswapsi2' alpha-linux-ld: drivers/crypto/intel/qat/qat_common/icp_qat_hw_20_comp.h:57:(.text+0xf7c): undefined reference to `__bswapsi2' Fixes: 5b14b2b307e4 ("crypto: qat - enable deflate for QAT GEN4") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202603290259.Ig9kDOmI-lkp@intel.com/ Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: img-hash - drop redundant return variableThorsten Blum1-4/+1
In img_hash_digest(), remove the redundant return variable 'err' and return img_hash_handle_queue() directly. Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: img-hash - use list_first_entry_or_null to simplify digestThorsten Blum1-15/+6
Use list_first_entry_or_null() to simplify img_hash_digest() and remove the now-unused local 'struct img_hash_dev *' variables. Use 'ctx->hdev' when calling img_hash_handle_queue() instead of 'tctx->hdev'. Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: cryptomgr - Select algorithm types only when CRYPTO_SELFTESTSEric Biggers4-8/+23
Enabling any template selects CRYPTO_MANAGER, which causes CRYPTO_MANAGER2 to enable itself, which selects every algorithm type option. However, pulling in all algorithm types is needed only when the self-tests are enabled. So condition the selections accordingly. To make this possible, also add the missing selections to various symbols that were relying on transitive selections via CRYPTO_MANAGER. Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: aspeed - Use memcpy_from_sglist() in aspeed_ahash_dma_prepare()Paul Louvel1-2/+1
Replace scatterwalk_map_and_copy() with memcpy_from_sglist() in aspeed_ahash_dma_prepare(). The latter provides a simpler interface without requiring a direction parameter, making the code easier to read and less error-prone. No functional change intended. Signed-off-by: Paul Louvel <paul.louvel@bootlin.com> Reviewed-by: Neal Liu <neal_liu@aspeedtech.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: kconfig - fix typos in atmel-ecc and atmel-sha204a helpThorsten Blum1-2/+2
s/Microhip/Microchip/ Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: x86 - Remove des and des3_ede codeEric Biggers4-1239/+0
Since DES and Triple DES are obsolete, there is very little point in maintining architecture-optimized code for them. Remove it. Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: sparc - Remove des and des3_ede codeEric Biggers4-917/+0
Since DES and Triple DES are obsolete, there is very little point in maintining architecture-optimized code for them. Remove it. Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: s390 - Remove des and des3_ede codeEric Biggers5-521/+0
Since DES and Triple DES are obsolete, there is very little point in maintining architecture-optimized code for them. Remove it. Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: rng - Don't pull in DRBG when CRYPTO_FIPS=nEric Biggers1-7/+0
crypto_stdrng_get_bytes() is now always available: - When CRYPTO_FIPS=n it is an inline function that always calls into the always-built-in drivers/char/random.c. - When CRYPTO_FIPS=y it is an inline function that calls into either random.c or crypto/rng.c, depending on the value of fips_enabled. The former is again always built-in. The latter is built-in as well in this case, due to CRYPTO_FIPS=y. Thus, the CRYPTO_RNG_DEFAULT symbol is no longer needed. Remove it. This makes it so that CRYPTO_DRBG_MENU (and hence also CRYPTO_DRBG, CRYPTO_JITTERENTROPY, and CRYPTO_LIB_SHA3) no longer gets unnecessarily pulled into CRYPTO_FIPS=n kernels. I.e. CRYPTO_FIPS=n kernels are no longer bloated with code that is relevant only to FIPS certifications. Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: fips - Depend on CRYPTO_DRBG=yEric Biggers1-1/+1
Currently, the callers of crypto_stdrng_get_bytes() do 'select CRYPTO_RNG_DEFAULT', which does 'select CRYPTO_DRBG_MENU'. However, due to the change in how crypto_stdrng_get_bytes() is implemented, CRYPTO_DRBG_MENU is now needed only when CRYPTO_FIPS. But, 'select CRYPTO_DRBG_MENU if CRYPTO_FIPS' would cause a recursive dependency, since CRYPTO_FIPS 'depends on CRYPTO_DRBG'. Solve this by just making CRYPTO_FIPS depend on CRYPTO_DRBG=y (rather than CRYPTO_DRBG i.e. CRYPTO_DRBG=y || CRYPTO_DRBG=m). The distros that use CRYPTO_FIPS=y already set CRYPTO_DRBG=y anyway, which makes sense. This makes the CRYPTO_RNG_DEFAULT symbol (and its corresponding selection of CRYPTO_DRBG_MENU) unnecessary. A later commit removes it. Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: rng - Make crypto_stdrng_get_bytes() use normal RNG in non-FIPS modeEric Biggers2-4/+15
"stdrng" is needed only in "FIPS mode". Therefore, make crypto_stdrng_get_bytes() delegate to either the normal Linux RNG or to "stdrng", depending on the current mode. This will eliminate the need to built the SP800-90A DRBG and its dependencies into CRYPTO_FIPS=n kernels. Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: rng - Unexport "default RNG" symbolsEric Biggers2-11/+3
Now that crypto_default_rng, crypto_get_default_rng(), and crypto_put_default_rng() have no users outside crypto/rng.c itself, unexport them and make them static. Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03net: tipc: Use crypto_stdrng_get_bytes()Eric Biggers1-11/+2
Replace the sequence of crypto_get_default_rng(), crypto_rng_get_bytes(), and crypto_put_default_rng() with the equivalent helper function crypto_stdrng_get_bytes(). Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: intel/keembay-ocs-ecc - Use crypto_stdrng_get_bytes()Eric Biggers1-13/+4
Replace the sequence of crypto_get_default_rng(), crypto_rng_get_bytes(), and crypto_put_default_rng() with the equivalent helper function crypto_stdrng_get_bytes(). Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: hisilicon/hpre - Use crypto_stdrng_get_bytes()Eric Biggers1-10/+2
Replace the sequence of crypto_get_default_rng(), crypto_rng_get_bytes(), and crypto_put_default_rng() with the equivalent helper function crypto_stdrng_get_bytes(). Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: geniv - Use crypto_stdrng_get_bytes()Eric Biggers1-7/+1
Replace the sequence of crypto_get_default_rng(), crypto_rng_get_bytes(), and crypto_put_default_rng() with the equivalent helper function crypto_stdrng_get_bytes(). Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: ecc - Use crypto_stdrng_get_bytes()Eric Biggers1-8/+3
Replace the sequence of crypto_get_default_rng(), crypto_rng_get_bytes(), and crypto_put_default_rng() with the equivalent helper function crypto_stdrng_get_bytes(). Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: dh - Use crypto_stdrng_get_bytes()Eric Biggers1-7/+1
Replace the sequence of crypto_get_default_rng(), crypto_rng_get_bytes(), and crypto_put_default_rng() with the equivalent helper function crypto_stdrng_get_bytes(). Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: rng - Add crypto_stdrng_get_bytes()Eric Biggers2-0/+27
All callers of crypto_get_default_rng() use the following sequence: crypto_get_default_rng() crypto_rng_get_bytes(crypto_default_rng, ...) crypto_put_default_rng() While it may have been intended that callers amortize the cost of getting and putting the "default RNG" (i.e. "stdrng") over multiple calls, in practice that optimization is never used. The callers just want a function that gets random bytes from the "stdrng". Therefore, add such a function: crypto_stdrng_get_bytes(). Importantly, this decouples the callers from the crypto_rng API. That allows a later commit to make this function simply call get_random_bytes_wait() unless the kernel is in "FIPS mode". Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: iaa - fix per-node CPU counter reset in rebalance_wq_table()Giovanni Cabiddu1-1/+1
The cpu counter used to compute the IAA device index is reset to zero at the start of each NUMA node iteration. This causes CPUs on every node to map starting from IAA index 0 instead of continuing from the previous node's last index. On multi-node systems, this results in all nodes mapping their CPUs to the same initial set of IAA devices, leaving higher-indexed devices unused. Move the cpu counter initialization before the for_each_node_with_cpus() loop so that the IAA index computation accumulates correctly across all nodes. Fixes: 714ca27e9bf4 ("crypto: iaa - Optimize rebalance_wq_table()") Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Acked-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: qat - replace scnprintf() with sysfs_emit()Atharv Dubey1-3/+3
Replace scnprintf() with sysfs_emit() in the three RAS error counter sysfs show callbacks. sysfs_emit() is the recommended API for sysfs show functions as per Documentation/filesystems/sysfs.rst; it enforces the PAGE_SIZE limit implicitly, removing the need to pass it explicitly. Signed-off-by: Atharv Dubey <atharvd440@gmail.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Ahsan Atta <ahsan.atta@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: qat - fix type mismatch in RAS sysfs show functionsGiovanni Cabiddu1-6/+6
ADF_RAS_ERR_CTR_READ() expands to atomic_read(), which returns int. The local variable 'counter' was declared as 'unsigned long', causing a type mismatch on the assignment. The format specifier '%ld' was consequently wrong in two ways: wrong length modifier and wrong signedness. Use int to match the return type of atomic_read() and update the format specifier to '%d' accordingly. Fixes: 532d7f6bc458 ("crypto: qat - add error counters") Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Ahsan Atta <ahsan.atta@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: qat - fix compression instance leakGiovanni Cabiddu1-2/+8
qat_comp_alg_init_tfm() acquires a compression instance via qat_compression_get_instance_node() before calling qat_comp_build_ctx() to initialize the compression context. If qat_comp_build_ctx() fails, the function returns an error without releasing the compression instance, causing a resource leak. When qat_comp_build_ctx() fails, release the compression instance with qat_compression_put_instance() and clear the context to avoid leaving a stale reference to the released instance. The issue was introduced when build_deflate_ctx() (which always returned void) was replaced by qat_comp_build_ctx() (which can return an error) without adding error handling for the failure path. Fixes: cd0e7160f80f ("crypto: qat - refactor compression template logic") Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Laurent M Coquerel <laurent.m.coquerel@intel.com> Reviewed-by: Ahsan Atta <ahsan.atta@intel.com> Reviewed-by: Wojciech Drewek <wojciech.drewek@linux.intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: qat - use acomp_tfm_ctx()Giovanni Cabiddu1-5/+3
Replace the usage of crypto_acomp_tfm() followed by crypto_tfm_ctx() with a single call to the equivalent acomp_tfm_ctx(). This does not introduce any functional changes. Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Laurent M Coquerel <laurent.m.coquerel@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: ccp - Replace snprintf("%s") with strscpyThorsten Blum6-18/+15
Replace snprintf("%s") with the faster and more direct strscpy(). Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: hifn_795x - Replace snprintf("%s") with strscpyThorsten Blum1-3/+3
Replace snprintf("%s", ...) with the faster and more direct strscpy(). Check if the return value is less than 0 to detect string truncation. Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: qat - disable 420xx AE cluster when lead engine is fused offAhsan Atta1-2/+18
The get_ae_mask() function only disables individual engines based on the fuse register, but engines are organized in clusters of 4. If the lead engine of a cluster is fused off, the entire cluster must be disabled. Replace the single bitmask inversion with explicit test_bit() checks on the lead engine of each group, disabling the full ADF_AE_GROUP when the lead bit is set. Signed-off-by: Ahsan Atta <ahsan.atta@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Fixes: fcf60f4bcf54 ("crypto: qat - add support for 420xx devices") Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: qat - disable 4xxx AE cluster when lead engine is fused offAhsan Atta1-2/+12
The get_ae_mask() function only disables individual engines based on the fuse register, but engines are organized in clusters of 4. If the lead engine of a cluster is fused off, the entire cluster must be disabled. Replace the single bitmask inversion with explicit test_bit() checks on the lead engine of each group, disabling the full ADF_AE_GROUP when the lead bit is set. Signed-off-by: Ahsan Atta <ahsan.atta@intel.com> Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Fixes: 8c8268166e834 ("crypto: qat - add qat_4xxx driver") Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: testmgr - Add test vectors for authenc(hmac(md5),cbc(aes))Aleksander Jan Bajkowski2-0/+262
Test vectors were generated starting from existing CBC(AES) test vectors (RFC3602, NIST SP800-38A) and adding HMAC(MD5) computed with Python script. Then, the results were double-checked on Mediatek MT7981 (safexcel) and NXP P2020 (talitos). Both platforms pass self-tests. Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03crypto: af_alg - limit RX SG extraction by receive buffer budgetDouya Le2-0/+7
Make af_alg_get_rsgl() limit each RX scatterlist extraction to the remaining receive buffer budget. af_alg_get_rsgl() currently uses af_alg_readable() only as a gate before extracting data into the RX scatterlist. Limit each extraction to the remaining af_alg_rcvbuf(sk) budget so that receive-side accounting matches the amount of data attached to the request. If skcipher cannot obtain enough RX space for at least one chunk while more data remains to be processed, reject the recvmsg call instead of rounding the request length down to zero. Fixes: e870456d8e7c8d57c059ea479b5aadbb55ff4c3a ("crypto: algif_skcipher - overhaul memory management") Reported-by: Yifan Wu <yifanwucs@gmail.com> Reported-by: Juefei Pu <tomapufckgml@gmail.com> Co-developed-by: Yuan Tan <yuantan098@gmail.com> Signed-off-by: Yuan Tan <yuantan098@gmail.com> Suggested-by: Xin Liu <bird@lzu.edu.cn> Signed-off-by: Douya Le <ldy3087146292@gmail.com> Signed-off-by: Ren Wei <n05ec@lzu.edu.cn> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-04-03Merge branch 7.0/scsi-fixes into 7.1/scsi-stagingMartin K. Petersen20-81/+171
Pull in fixes to resolve mpi3mr merge conflict. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2026-04-03Merge tag 'v7.0-p4' of ↵Linus Torvalds10-169/+101
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto fixes from Herbert Xu: - Add missing async markers to tegra - Fix long hmac key DMA handling in caam - Fix spurious ENOSPC errors in deflate - Fix SG chaining in af_alg - Do not use in-place process in algif_aead - Fix out-of-place destination overflow in authencesn * tag 'v7.0-p4' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: authencesn - Do not place hiseq at end of dst for out-of-place decryption crypto: algif_aead - Revert to operating out-of-place crypto: af-alg - fix NULL pointer dereference in scatterwalk crypto: deflate - fix spurious -ENOSPC crypto: caam - fix overflow on long hmac keys crypto: caam - fix DMA corruption on long hmac keys crypto: tegra - Add missing CRYPTO_ALG_ASYNC
2026-04-03lib/crc: arm64: Simplify intrinsics implementationArd Biesheuvel1-45/+32
NEON intrinsics are useful because they remove the need for manual register allocation, and the resulting code can be re-compiled and optimized for different micro-architectures, and shared between arm64 and 32-bit ARM. However, the strong typing of the vector variables can lead to incomprehensible gibberish, as is the case with the new CRC64 implementation. To address this, let's repaint all variables as uint64x2_t to minimize the number of vreinterpretq_xxx() calls, and to be able to rely on the ^ operator for exclusive OR operations. This makes the code much more concise and readable. While at it, wrap the calls to vmull_p64() et al in order to have a more consistent calling convention, and encapsulate any remaining vreinterpret() calls that are still needed. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20260330144630.33026-11-ardb@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2026-04-03lib/crc: arm64: Use existing macros for kernel-mode FPU cflagsArd Biesheuvel1-3/+2
Use the existing CC_FPU_CFLAGS and CC_NO_FPU_CFLAGS to pass the appropriate compiler command line options for building kernel mode NEON intrinsics code. This is tidier, and will make it easier to reuse the code for 32-bit ARM. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20260330144630.33026-9-ardb@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2026-04-03lib/crc: arm64: Drop unnecessary chunking logic from crc64Ard Biesheuvel1-7/+5
On arm64, kernel mode NEON executes with preemption enabled, so there is no need to chunk the input by hand. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20260330144630.33026-8-ardb@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2026-04-03lib/crc: arm64: Assume a little-endian kernelEric Biggers2-35/+30
Since support for big-endian arm64 kernels was removed, the CPU_LE() macro now unconditionally emits the code it is passed, and the CPU_BE() macro now unconditionally discards the code it is passed. Simplify the assembly code in lib/crc/arm64/ accordingly. Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20260401004431.151432-1-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2026-04-03virt: coco: change tsm_class to a const structJori Koolstra1-10/+9
The class_create() call has been deprecated in favor of class_register() as the driver core now allows for a struct class to be in read-only memory. Change tsm_class to be a const struct class and drop the class_create() call. Compile tested only. Link: https://lore.kernel.org/all/2023040244-duffel-pushpin-f738@gregkh/ Changes with v1: - Removed redundant int err variable. Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Jori Koolstra <jkoolstra@xs4all.nl> Reviewed-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Link: https://patch.msgid.link/20260306183325.245254-1-jkoolstra@xs4all.nl Signed-off-by: Dan Williams <djbw@kernel.org>
2026-04-03power: supply: qcom_smbx: allow disabling chargingCasey Connolly1-0/+7
Hook up USBIN_CMD_IL so that writing "0" to the status register will disable charging, this is useful to let users limit charging automatically. Signed-off-by: Casey Connolly <casey.connolly@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://patch.msgid.link/20260315-smb2-cherry-pick-v1-1-b2710e470490@ixit.cz Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
generated by cgit v1.2.3 (git 2.39.0) at 2026-06-11 00:11:42 +0300