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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.10, part two
Few changes exclusively for Google GS101:
1. Add HSI0 and HSI2 clock controllers (CMUs).
2. Add USB 3.1 Dual Role Device (DRD) support.
3. Add UFS (Universal Flash Storage) support.
4. Document bus clocks in pin controllers necessary for accessing
registers.
* tag 'samsung-dt64-6.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: gs101: specify empty clocks for remaining pinctrl
arm64: dts: exynos: gs101: specify bus clock for pinctrl_hsi2
arm64: dts: exynos: gs101: specify bus clock for pinctrl_peric[01]
arm64: dts: exynos: gs101: specify bus clock for pinctrl (far) alive
arm64: dts: exynos: gs101: enable ufs, phy on oriole & define ufs regulator
arm64: dts: exynos: gs101: Add ufs and ufs-phy dt nodes
arm64: dts: exynos: gs101: Add the hsi2 sysreg node
dt-bindings: soc: google: exynos-sysreg: add dedicated hsi2 sysreg compatible
arm64: dts: exynos: gs101-oriole: enable USB on this board
arm64: dts: exynos: gs101: add USB & USB-phy nodes
arm64: dts: exynos: gs101: enable cmu-hsi2 clock controller
arm64: dts: exynos: gs101: enable cmu-hsi0 clock controller
dt-bindings: clock: google,gs101-clock: add HSI2 clock management unit
dt-bindings: clock: google,gs101-clock: add HSI0 clock management unit
Link: https://lore.kernel.org/r/20240504121233.7589-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
Radxa Rock 3C board. More gpu+usb enablement on rk3588 boards as well
as two new iommus on rk3588.
* tag 'v6.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add rk3588 pcie and php IOMMUs
arm64: dts: rockchip: enable onboard spi flash for rock-3a
arm64: dts: rockchip: add USB-C support to rk3588s-orangepi-5
arm64: dts: rockchip: Enable GPU on Orange Pi 5
arm64: dts: rockchip: enable GPU on khadas-edge2
arm64: dts: rockchip: Add USB3 on Edgeble NCM6A-IO board
arm64: dts: rockchip: Support poweroff on Edgeble Neural Compute Module
arm64: dts: rockchip: Add Radxa ROCK 3C
dt-bindings: arm: rockchip: add Radxa ROCK 3C
Link: https://lore.kernel.org/r/13810480.dW097sEU6C@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt
mvebu dt64 for 6.10 (part 1)
Few dts fix for dt validation
* tag 'mvebu-dt64-6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: dts: marvell: espressobin-ultra: fix Ethernet Switch unit address
arm64: dts: marvell: turris-mox: drop unneeded flash address/size-cells
arm64: dts: marvell: eDPU: drop redundant address/size-cells
arm64: dts: marvell: cn9130-crb: drop unneeded "status"
arm64: dts: marvell: cn9130-crb: drop wrong unit-addresses
arm64: dts: marvell: cn9130-db: drop wrong unit-addresses
arm64: dts: marvell: cn9131-db: drop unneeded flash address/size-cells
arm64: dts: marvell: cn9130-db: drop unneeded flash address/size-cells
arm64: dts: marvell: ap80x: fix IOMMU unit address
Link: https://lore.kernel.org/r/87jzk8ndyy.fsf@BLaptop.bootlin.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The Espressobin Ultra DTS includes Espressobin DTSI which defines
ethernet-switch@1 node. The Ultra DTS overrides "reg" to 3, but that
leaves still old unit address which conflicts with the new phy@1 node
(W=1 dtc warning):
armada-3720-espressobin.dtsi:148.29-203.4: Warning (unique_unit_address_if_enabled): /soc/internal-regs@d0000000/mdio@32004/ethernet-switch@1: duplicate unit-address (also used in node /soc/internal-regs@d0000000/mdio@32004/ethernet-phy@1)
Fix this by deleting ethernet-switch@1 node and merging original node
with code from Ultra DTS into new ethernet-switch@3.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Flash node uses single "partition" node to describe partitions, so
remove deprecated address/size-cells properties to also fix dtc W=1
warnings:
armada-3720-turris-mox.dts:218.10-255.4: Warning (avoid_unnecessary_addr_size): /soc/internal-regs@d0000000/spi@10600/flash@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The ethernet-switch node does not have children with unit addresses, so
address/size-cells are not really correct, as reported by dtc W=1
warning:
armada-3720-eDPU.dts:26.19-60.4: Warning (avoid_unnecessary_addr_size): /soc/internal-regs@d0000000/mdio@32004/switch@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
This probably also fixes dtbs_check warning, but I could not find it, so
not sure about that.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The mmu600_pcie is connected with the five PCIe controllers.
The mmu600_php is connected with the USB3 controller, the GMAC
controllers, and the SATA controllers.
See 8.2 Block Diagram, in rk3588 TRM (Technical Reference Manual).
The IOMMUs are disabled by default, as further patches are needed to
program the SID/SSIDs in to the IOMMUs.
iommu: Default domain type: Translated
iommu: DMA domain TLB invalidation policy: strict mode
arm-smmu-v3 fc900000.iommu: ias 48-bit, oas 48-bit (features 0x001c1eaf)
arm-smmu-v3 fc900000.iommu: allocated 65536 entries for cmdq
arm-smmu-v3 fc900000.iommu: allocated 32768 entries for evtq
arm-smmu-v3 fc900000.iommu: msi_domain absent - falling back to wired irqs
Additionally, the IOMMU correctly triggers an IOMMU fault when
a PCIe device performs a write (since the device hasn't been
assigned a SID/SSID):
arm-smmu-v3 fc900000.iommu: event 0x02 received:
arm-smmu-v3 fc900000.iommu: 0x0000010000000002
arm-smmu-v3 fc900000.iommu: 0x0000000000000000
arm-smmu-v3 fc900000.iommu: 0x0000000000000000
arm-smmu-v3 fc900000.iommu: 0x0000000000000000
While this doesn't provide much value as is, having the devices as
disabled in the device tree will allow developers to see that the rk3588
actually has IOMMUs on the SoC.
Signed-off-by: Niklas Cassel <cassel@kernel.org>
Link: https://lore.kernel.org/r/20240502140231.477049-2-cassel@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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There is a mx25u12835f spi flash on this board, enable it.
[ 2.525805] spi-nor spi4.0: mx25u12835f (16384 Kbytes)
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240409120003.309358-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add support for using the Orange Pi 5 USB-C port for USB in OHCI, EHCI
or XHCI mode. Displayport AltMode is not yet supported.
Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20240418035232.35344-2-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Enable the Mali GPU in the Orange Pi 5
Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20240425222913.1760-1-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Enable the Mali GPU node on Khadas Edge 2.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
Link: https://lore.kernel.org/r/20240501142241.98554-1-efectn@6tel.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add the proper nodes to activate the USB 3.0 ports on the
Edgeble NCM6A-IO board.
Cc: Jagan Teki <jagan@edgeble.ai>
Signed-off-by: Anand Moon <anand@edgeble.ai>
Link: https://lore.kernel.org/r/20240502094246.4695-2-anand@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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On Edgeble Neural Compute Module add system-power-controller
property to RK806 pmic so that these chips can power off the device.
Cc: Jagan Teki <jagan@edgeble.ai>
Signed-off-by: Anand Moon <anand@edgeble.ai>
Link: https://lore.kernel.org/r/20240502094246.4695-1-anand@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The Radxa ROCK 3C is a development board with the
Rockchip RK3566 SoC. It has the following features:
- 1/2/4GB LPDDR4
- 1x HDMI Type A
- 1x PCIE 2.0 slot
- 1x FAN connector
- 3.5mm jack with mic
- 1GbE RTL8211F Ethernet
- 1x USB 3.0, 3x USB 2.0
- 40-pin expansion header
- MicroSD card/eMMC socket
- 16MB SPI NOR (gd25lq128d)
- AP6256 or AIC8800 WiFi/BT
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240428123618.72170-3-amadeus@jmu.edu.cn
[dropped rk809-sound and not specified pmic sound properties]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The Radxa ROCK 3C is a similar board to the
Radxa ROCK 3A with the Rockchip RK3566 SoC.
Add devicetree binding documentation for it.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240428123618.72170-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The pinctrl instances hsi1, gsactrl, and gsacore need a clock for
register access to work.
Since we haven't implemented the relevant CMUs for the clocks required
by these instances just add empty clocks for now so as to make the DT
pass the validation checks.
Once the clocks are implmented in the gs101 clock driver, these should
be updated then.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240430-samsung-pinctrl-busclock-dts-v2-4-14fc988139dd@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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This bus clock is needed for pinctrl register access to work. Add it.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240430-samsung-pinctrl-busclock-dts-v2-3-14fc988139dd@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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This bus clock is needed for pinctrl register access to work. Add it.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240430-samsung-pinctrl-busclock-dts-v2-2-14fc988139dd@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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This bus clock is needed for pinctrl register access to work. Add it.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240430-samsung-pinctrl-busclock-dts-v2-1-14fc988139dd@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.10
Generic Cleanups/Fixes:
- fixup of generated dtb imx219 overlay file names
- Remove UART baud rate selection in device tree.
- Use exact ranges for FSS.
SoC specific Fixes/Features:
AM625:
- Add USB PHY2 region and usb phy control registers
AM62A
- Add USB PHY2 region and usb phy control registers, Disable USB LPM.
- Add wave-512 video encoder/decoder support
- Enable UHS mode for SD
AM62P:
- Disable ethernet by default
- Add USB support
AM654
- Serdes fixups
- SDHCI fixups.
AM67/j722s:
- Disable ethernet by default
- Add USB support
AM68/J721s2:
- Add main ESM range
- Add support for SDR104
AM69/J784S4:
- Add main ESM range
- Enable support for UHS mode
Board specific fixes/Features:
AM625:
- BeaglePlay: Fixes for wlan mmc-pwrseq and ethernet phy reset
- phyboard-lyra: Add Audio codec, USB-C, increase CAN bit rate and enable
ability to apply overlays
- verdin: GPIO pinctrl fixups, Switch SD carddetect to GPIO, fixup memory
to 2GB, and audio clock, PCIe reset GPIO hog, sleep-moci
- lp-sk: Drop power button
- sk: minor white space cleanup.
AM64
- phyboard-electra: Increase CAN bit rate, enable overlay to enable GPIO fan
AM65:
- iot2050: Add icssg-prueth for PG1
AM67/j722s:
- evm: Enable UHS support for SD card and eMMC support.
AM69/J784s4:
- evm/sk: Fix uart pins and pinctrl macro usage.
* tag 'ti-k3-dt-for-v6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (48 commits)
arm64: dts: ti: Fix csi2-dual-imx219 dtb names
arm64: dts: ti: k3-am625-beagleplay: Fix Ethernet PHY RESET GPIOs
arm64: dts: ti: k3-am625-phyboard-lyra-rdk: Add USB-C
arm64: dts: ti: k3-j784s4: Add main esm address range
arm64: dts: ti: k3-j721s2: Add main esm address range
arm64: dts: ti: k3-am62-verdin-dahlia: support sleep-moci
arm64: dts: ti: k3-am62-verdin: replace sleep-moci hog with regulator
arm64: dts: ti: k3-j722s-evm: Enable UHS support for MMCSD
arm64: dts: ti: k3-j784s4-main: Enable support for UHS mode
arm64: dts: ti: k3-j721s2-main: Enable support for SDR104 speed mode
arm64: dts: ti: k3-am62a: Enable UHS mode support for SD cards
arm64: dts: ti: k3-am65-main: Remove unused properties in sdhci nodes
arm64: dts: ti: k3-am65-main: Fix sdhci node properties
arm64: dts: ti: Enable overlays for the am625-phyboard-lyra
arm64: dts: ti: am64-phyboard-electra: Add overlay to enable a GPIO fan
arm64: dts: ti: k3-am62a-main: Add Wave5 Video Encoder/Decoder Node
arm64: dts: ti: k3-am69-sk: Fix UART pin type and macro type
arm64: dts: ti: k3-j784s4-evm: Fix UART pin type and macro type
arm64: dts: ti: k3-am62a: Disable USB LPM
arm64: dts: ti: k3-am62p: add the USB sub-system
...
Link: https://lore.kernel.org/r/20240501124319.ake5j2oc5pbnn5nb@contour
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
Keystone2 device tree updates for v6.10
Generic Cleanups/Fixes:
- Remove custom ti,system-reboot-controller property
* tag 'ti-keystone-dt-for-v6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
dt-bindings: arm: keystone: Remove ti,system-reboot-controller property
ARM: dts: ti: keystone: k2g: Remove ti,system-reboot-controller property
Link: https://lore.kernel.org/r/20240501124309.3cj5b3gjf3cpimut@outsell
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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into soc/dt
RISC-V Devicetrees for v6.10
Sophgo:
Added sdhci support for cv18xx/duo.
Added clock support for cv18xx.
Added clock for uart/sdhci.
Added spi support for cv18xx.
Added i2c support for cv18xx.
Added reserved memory node for cv1800b/duo.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* tag 'riscv-sophgo-dt-for-v6.10' of https://github.com/sophgo/linux:
riscv: dts: sophgo: add reserved memory node for CV1800B
riscv: dts: sophgo: use real clock for sdhci
riscv: dts: sophgo: cv18xx: Add i2c devices
riscv: dts: sophgo: cv18xx: Add spi devices
riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC
riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC
riscv: dts: sophgo: add sdcard support for milkv duo
Link: https://lore.kernel.org/r/MA0P287MB2822CA2DE757787D6EA3B1F8FE192@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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'/memory' nodes always have a 'reg' property, and therefore should have
a unit-address with just plain hex (i.e. no commas). Fix all the arm64
'/memory' nodes.
It's possible that some bootloader depends on /memory (arm32 ATAG to DT
code does for example). If so, the memory node should be commented with
that requirement.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Chanho Min <chanho.min@lge.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240430191856.874600-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Fix the output filenames of the combined device tree blobs generated by
applying *-csi2-dual-imx219-* overlays on the base dtbs during compile
test.
Fixes: f767eb918096 ("arm64: dts: ti: k3-j721e-sk: Add overlay for IMX219")
Signed-off-by: Jai Luthra <j-luthra@ti.com>
Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Link: https://lore.kernel.org/r/104fbdbc-a3f6-091a-72f4-17d4fa24ad92@ti.com/
Signed-off-by: Nishanth Menon <nm@ti.com>
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Enable ufs & ufs phy nodes for Oriole. Also define the ufs regulator node.
ufs regulator is a stub until full s2mpg11 slave pmic support is added.
The gpio defined is for the BOOTLD0 (gs101) signal connected to
UFS_EN(s2mpg11) gpio enabled voltage rail for UFS.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20240430141445.2688499-4-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Add the ufs controller node and phy node for gs101.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20240430141445.2688499-3-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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This has some configuration bits such as sharability that
are required by UFS.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20240430141445.2688499-2-peter.griffin@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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https://github.com/Broadcom/stblinux into soc/dt
This pull request contains Broadcom ARM64-based SoCs Device Tree updates
for 6.10, please pull the following:
- Rafal moves the "brcm,wp-not-connected" property from the individual
board DTSes to the SoC' DTSI since all boards a designed the same way
* tag 'arm-soc/for-6.10/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: bcmbca: bcm4908: set brcm,wp-not-connected
Link: https://lore.kernel.org/r/20240429213703.2327834-3-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://github.com/Broadcom/stblinux into soc/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 6.10, please pull the following:
- Laurent converts the Raspberry Pi firmware DT binding to YAML, updates
the firmware driver to use the proper 'struct device' reference for
DMA mappings and drops unneeded properties from the DT node and
finishes by removing the duplicate firmware-clocks property to
bcm2835-rpi.dtsi. He also added support for the CAM1 camera interface
regulator.
- Uwe adds a pinctrl-based multiplexing description to allow the use of
I2C0 pins to allow usage between the 40-pin Raspberry Pi header and
the CSI and DSI connectors. He then describes the PCF85063 RTC device
available on the CM4 I/O board making use of that pinctrl-based
muxing.
- Arinc updates the Asus RT-AC3100 and RT-AC88U DTs to have proper LED
colors and function properties, NVMEM MAC addresses and removes
duplicates and unnecessary properties and does a few Device Tree
cleanups.. He then adds support for the Asus RT-AC3200 (BCM4709-based)
and RT-AC3500 routers.
- Jean-Michel adds DT nodes for the CSI Unicam camera interfaces on the
Raspberry Pi 4 / BCM2711 SoCs
- Florian adds support for the Ethernet LEDs on Raspberry Pi 4 B and
Raspberry Pi 4 CM boards.
* tag 'arm-soc/for-6.10/devicetree' of https://github.com/Broadcom/stblinux:
arm: dts: bcm2711: Describe Ethernet LEDs
ARM: dts: BCM5301X: Conform to DTS Coding Style on ASUS RT-AC3100 & AC88U
ARM: dts: BCM5301X: Add DT for ASUS RT-AC5300
ARM: dts: BCM5301X: Add DT for ASUS RT-AC3200
dt-bindings: arm: bcm: add bindings for ASUS RT-AC5300
dt-bindings: arm: bcm: add bindings for ASUS RT-AC3200
ARM: dts: bcm2835: Add Unicam CSI nodes
ARM: dts: BCM5301X: remove earlycon on ASUS RT-AC3100 and ASUS RT-AC88U
ARM: dts: BCM5301X: remove duplicate compatible on ASUS RT-AC3100 & AC88U
ARM: dts: BCM5301X: provide address for SoC MACs on ASUS RT-AC3100 & AC88U
ARM: dts: BCM5301X: use color and function on ASUS RT-AC3100 and RT-AC88U
ARM: dts: bcm2711-rpi-4-b: Add CAM1 regulator
ARM: dts: bcm2711-rpi-cm4-io: Add RTC on I2C0
ARM: dts: bcm2711-rpi: Add pinctrl-based multiplexing for I2C0
ARM: dts: bcm2835-rpi: Move duplicate firmware-clocks to bcm2835-rpi.dtsi
ARM: dts: bcm283x: Drop unneeded properties in the bcm2835-firmware node
firmware: raspberrypi: Use correct device for DMA mappings
dt-bindings: arm: bcm: raspberrypi,bcm2835-firmware: Add gpio child node
Link: https://lore.kernel.org/r/20240429213703.2327834-2-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The RESET GPIO pinmux should be part of MDIO bus node
so that they can be in the right state before the PHY
can be probed via MDIO bus scan.
The GPIO pin should be setup with PIN_INPUT so that
input circuitry is enabled in case software wants to
check pin status. Without this, incorrect status is shown
in /sys/kernel/debug/gpio.
Add GPIO reset for the Gigabit Ethernet PHY. As per
RTL8211F datasheet, reset assert width is 10ms and
PHY registers can be access accessed after 50ms of
reset deassert.
Fixes: f5a731f0787f ("arm64: dts: ti: Add k3-am625-beagleplay")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240305-b4-for-v6-9-am65-beagleplay-ethernet-reset-v2-1-2bf463a7bf13@kernel.org
Signed-off-by: Nishanth Menon <nm@ti.com>
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The USB-C PD manages plug orientation, power delivery, and our endpoint
for the USB interface. Add this node and include its endpoint.
Configure USB0 for role-switching and wire it to our USB-C PD endpoint.
Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20240425152558.485763-1-ggiordano@phytec.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Main ESM address change was missing for J784S4 SOC,
So adding main ESM address mapping.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20240424075423.1229127-3-u-kumar1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Main ESM address change was missing for J721S2 SOC,
So adding main ESM address mapping.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20240424075423.1229127-2-u-kumar1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Previously, we had the sleep-moci pin set to always on. However, the
Dahlia carrier board supports disabling the sleep-moci when the system
is suspended to power down peripherals that support it. This reduces
overall power consumption. This commit adds support for this feature by
disabling the reg_force_sleep_moci regulator and adding a new regulator
for the USB hub that can be turned off when the system is suspended.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20240301084901.16656-3-eichest@gmail.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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The Verdin family has a signal called sleep-moci which can be used to
turn off peripherals on the carrier board when the SoM goes into
suspend. So far we have hogged this signal, which means the peripherals
are always on and it is not possible to add peripherals that depend on
the sleep-moci to be on. With this change, we replace the hog with a
regulator so that peripherals can add their own regulators that use the
same gpio. Carrier boards that allow peripherals to be powered off in
suspend can disable this regulator and implement their own regulator to
control the sleep-moci.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20240301084901.16656-2-eichest@gmail.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Enable the UHS modes for MMCSD in J722S by removing the
no-1-8-v property.
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Reviewed-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240422131840.34642-1-b-kapoor@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Remove sdhci-caps-mask to enable support for SDR104 speed mode for
SD card and remove no-1-8-v property so that SD card can work in
any UHS-1 high speed mode it can support.
Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240423151732.3541894-6-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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According to TRM for J721S2, SDR104 speed mode is supported by the SoC
but its capabilities were masked in device tree. Remove sdhci-caps-mask
to enable support for SDR104 speed mode for SD card in J721S2 SoC.
[+] Refer to : section 12.3.6.1.1 MMCSD Features, in J721S2 TRM
- https://www.ti.com/lit/zip/spruj28
Fixes: b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC")
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20240423151732.3541894-5-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Hook up required IO voltage regulators and drop no-1-8-v to support UHS
modes on SD cards.
Fixes: 5fc6b1b62639 ("arm64: dts: ti: Introduce AM62A7 family of SoCs")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240423151732.3541894-4-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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On AM65x platform, sdhci0 is for eMMC and sdhci1 is for SD.
Remove the properties that are not applicable for each device.
Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values")
Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1")
Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240423151732.3541894-3-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Update otap-del-sel properties as per datasheet [0].
Add missing clkbuf-sel and itap-del-sel values also as per
datasheet [0].
Move clkbuf-sel and ti,trm-icp above the otap-del-sel properties
so the sdhci nodes could be more uniform across platforms.
[0] https://www.ti.com/lit/ds/symlink/am6548.pdf
Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values")
Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1")
Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240423151732.3541894-2-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Add symbols when building the am625-phyboard-lyra-rdk DTB so
overlays can be applied.
Fixes: d8280f30a9cd ("arm64: dts: ti: am62-phyboard-lyra: Add overlay to enable a GPIO fan")
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20240419193552.3090343-1-nmorrisson@phytec.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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The phyBOARD-Electra has a GPIO fan header. This overlay enables the fan
header and sets the fan to turn on at 65C.
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20240419193114.3090084-1-nmorrisson@phytec.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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This patch adds support for the Wave521cl on the AM62A-SK.
Signed-off-by: Brandon Brnich <b-brnich@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Link: https://lore.kernel.org/r/20240415204659.798548-1-b-brnich@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Along fixing wkup UART RTS and TX pins as OUTPUT instead of INPUT
updating J784S4 macro for pin mux instead of J721S2.
Fixes: 45299dd1991b ("arm64: dts: ti: k3-am69-sk: Add mcu and wakeup uarts")
Fixes: 08ae12b63750 ("arm64: dts: ti: k3-am69-sk: Enable wakeup_i2c0 and eeprom")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20240415095605.3547933-3-u-kumar1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Along fixing wkup UART TX pin as OUTPUT instead of INPUT,
updating J784S4 macro for pin mux instead of J721S2.
Fixes: 5dfbd1debc8c ("arm64: dts: ti: k3-j784s4-evm: Enable wakeup_i2c0 and eeprom")
Fixes: 6fa5d37a2f34 ("arm64: dts: ti: k3-j784s4-evm: Add mcu and wakeup uarts")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20240415095605.3547933-2-u-kumar1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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As per AM62A TRM [1] USB Link Power Management (LPM)
feature is not supported. Disable it else it may
cause enumeration failure on some devices.
> 4.9.2.1 USB2SS Unsupported Features
> The following features are not supported on this family of devices:
> ...
> - USB 2.0 ECN: Link Power Management (LPM)
> ...
[1] - https://www.ti.com/lit/pdf/spruj16
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Link: https://lore.kernel.org/r/20240412-for-v6-10-am62-usb-typec-dt-v7-3-93b827adf97e@kernel.org
Signed-off-by: Nishanth Menon <nm@ti.com>
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There are two USB instances available on the am62p5 starter kit. Include
and enable them for use on the board.
USB LPM feature is kept disabled as it is not supported.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240412-for-v6-10-am62-usb-typec-dt-v7-2-93b827adf97e@kernel.org
Signed-off-by: Nishanth Menon <nm@ti.com>
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Exposing the entire CTRL_MMR space to syscon is not a good idea.
Add sub-nodes for USB0_PHY_CTRL and USB1_PHY_CTRL and use them
in the USB0/USB1 nodes.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240412-for-v6-10-am62-usb-typec-dt-v7-1-93b827adf97e@kernel.org
Signed-off-by: Nishanth Menon <nm@ti.com>
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Add PHY2 register space to USB wrapper node. This is required
to deal with Errata i2409.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20240412-for-v6-9-am62-usb-errata-dt-v1-1-ef0d79920f75@kernel.org
Closes: https://lore.kernel.org/all/20240408095200.GA14655@francesco-nb/
Signed-off-by: Nishanth Menon <nm@ti.com>
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