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2022-08-25drm/amd/display: change to runtime initialization for reg offsets for DCN32Aurabindo Pillai2-296/+1434
2022-08-25drm/amd/display: Change AUX NACK behaviorIlya Bakoulin1-7/+5
2022-08-25drm/amd/display: HDMI ODM Combine Policy CorrectionSaaem Rizvi3-8/+1
2022-08-25drm/amd/display: fix odm 2:1 policy not being applied consistently in 4k144 m...Samson Tam1-0/+5
2022-08-25drm/amd/display: do not change pipe split policy for RV2Derek Lai4-29/+31
2022-08-25drm/amd/display: 3.2.199Aric Cyr1-1/+1
2022-08-25drm/amd/display: [FW Promotion] Release 0.0.130.0Anthony Koo1-2/+14
2022-08-25drm/amdgpu: skip set_topology_info for VFVignesh Chander1-0/+3
2022-08-25drm/amdgpu: add sdma instance check for gfx11 CGCGTim Huang1-6/+12
2022-08-22drm/amd/display: remove unneeded defines from bios parserTales Aparecida1-19/+0
2022-08-22drm/amd/display: enable PCON support for dcn314Roman Li1-0/+1
2022-08-22drm/amdgpu: enable NBIO IP v7.7.0 Clock GatingTim Huang1-4/+3
2022-08-22drm/amdgpu: add NBIO IP v7.7.0 Clock Gating supportTim Huang1-0/+78
2022-08-22drm/amdgpu: add TX_POWER_CTRL_1 macro definitions for NBIO IP v7.7.0Tim Huang2-0/+15
2022-08-22drm/radeon: add a force flush to delay work when radeonZhenneng Li1-0/+3
2022-08-22drm/amd/display: remove unused headerMagali Lemes1-34/+0
2022-08-22drm/amd/display: Include missing headerMaíra Canal2-10/+3
2022-08-22drm/amd/display: remove unneeded semicolonYang Li1-1/+1
2022-08-22drm/amd/display: fix i386 frame size warningHamza Mahfooz1-232/+63
2022-08-22drm/amdgpu: Remove the additional kfd pre reset call for sriovshaoyunl1-2/+0
2022-08-22drm/amdgpu: Check num_gfx_rings for gfx v9_0 rb setup.Candice Li1-1/+2
2022-08-22drm/amdgpu: fix hive reference leak when adding xgmi deviceYiPeng Chai1-0/+2
2022-08-22drm/amdgpu: Move psp_xgmi_terminate call from amdgpu_xgmi_remove_device to ps...YiPeng Chai2-1/+4
2022-08-22drm/amdgpu: enable GFXOFF allow control for GC IP v11.0.1Tim Huang1-2/+1
2022-08-17drm/amdgpu: Document gfx_off members of struct amdgpu_gfxAndré Almeida1-6/+6
2022-08-17Documentation/gpu: Document GFXOFF's count and residencyAndré Almeida1-1/+17
2022-08-17drm/amd/pm: Implement GFXOFF's entry count and residency for vangoghAndré Almeida3-2/+84
2022-08-17drm/amd: Add detailed GFXOFF stats to debugfsAndré Almeida9-0/+321
2022-08-17drm/amd/display: fix minor codestyle problemsTales Aparecida1-6/+4
2022-08-17drm/amd/display: fix overflow on MIN_I64 definitionDavid Gow1-3/+3
2022-08-17drm/amd/display: Unneeded semicolonmin tang1-1/+1
2022-08-17drm/amd/display: Fix comment typomin tang1-1/+1
2022-08-17drm/amd/display: Remove unused codeRodrigo Siqueira2-2168/+0
2022-08-17drm/amdgpu: use sjt mec fw on aldebaran for sriovshaoyunl1-2/+12
2022-08-17drm/amd/display: include soc._clock_tmp[] into DC's scratch regionHamza Mahfooz5-77/+91
2022-08-17drm/amd/display: implement DSC pass-through supportHamza Mahfooz1-4/+41
2022-08-17drm/amd/display: consider DSC pass-through during mode validationHamza Mahfooz1-6/+78
2022-08-17drm/dp_mst: add passthrough_aux to struct drm_dp_mst_portHamza Mahfooz3-1/+7
2022-08-17Documentation/gpu/amdgpu/amdgpu_dm: add DM docs for pixel blend modeMelissa Wen2-0/+100
2022-08-17drm/amd/display: add doc entries for MPC blending configurationMelissa Wen2-15/+78
2022-08-17Documentation/amdgpu/display: add DC color caps infoMelissa Wen4-13/+2997
2022-08-17Documentation/amdgpu_dm: Add DM color correction documentationMelissa Wen2-28/+90
2022-08-17drm/amd/display: Document some of the DML structsRodrigo Siqueira1-0/+34
2022-08-17drm/amd/display: Expand documentation for timingRodrigo Siqueira2-0/+100
2022-08-17drm/amd/display: Document pipe split policyRodrigo Siqueira1-0/+35
2022-08-17drm/amd/display: Add some extra kernel doc to amdgpu_dmRodrigo Siqueira2-8/+54
2022-08-17drm/amd/display: Add basic kernel doc to CRC code under DCRodrigo Siqueira4-14/+46
2022-08-17drm/amd/display: Add documentation to some of the cursor structRodrigo Siqueira1-7/+55
2022-08-17drm/amdgpu: reduce reset timeVictor Zhao4-3/+11
2022-08-17drm/amdgpu: revert context to stop engine before mode2 resetVictor Zhao4-0/+40
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