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2019-09-03net/mlx5: DR, Add required FW steering functionalityAlex Vesker1-0/+93
SW steering is capable of doing many steering functionalities but there are still some functionalities which are not exposed to upper layers and therefore performed by the FW. This is the support for recalculating checksum using a hairpin QP. The recalculation is required after a modify TTL action which skips the needed CS calculation in HW. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose steering rule functionalityAlex Vesker1-0/+1243
Rules are the actual objects that tie matchers, header values and actions. Each rule belongs to a matcher, which can hold multiple rules sharing the same mask. Each rule is a specific set of values and actions. When a packet reaches a matcher it is being matched against the matcher`s rules. In case of a match over a rule its actions will be executed. Each rule object contains a set of STEs, where each STE is a definition of match values and actions defined by the rule. This file handles the rule operations and processing. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose steering action functionalityAlex Vesker1-0/+1588
On rule creation a set of actions can be provided, the actions describe what to do with the packet in case of a match. It is possible to provide a set of actions which will be done by order. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose steering matcher functionalityAlex Vesker1-0/+770
Matcher defines which packets fields are matched when a packet arrives. Matcher is a part of a table and can contain one or more rules. Where rule defines specific values of the matcher's mask definition. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose steering table functionalityAlex Vesker1-0/+294
Tables are objects which are used for storing matchers, each table belongs to a domain and defined by the domain type. When a packet reaches the table it is being processed by each of its matchers until a successful match. Tables can hold multiple matchers ordered by matcher priority. Each table has a level. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose steering domain functionalityAlex Vesker1-0/+395
Domain is the frame for all of the dr (direct rule) objects. There are different domain types which also affect the object under that domain. Each domain can hold multiple tables which can hold multiple matchers and so on, this means that all of the dr (direct rule) objects exist under a specific domain. The domain object also holds the resources needed for other objects such as memory management and communication with the device. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Add Steering entry (STE) utilitiesAlex Vesker2-0/+2406
Steering Entry (STE) object is the basic building block of the steering map. There are several types of STEs. Each rule can be constructed of multiple STEs. Each STE dictates which fields of the packet's header are being matched as well as the information about the next step in map (hit and miss pointers). The hardware gets a packet and tries to match it against the STEs, going to either the hit pointer or the miss pointer. This file handles the STE operations. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Expose an internal API to issue RDMA operationsAlex Vesker1-0/+976
Inserting or deleting a rule is done by RDMA read/write operation to SW ICM device memory. This file provides the support for executing these operations. It includes allocating the needed resources and providing an API for writing steering entries to the memory. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Mark Bloch <markb@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, ICM pool memory allocatorAlex Vesker1-0/+570
ICM device memory is used for writing steering rules (STEs) to the NIC. An ICM memory pool allocator was implemented to manage the required memory. The pool consists of buckets, a bucket per chunk size. Once a bucket is empty we will cut a row of memory from the latest allocated MR, if the MR size is not sufficient we will allocate a new MR. HW design requires that chunks memory address should be aligned to the chunk size, this is the reason for managing the MR with row size that insures memory alignment. Current design is greedy in memory but provides quick allocation times in steady state. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Add direct rule command utilitiesAlex Vesker2-0/+1084
Add direct rule command utilities which consists of all the FW commands that are executed to provide the SW steering functionality. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: DR, Add the internal direct rule types definitionsAlex Vesker1-0/+1060
Add the internal header file that contains various types definition that will be used in coming patches as well as the internal functions decelerations. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-03net/mlx5: Add flow steering actions to fs_cmd shim layerMaor Gottlieb13-110/+289
Add flow steering actions: modify header and packet reformat to the fs_cmd shim layer. This allows each namespace to define possibly different functionality for alloc/dealloc action commands. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-02Merge branch 'mlx5-next' of ↵Saeed Mahameed14-251/+497
git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux Merge mlx5-next patches needed for upcoming mlx5 software steering. 1) Alex adds HW bits and definitions required for SW steering 2) Ariel moves device memory management to mlx5_core (From mlx5_ib) 3) Maor, Cleanups and fixups for eswitch mode and RoCE 4) Mark, Set only stag for match untagged packets Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-02net/mlx5: Set only stag for match untagged packetsMark Bloch1-1/+4
cvlan_tag enabled in match criteria and disabled in match value means both S & C tags don't exist (untagged of both). Signed-off-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-02net/mlx5: Add stub for mlx5_eswitch_modeMaor Gottlieb1-1/+7
Return MLX5_ESWITCH_NONE when CONFIG_MLX5_ESWITCH is not selected. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-02net/mlx5: Avoid disabling RoCE when uninitializedMaor Gottlieb1-3/+5
Move the check if RoCE steering is initialized to the disable RoCE function, it will ensure that we disable RoCE only if we succeeded in enabling it before. Fixes: 80f09dfc237f ("net/mlx5: Eswitch, enable RoCE loopback traffic") Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-02net/mlx5: Add HW bits and definitions required for SW steeringAlex Vesker2-37/+205
Add the required Software Steering hardware definitions and bits to mlx5_ifc. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Yevgeny Klitenik <kliten@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-02net/mlx5: Move device memory management to mlx5_coreAriel Levkovich9-209/+276
Move the device memory allocation and deallocation commands SW ICM memory to mlx5_core to expose this API for all mlx5_core users. This comes as preparation for supporting SW steering in kernel where it will be required to allocate and register device memory for direct rule insertion. In addition, an API to register this device memory for future remote access operations is introduced using the create_mkey commands. Signed-off-by: Ariel Levkovich <lariel@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
2019-09-01Merge branch 'net-dsa-mv88e6xxx-centralize-SERDES-IRQ-handling'David S. Miller5-351/+315
Vivien Didelot says: ==================== net: dsa: mv88e6xxx: centralize SERDES IRQ handling Following Marek's work on the abstraction of the SERDES lanes mapping, this series trades the .serdes_irq_setup and .serdes_irq_free callbacks for new .serdes_irq_mapping, .serdes_irq_enable and .serdes_irq_status operations. This has the benefit to limit the various SERDES implementations to simple register accesses only; centralize the IRQ handling and mutex locking logic; as well as reducing boilerplate in the driver. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: dsa: mv88e6xxx: centralize SERDES IRQ handlingVivien Didelot4-175/+69
The .serdes_irq_setup are all following the same steps: get the SERDES lane, get the IRQ mapping, request the IRQ, then enable it. So do the .serdes_irq_free implementations: get the SERDES lane, disable the IRQ, then free it. This patch removes these operations in favor of generic functions. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: dsa: mv88e6xxx: introduce .serdes_irq_statusVivien Didelot4-21/+64
Introduce a new .serdes_irq_status operation to prepare the abstraction of IRQ thread from the SERDES IRQ setup code. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: dsa: mv88e6xxx: introduce .serdes_irq_enableVivien Didelot5-50/+66
Introduce a new .serdes_irq_enable operation to prepare the abstraction of IRQ enabling from the SERDES IRQ setup code. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: dsa: mv88e6xxx: pass lane to .serdes_powerVivien Didelot5-27/+44
Now the first step of all .serdes_power implementations is getting the lane mapping. Since we have an operation for that, call it in the wrapper and pass the lane down to the .serdes_power operation. This also allows to avoid querying the SERDES lane twice in mv88e6xxx_port_set_cmode. At the same time provide mv88e6xxx_serdes_power_{up,down} helpers and prefer up/down instead of on/off as in the documentation. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: dsa: mv88e6xxx: merge mv88e6352_serdes_power_setVivien Didelot1-14/+4
The mv88e6352_serdes_power_set helper is only used at one place, in mv88e6352_serdes_power. Keep it simple and merge the two functions together. Use mv88e6xxx_serdes_get_lane instead of mv88e6352_port_has_serdes to avoid moving code. No functional changes. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: dsa: mv88e6xxx: implement mv88e6352_serdes_get_laneVivien Didelot3-1/+15
Even though 88E6352 has no dedicated lane for SERDES interfaces, it uses a similar code as the other .serdes_get_lane implementations to check the port's CMODE and ensure that SERDES operations are doable. For consistency, implement mv88e6352_serdes_get_lane for the 88E6352 and similar switches which simply returns an unused 0xff lane address. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: dsa: mv88e6xxx: simplify .serdes_get_laneVivien Didelot4-122/+74
Because the mapping between a SERDES interface and its lane is static, we don't need to stick with negative error codes actually and we can simply return 0 if there is no lane, just like the IRQ mapping. This way we can keep a simple and intuitive API using unsigned lane numbers while simplifying the implementations with single return statements. Last but not least, fix the reverse chrismas tree in mv88e6390x_serdes_get_lane. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: dsa: mv88e6xxx: introduce .serdes_irq_mappingVivien Didelot4-6/+45
Introduce a new .serdes_irq_mapping operation to prepare the abstraction of IRQ mapping from the SERDES IRQ setup code. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: dsa: mv88e6xxx: fix SERDES IRQ mappingVivien Didelot2-11/+5
The current mv88e6xxx SERDES code checks for negative error code from irq_find_mapping, while this function returns an unsigned integer. This patch removes this dead code and simply returns 0 is no IRQ is found. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: dsa: mv88e6xxx: check errors in mv88e6352_serdes_irq_linkVivien Didelot1-2/+7
The mv88e6352_serdes_irq_link helper is not checking for any error that may occur during hardware accesses. Worst, the "up" boolean is set from the potentially unused "status" variable, if read operations failed. As done in mv88e6390_serdes_irq_link_sgmii, return right away and do not call dsa_port_phylink_mac_change if an error occurred. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: hns3: remove set but not used variable 'qos'YueHaibing1-2/+1
Fixes gcc '-Wunused-but-set-variable' warning: drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c: In function 'hclge_restore_vlan_table': drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c:8016:18: warning: variable 'qos' set but not used [-Wunused-but-set-variable] Reported-by: Hulk Robot <hulkci@huawei.com> Fixes: 70a214903da9 ("net: hns3: reduce the parameters of some functions") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: hns3: remove redundant assignment to pointer reg_infoColin Ian King1-1/+1
Pointer reg_info is being initialized with a value that is never read and is being re-assigned a little later on. The assignment is redundant and hence can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01netlabel: remove redundant assignment to pointer iterColin Ian King1-1/+1
Pointer iter is being initialized with a value that is never read and is being re-assigned a little later on. The assignment is redundant and hence can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Paul Moore <paul@paul-moore.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01r8169: don't set bit RxVlan on RTL8125Heiner Kallweit1-2/+4
RTL8125 uses a different register for VLAN offloading config, therefore don't set bit RxVlan. Fixes: f1bce4ad2f1c ("r8169: add support for RTL8125") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net/ncsi: add response handlers for PLDM over NC-SIBen Wei2-2/+14
This patch adds handlers for PLDM over NC-SI command response. This enables NC-SI driver recognizes the packet type so the responses don't get dropped as unknown packet type. PLDM over NC-SI are not handled in kernel driver for now, but can be passed back to user space via Netlink for further handling. Signed-off-by: Ben Wei <benwei@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01Merge branch 'Minor-cleanup-in-devlink'David S. Miller2-20/+26
Parav Pandit says: ==================== Minor cleanup in devlink Two minor cleanup in devlink. Patch-1 Explicitly defines devlink port index as unsigned int Patch-2 Uses switch-case to handle different port flavours attributes ==================== Acked-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01devlink: Use switch-case instead of if-elseParav Pandit1-17/+22
Make core more readable with switch-case for various port flavours. Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Parav Pandit <parav@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01devlink: Make port index data type as unsigned intParav Pandit2-3/+4
Devlink port index attribute is returned to users as u32 through netlink response. Change index data type from 'unsigned' to 'unsigned int' to avoid below checkpatch.pl warning. WARNING: Prefer 'unsigned int' to bare use of 'unsigned' 81: FILE: include/net/devlink.h:81: + unsigned index; Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Parav Pandit <parav@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01Merge branch 'net-tls-add-socket-diag'David S. Miller9-13/+188
Davide Caratti says: ==================== net: tls: add socket diag The current kernel does not provide any diagnostic tool, except getsockopt(TCP_ULP), to know more about TCP sockets that have an upper layer protocol (ULP) on top of them. This series extends the set of information exported by INET_DIAG_INFO, to include data that are specific to the ULP (and that might be meaningful for debug/testing purposes). patch 1/3 ensures that the control plane reads/updates ULP specific data using RCU. patch 2/3 extends INET_DIAG_INFO and allows knowing the ULP name for each TCP socket that has done setsockopt(TCP_ULP) successfully. patch 3/3 extends kTLS to let programs like 'ss' know the protocol version and the cipher in use. Changes since v2: - remove unneeded #ifdef and fix reverse christmas tree in tls_get_info(), thanks to Jakub Kicinski Changes since v1: - don't worry about grace period when accessing ulp_ops, thanks to Jakub Kicinski and Eric Dumazet - use rcu_dereference() to access ULP data in tls get_info(), and test against NULL value, thanks to Jakub Kicinski - move RCU protected section inside tls get_info(), thanks to Jakub Kicinski Changes since RFC: - some coding style fixes, thanks to Jakub Kicinski - add X_UNSPEC as lowest value of uAPI enums, thanks to Jakub Kicinski - fix assignment of struct nlattr *start, thanks to Jakub Kicinski - let tls dump RXCONF and TXCONF, suggested by Jakub Kicinski - don't dump anything if TLS version or cipher are 0 (but still return a constant size in get_aux_size()), thanks to Boris Pismenny - constify first argument of get_info() and get_size() - use RCU to access access ulp_ops, like it's done for ca_ops - add patch 1/3, from Jakub Kicinski ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net: tls: export protocol version, cipher, tx_conf/rx_conf to socket diagDavide Caratti4-0/+97
When an application configures kernel TLS on top of a TCP socket, it's now possible for inet_diag_handler() to collect information regarding the protocol version, the cipher type and TX / RX configuration, in case INET_DIAG_INFO is requested. Signed-off-by: Davide Caratti <dcaratti@redhat.com> Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01tcp: ulp: add functions to dump ulp-specific informationDavide Caratti3-1/+62
currently, only getsockopt(TCP_ULP) can be invoked to know if a ULP is on top of a TCP socket. Extend idiag_get_aux() and idiag_get_aux_size(), introduced by commit b37e88407c1d ("inet_diag: allow protocols to provide additional data"), to report the ULP name and other information that can be made available by the ULP through optional functions. Users having CAP_NET_ADMIN privileges will then be able to retrieve this information through inet_diag_handler, if they specify INET_DIAG_INFO in the request. Signed-off-by: Davide Caratti <dcaratti@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-09-01net/tls: use RCU protection on icsk->icsk_ulp_dataJakub Kicinski5-12/+29
We need to make sure context does not get freed while diag code is interrogating it. Free struct tls_context with kfree_rcu(). We add the __rcu annotation directly in icsk, and cast it away in the datapath accessor. Presumably all ULPs will do a similar thing. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-31Merge branch 'qed-Enhancements'David S. Miller8-0/+338
Sudarsana Reddy Kalluru says: ==================== qed*: Enhancements. The patch series adds couple of enhancements to qed/qede drivers. - Support for dumping the config id attributes via ethtool -w/W. - Support for dumping the GRC data of required memory regions using ethtool -w/W interfaces. Patch (1) adds driver APIs for reading the config id attributes. Patch (2) adds ethtool support for dumping the config id attributes. Patch (3) adds support for configuring the GRC dump config flags. Patch (4) adds ethtool support for dumping the grc dump. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-31qede: Add support for dumping the grc data.Sudarsana Reddy Kalluru2-2/+28
This patch adds driver support for configuring grc dump config flags, and dumping the grc data via ethtool get/set-dump interfaces. Signed-off-by: Sudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-31qed: Add APIs for configuring grc dump config flags.Sudarsana Reddy Kalluru4-0/+127
The patch adds driver support for configuring the grc dump config flags. Signed-off-by: Sudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-31qede: Add support for reading the config id attributes.Sudarsana Reddy Kalluru2-0/+103
Add driver support for dumping the config id attributes via ethtool dump interfaces. Signed-off-by: Sudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-31qed: Add APIs for reading config id attributes.Sudarsana Reddy Kalluru4-0/+82
The patch adds driver support for reading the config id attributes from NVM flash partition. Signed-off-by: Sudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: Ariel Elior <aelior@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-31Merge branch 'Dynamic-toggling-of-vlan_filtering-for-SJA1105-DSA'David S. Miller2-20/+84
Vladimir Oltean says: ==================== Dynamic toggling of vlan_filtering for SJA1105 DSA This patchset addresses a limitation in dsa_8021q where this sequence of commands was causing the switch to stop forwarding traffic: ip link add name br0 type bridge vlan_filtering 0 ip link set dev swp2 master br0 echo 1 > /sys/class/net/br0/bridge/vlan_filtering echo 0 > /sys/class/net/br0/bridge/vlan_filtering The issue has to do with the VLAN table manipulations that dsa_8021q does without notifying the bridge layer. The solution is to always restore the VLANs that the bridge knows about, when disabling tagging. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-31net: dsa: tag_8021q: Restore bridge VLANs when enabling vlan_filteringVladimir Oltean1-20/+82
The bridge core assumes that enabling/disabling vlan_filtering will translate into the simple toggling of a flag for switchdev drivers. That is clearly not the case for sja1105, which alters the VLAN table and the pvids in order to obtain port separation in standalone mode. There are 2 parts to the issue. First, tag_8021q changes the pvid to a unique per-port rx_vid for frame identification. But we need to disable tag_8021q when vlan_filtering kicks in, and at that point, the VLAN configured as pvid will have to be removed from the filtering table of the ports. With an invalid pvid, the ports will drop all traffic. Since the bridge will not call any vlan operation through switchdev after enabling vlan_filtering, we need to ensure we're in a functional state ourselves. Hence read the pvid that the bridge is aware of, and program that into our ports. Secondly, tag_8021q uses the 1024-3071 range privately in vlan_filtering=0 mode. Had the user installed one of these VLANs during a previous vlan_filtering=1 session, then upon the next tag_8021q cleanup for vlan_filtering to kick in again, VLANs in that range will get deleted unconditionally, hence breaking user expectation. So when deleting the VLANs, check if the bridge had knowledge about them, and if it did, re-apply the settings. Wrap this logic inside a dsa_8021q_vid_apply helper function to reduce code duplication. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-31net: bridge: Populate the pvid flag in br_vlan_get_infoVladimir Oltean1-0/+2
Currently this simplified code snippet fails: br_vlan_get_pvid(netdev, &pvid); br_vlan_get_info(netdev, pvid, &vinfo); ASSERT(!(vinfo.flags & BRIDGE_VLAN_INFO_PVID)); It is intuitive that the pvid of a netdevice should have the BRIDGE_VLAN_INFO_PVID flag set. However I can't seem to pinpoint a commit where this behavior was introduced. It seems like it's been like that since forever. At a first glance it would make more sense to just handle the BRIDGE_VLAN_INFO_PVID flag in __vlan_add_flags. However, as Nikolay explains: There are a few reasons why we don't do it, most importantly because we need to have only one visible pvid at any single time, even if it's stale - it must be just one. Right now that rule will not be violated by this change, but people will try using this flag and could see two pvids simultaneously. You can see that the pvid code is even using memory barriers to propagate the new value faster and everywhere the pvid is read only once. That is the reason the flag is set dynamically when dumping entries, too. A second (weaker) argument against would be given the above we don't want another way to do the same thing, specifically if it can provide us with two pvids (e.g. if walking the vlan list) or if it can provide us with a pvid different from the one set in the vg. [Obviously, I'm talking about RCU pvid/vlan use cases similar to the dumps. The locked cases are fine. I would like to avoid explaining why this shouldn't be relied upon without locking] So instead of introducing the above change and making sure of the pvid uniqueness under RCU, simply dynamically populate the pvid flag in br_vlan_get_info(). Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Acked-by: Nikolay Aleksandrov <nikolay@cumulusnetworks.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-31Merge tag 'batadv-next-for-davem-20190830' of ↵David S. Miller1-0/+1
git://git.open-mesh.org/linux-merge Simon Wunderlich says: ==================== This maintenance patchset includes the following patches: - Add Sven to the MAINTAINERS file, by Simon Wunderlich ==================== Signed-off-by: David S. Miller <davem@davemloft.net>