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2020-01-12drm: msm: Quiet down plane errors in atomic_checkJohn Stultz1-6/+6
With the db845c running AOSP, I see the following error on every frame on the home screen: [drm:dpu_plane_atomic_check:915] [dpu error]plane33 invalid src 2880x1620+0+470 line:2560 This is due to the error paths in atomic_check using DPU_ERROR_PLANE(), and the drm_hwcomposer using atomic_check to decide how to composite the frame (thus it expects to see atomic_check to fail). In order to avoid spamming the logs, this patch converts the DPU_ERROR_PLANE() calls to DPU_DEBUG_PLANE() calls in atomic_check. Cc: Todd Kjos <tkjos@google.com> Cc: Alistair Delva <adelva@google.com> Cc: Amit Pundir <amit.pundir@linaro.org> Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-07drm/msm: update LANE_CTRL register value from default valueHarigovindan P1-3/+5
LANE_CTRL register in latest version of DSI controller (v2.2) has additional functionality introduced to enable/disable HS signalling with default value set to enabled. To accommodate this change, LANE_CTRL register should be read and bit wise ORed to enable non continuous clock mode. Without this change, if register is written directly, HS signalling will be disabled resulting in black screen. Changes in v1: -Update LANE_CTRL register value Changes in v2: -Changing commit message accordingly. Signed-off-by: Harigovindan P <harigovi@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-07drm/msm: add DSI support for sc7180Harigovindan P2-0/+22
Add support for v2.4.1 DSI block in the sc7180 SoC. Changes in v1: -Modify commit text to indicate DSI version and SOC detail(Jeffrey Hugo). -Splitting visionox panel driver code out into a different patch(set), since panel drivers are merged into drm-next via a different tree(Rob Clark). Changes in v2: -Update commit text accordingly(Matthias Kaehlcke). Signed-off-by: Harigovindan P <harigovi@codeaurora.org> [cleanup subject / commit message] Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-04drm/msm/dsi: split clk rate setting and enableRob Clark4-10/+34
Decouple enable and rate setting. Prep work to handle bootloader enabled display. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
2020-01-03drm/msm: use BUG_ON macro for debugging.Wambui Karuga1-4/+1
As the if statement only checks for the value of the offset_name variable, it can be replaced by the more conscise BUG_ON macro for error reporting. Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/adreno: Do not print error on "qcom, gpu-pwrlevels" absenceFabio Estevam1-1/+1
Booting the adreno driver on a imx53 board leads to the following error message: adreno 30000000.gpu: [drm:adreno_gpu_init] *ERROR* Could not find the GPU powerlevels As the "qcom,gpu-pwrlevels" property is optional and never present on i.MX5, turn the message into debug level instead. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/dpu: Remove unneeded semicolon in dpu_encoder.czhengbin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:2260:3-4: Unneeded semicolon Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/dpu: Remove unneeded semicolon in dpu_plane.czhengbin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c:741:2-3: Unneeded semicolon Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/mdp5: Remove unneeded semicolonzhengbin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c:905:2-3: Unneeded semicolon Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/hdmi: Remove unneeded semicolonzhengbin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/msm/hdmi/hdmi_connector.c:104:3-4: Unneeded semicolon Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm: msm: mdp4: Adjust indentation in mdp4_dsi_encoder_enableNathan Chancellor1-1/+1
Clang warns: ../drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c:124:3: warning: misleading indentation; statement is not part of the previous 'if' [-Wmisleading-indentation] mdp4_crtc_set_config(encoder->crtc, ^ ../drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c:121:2: note: previous statement is here if (mdp4_dsi_encoder->enabled) ^ This warning occurs because there is a space after the tab on this line. Remove it so that the indentation is consistent with the Linux kernel coding style and clang no longer warns. Fixes: 776638e73a19 ("drm/msm/dsi: Add a mdp4 encoder for DSI") Link: https://github.com/ClangBuiltLinux/linux/issues/792 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/dpu: Remove unnecessary NULL checksDrew Davenport2-96/+17
The dpu_encoder_phys * argument passed to these functions will never be NULL so don't check. Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/dpu: Remove unreachable codeDrew Davenport1-2/+0
The return statement follows another return statement, so will never be reached. Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/dpu: Remove unnecessary NULL checkDrew Davenport1-95/+60
dpu_encoder_virt.phys_encs[0:num_phys_encs-1] will not be NULL so don't check. Also fix multiline strings that caused checkpatch warning. Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/dpu: Remove unnecessary NULL checksDrew Davenport1-10/+3
dpu_crtc_mixer.hw_lm will never be NULL, so don't check. Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/dpu: Remove unnecessary NULL checksDrew Davenport1-4/+2
dpu_crtc_mixer.lm_ctl will never be NULL, so don't bother checking Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/dpu: Remove unnecessary NULL checksDrew Davenport3-17/+13
dpu_hw_ctl* is checked for NULL when passed as an argument to several functions. It will never be NULL, so remove the checks. Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm: msm: a6xx: Dump GBIF registers, debugbus in gpu stateSharat Masetty2-13/+55
Add the relevant GBIF registers and the debug bus to the a6xx gpu state. This comes in pretty handy when debugging GPU bus related issues. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm: msm: a6xx: Add support for A618Sharat Masetty5-13/+154
This patch adds support for enabling Graphics Bus Interface(GBIF) used in multiple A6xx series chipets. Also makes changes to the PDC/RSC sequencing specifically required for A618. This is needed for proper interfacing with RPMH. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm: msm: Add 618 gpu to the adreno gpu listSharat Masetty1-0/+11
This patch adds Adreno 618 entry and its associated properties to the gpulist entries. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/dsi: Delay drm_panel_enable() until dsi_mgr_bridge_enable()Stephan Gerhold1-21/+41
At the moment, the MSM DSI driver calls drm_panel_enable() rather early from the DSI bridge pre_enable() function. At this point, the encoder (e.g. MDP5) is not enabled, so we have not started transmitting video data. However, the drm_panel_funcs documentation states that enable() should be called on the panel *after* video data is being transmitted: The .prepare() function is typically called before the display controller starts to transmit video data. [...] After the display controller has started transmitting video data, it's safe to call the .enable() function. This will typically enable the backlight to make the image on screen visible. Calling drm_panel_enable() too early causes problems for some panels: The TFT LCD panel used in the Samsung Galaxy Tab A 9.7 (2015) (APQ8016) uses the MIPI_DCS_SET_DISPLAY_BRIGHTNESS command to control backlight/brightness of the screen. The enable sequence is therefore: drm_panel_enable() drm_panel_funcs.enable(): backlight_enable() backlight_ops.update_status(): mipi_dsi_dcs_set_display_brightness(dsi, bl->props.brightness); The panel seems to silently ignore the MIPI_DCS_SET_DISPLAY_BRIGHTNESS command if it is sent too early. This prevents setting the initial brightness, causing the display to be enabled with minimum brightness instead. Adding various delays in the panel initialization code does not result in any difference. On the other hand, moving drm_panel_enable() to dsi_mgr_bridge_enable() fixes the problem, indicating that the panel requires the video stream to be active before the brightness command is accepted. Therefore: Move drm_panel_enable() to dsi_mgr_bridge_enable() to delay calling it until video data is being transmitted. Move drm_panel_disable() to dsi_mgr_bridge_disable() for similar reasons. (This is not strictly required for the panel affected above...) Tested-by: Jasper Korten <jja2000@gmail.com> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Tested-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03msm:disp:dpu1: Fix core clk rate in display driverShubhashree Dhar1-0/+1
Fix max core clk rate during dt parsing in display driver. Signed-off-by: Shubhashree Dhar <dhar@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03msm:disp:dpu1: add scaler support on SC7180 displayShubhashree Dhar5-12/+39
Add scaler support for display driver. This patch has dependency on the below series https://patchwork.kernel.org/patch/11260267/ Co-developed-by: Raviteja Tamatam <travitej@codeaurora.org> Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org> Signed-off-by: Shubhashree Dhar <dhar@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03msm:disp:dpu1: add mixer selection for display topologyKalyan Thota3-3/+21
mixer selection in the display topology is based on multiple factors 1) mixers available in the hw 2) interfaces to be enabled 3) merge capability change will pickup mixer as per the topology need. Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03msm:disp:dpu1: setup display datapath for SC7180 targetKalyan Thota6-5/+159
Add changes to setup display datapath on SC7180 target. Changes in v1: - Add changes to support ctl_active on SC7180 target. - While selecting the number of mixers in the topology consider the interface width. Changes in v2: - Spawn topology mixer selection into separate patch (Rob Clark). - Add co-developed-by tags in the commit msg (Stephen Boyd). Changes in v3: - Fix kernel checkpatch errors in v2. This patch has dependency on the below series https://patchwork.kernel.org/patch/11253747/ Co-developed-by: Shubhashree Dhar <dhar@codeaurora.org> Signed-off-by: Shubhashree Dhar <dhar@codeaurora.org> Co-developed-by: Raviteja Tamatam <travitej@codeaurora.org> Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org> Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03msm:disp:dpu1: add support for display for SC7180 targetKalyan Thota5-13/+188
Add display hw catalog changes for SC7180 target. Changes in v1: - Configure register offsets and capabilities for the display hw blocks. Changes in v2: - mdss_irq data type has changed in the dependent patch, accommodate the necessary changes. - Add co-developed-by tags in the commit msg (Stephen Boyd). Changes in v3: - fix kernel checkpatch errors in v2 Changes in v4: - move documentation into seperate patch (Rob Herring). This patch has dependency on the below series https://patchwork.kernel.org/patch/11253647/ Co-developed-by: Shubhashree Dhar <dhar@codeaurora.org> Signed-off-by: Shubhashree Dhar <dhar@codeaurora.org> Co-developed-by: Raviteja Tamatam <travitej@codeaurora.org> Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org> Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org> [rebase on hw catalog const'ification, and add more const's] Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03dt-bindings: msm:disp: add sc7180 DPU variantKalyan Thota1-2/+2
Add a compatible string to support sc7180 dpu version. Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03msm: disp: dpu1: add support to access hw irqs regs depending on revisionShubhashree Dhar4-6/+21
Current code assumes that all the irqs registers offsets can be accessed in all the hw revisions; this is not the case for some targets that should not access some of the irq registers. This change adds the support to selectively remove the irqs that are not supported in some of the hw revisions. Changes in v1: - Add support to selectively remove the hw irqs that are not not supported. Changes in v2: - Remove unrelated changes. Changes in v3: - Remove change-id (Stephen Boyd). - Add colon in variable description to match kernel-doc (Stephen Boyd). - Change macro-y way of variable description (Jordon Crouse). - Remove unnecessary if checks (Jordon Crouse). - Remove extra blank line (Jordon Crouse). Changes in v4: - Remove checkpatch errors. Signed-off-by: Shubhashree Dhar <dhar@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/dpu: Add UBWC support for RGB8888 formatsFritz Koenig2-0/+20
Hardware only natively supports BGR8888 UBWC. UBWC support for RGB8888 can be had by pretending that the buffer is BGR. Signed-off-by: Fritz Koenig <frkoenig@google.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/dpu: Mark various data tables as constStephen Boyd14-58/+58
These structures look like a bunch of data tables that aren't going to change after boot. Let's move them to the const RO section of memory so that they can't be modified at runtime on modern machines. Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/a4xx: set interconnect bandwidth voteBrian Masney1-0/+8
Set the two interconnect paths for the GPU to maximum speed for now to work towards getting the GPU working upstream. We can revisit a later time to optimize this for battery life. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/a3xx: set interconnect bandwidth voteBrian Masney1-0/+8
Set the two interconnect paths for the GPU to maximum speed for now to work towards getting the GPU working upstream. We can revisit a later time to optimize this for battery life. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/gpu: add support for ocmem interconnect pathBrian Masney2-1/+20
Some A3xx and all A4xx Adreno GPUs do not have GMEM inside the GPU core and must use the On Chip MEMory (OCMEM) in order to be functional. There's a separate interconnect path that needs to be setup to OCMEM. Add support for this second path to the GPU core. In the downstream MSM 3.4 sources, the two interconnect paths for the GPU are between: - MSM_BUS_MASTER_GRAPHICS_3D and MSM_BUS_SLAVE_EBI_CH0 - MSM_BUS_MASTER_V_OCMEM_GFX3D and MSM_BUS_SLAVE_OCMEM Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03dt-bindings: drm/msm/gpu: document second interconnectBrian Masney1-1/+5
Some A3xx and all A4xx Adreno GPUs do not have GMEM inside the GPU core and must use the On Chip MEMory (OCMEM) in order to be functional. There's a separate interconnect path that needs to be setup to OCMEM. Let's document this second interconnect path that's available. Since there's now two available interconnects, let's add the interconnect-names property. Signed-off-by: Brian Masney <masneyb@onstation.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/adreno: fix zap vs no-zap handlingRob Clark2-4/+18
We can have two cases, when it comes to "zap" fw. Either the fw requires zap fw to take the GPU out of secure mode at boot, or it does not and we can write RBBM_SECVID_TRUST_CNTL directly. Previously we decided based on whether zap fw load succeeded, but this is not a great plan because: 1) we could have zap fw in the filesystem on a device where it is not required 2) we could have the inverse case Instead, shift to deciding based on whether we have a 'zap-shader' node in dt. In practice, there is only one device (currently) with upstream dt that does not use zap (cheza), and it already has a /delete-node/ for the zap-shader node. Fixes: abccb9fe3267 ("drm/msm/a6xx: Add zap shader load") Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-03drm/msm/a6xx: restore previous freq on resumeRob Clark2-2/+9
Previously, if the freq were overriden (ie. via sysfs), it would get reset to max on resume. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-01-03drm/msm/dpu: ignore NULL clocksRob Clark1-19/+7
This isn't an error. Also the clk APIs handle the NULL case, so we can just delete the check. Signed-off-by: Rob Clark <robdclark@chromium.org> Tested-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org>
2019-12-30Linux 5.5-rc4v5.5-rc4Linus Torvalds1-1/+1
2019-12-29Merge tag 'riscv/for-v5.5-rc4' of ↵Linus Torvalds4-3/+6
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Paul Walmsley: "One important fix for RISC-V: - Redirect any incoming syscall with an ID less than -1 to sys_ni_syscall, rather than allowing them to fall through into the syscall handler. and two minor build fixes: - Export __asm_copy_{from,to}_user() from where they are defined. This fixes a build error triggered by some randconfigs. - Export flush_icache_all(). I'd resisted this before, since historically we didn't want modules to be able to flush the I$ directly; but apparently everyone else is doing it now" * tag 'riscv/for-v5.5-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: export flush_icache_all to modules riscv: reject invalid syscalls below -1 riscv: fix compile failure with EXPORT_SYMBOL() & !MMU
2019-12-29Merge tag 'locks-v5.5-1' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/jlayton/linux Pull /proc/locks formatting fix from Jeff Layton: "This is a trivial fix for a _very_ long standing bug in /proc/locks formatting. Ordinarily, I'd wait for the merge window for something like this, but it is making it difficult to validate some overlayfs fixes. I've also gone ahead and marked this for stable" * tag 'locks-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/jlayton/linux: locks: print unsigned ino in /proc/locks
2019-12-29Merge tag '5.5-rc3-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6Linus Torvalds3-10/+56
Pull cifs fixes from Steve French: "One performance fix for large directory searches, and one minor style cleanup noticed by Clang" * tag '5.5-rc3-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6: cifs: Optimize readdir on reparse points cifs: Adjust indentation in smb2_open_file
2019-12-29locks: print unsigned ino in /proc/locksAmir Goldstein1-1/+1
An ino is unsigned, so display it as such in /proc/locks. Cc: stable@vger.kernel.org Signed-off-by: Amir Goldstein <amir73il@gmail.com> Signed-off-by: Jeff Layton <jlayton@kernel.org>
2019-12-28riscv: export flush_icache_all to modulesOlof Johansson1-0/+1
This is needed by LKDTM (crash dump test module), it calls flush_icache_range(), which on RISC-V turns into flush_icache_all(). On other architectures, the actual implementation is exported, so follow that precedence and export it here too. Fixes build of CONFIG_LKDTM that fails with: ERROR: "flush_icache_all" [drivers/misc/lkdtm/lkdtm.ko] undefined! Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-12-28riscv: reject invalid syscalls below -1David Abdurachmanov1-0/+1
Running "stress-ng --enosys 4 -t 20 -v" showed a large number of kernel oops with "Unable to handle kernel paging request at virtual address" message. This happens when enosys stressor starts testing random non-valid syscalls. I forgot to redirect any syscall below -1 to sys_ni_syscall. With the patch kernel oops messages are gone while running stress-ng enosys stressor. Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Fixes: 5340627e3fe0 ("riscv: add support for SECCOMP and SECCOMP_FILTER") Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-12-28riscv: fix compile failure with EXPORT_SYMBOL() & !MMULuc Van Oostenryck2-3/+4
When support for !MMU was added, the declaration of __asm_copy_to_user() & __asm_copy_from_user() were #ifdefed out hence their EXPORT_SYMBOL() give an error message like: .../riscv_ksyms.c:13:15: error: '__asm_copy_to_user' undeclared here .../riscv_ksyms.c:14:15: error: '__asm_copy_from_user' undeclared here Since these symbols are not defined with !MMU it's wrong to export them. Same for __clear_user() (even though this one is also declared in include/asm-generic/uaccess.h and thus doesn't give an error message). Fix this by doing the EXPORT_SYMBOL() directly where these symbols are defined: inside lib/uaccess.S itself. Fixes: 6bd33e1ece52 ("riscv: fix compile failure with EXPORT_SYMBOL() & !MMU") Reported-by: kbuild test robot <lkp@intel.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-12-28Merge tag 'scsi-fixes' of ↵Linus Torvalds6-11/+12
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi Pull SCSI fixes from James Bottomley: "Four fixes and one spelling update, all in drivers: two in lpfc and the rest in mp3sas, cxgbi and target" * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: scsi: target/iblock: Fix protection error with blocks greater than 512B scsi: libcxgbi: fix NULL pointer dereference in cxgbi_device_destroy() scsi: lpfc: fix spelling mistakes of asynchronous scsi: lpfc: fix build failure with DEBUGFS disabled scsi: mpt3sas: Fix double free in attach error handling
2019-12-28Merge tag 'drm-fixes-2019-12-28' of git://anongit.freedesktop.org/drm/drmLinus Torvalds14-86/+139
Pull drm fixes from Dave Airlie: "Post-xmas food coma recovery fixes. Only three fixes for i915 since I expect most people are holidaying. i915: - power management rc6 fix - framebuffer tracking fix - display power management ratelimit fix" * tag 'drm-fixes-2019-12-28' of git://anongit.freedesktop.org/drm/drm: drm/i915: Hold reference to intel_frontbuffer as we track activity drm/i915/gt: Ratelimit display power w/a drm/i915/pmu: Ensure monotonic rc6
2019-12-27Merge tag 'linux-kselftest-5.5-rc4' of ↵Linus Torvalds11-38/+70
git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest Pull Kselftest fixes from Shuah Khan: - rseq build failures fixes related to glibc 2.30 compatibility from Mathieu Desnoyers - Kunit fixes and cleanups from SeongJae Park - Fixes to filesystems/epoll, firmware, and livepatch build failures and skip handling. * tag 'linux-kselftest-5.5-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest: rseq/selftests: Clarify rseq_prepare_unload() helper requirements rseq/selftests: Fix: Namespace gettid() for compatibility with glibc 2.30 rseq/selftests: Turn off timeout setting kunit/kunit_tool_test: Test '--build_dir' option run kunit: Rename 'kunitconfig' to '.kunitconfig' kunit: Place 'test.log' under the 'build_dir' kunit: Create default config in '--build_dir' kunit: Remove duplicated defconfig creation docs/kunit/start: Use in-tree 'kunit_defconfig' selftests: livepatch: Fix it to do root uid check and skip selftests: firmware: Fix it to do root uid check and skip selftests: filesystems/epoll: fix build error
2019-12-27Merge tag 'pm-5.5-rc4' of ↵Linus Torvalds1-4/+1
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management fixes from Rafael Wysocki: "Fix compile test of the Tegra devfreq driver (Arnd Bergmann) and remove redundant Kconfig dependencies from multiple devfreq drivers (Leonard Crestez)" * tag 'pm-5.5-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: PM / devfreq: tegra: Add COMMON_CLK dependency PM / devfreq: Drop explicit selection of PM_OPP
2019-12-27Merge tag 'io_uring-5.5-20191226' of git://git.kernel.dk/linux-blockLinus Torvalds2-343/+357
Pull io_uring fixes from Jens Axboe: - Removal of now unused busy wqe list (Hillf) - Add cond_resched() to io-wq work processing (Hillf) - And then the series that I hinted at from last week, which removes the sqe from the io_kiocb and keeps all sqe handling on the prep side. This guarantees that an opcode can't do the wrong thing and read the sqe more than once. This is unchanged from last week, no issues have been observed with this in testing. Hence I really think we should fold this into 5.5. * tag 'io_uring-5.5-20191226' of git://git.kernel.dk/linux-block: io-wq: add cond_resched() to worker thread io-wq: remove unused busy list from io_sqe io_uring: pass in 'sqe' to the prep handlers io_uring: standardize the prep methods io_uring: read 'count' for IORING_OP_TIMEOUT in prep handler io_uring: move all prep state for IORING_OP_{SEND,RECV}_MGS to prep handler io_uring: move all prep state for IORING_OP_CONNECT to prep handler io_uring: add and use struct io_rw for read/writes io_uring: use u64_to_user_ptr() consistently
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-24 13:45:33 +0300