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2019-09-14drm/amd/powerplay: do proper cleanups on hw_finiEvan Quan3-0/+30
These are needed for smu_reset support. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Jack Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amd/powerplay: update cached feature enablement status V3Evan Quan2-53/+49
Need to update in cache feature enablement status after pp_feature settings. Another fix for the commit below: drm/amd/powerplay: implment sysfs feature status function in smu V2: update smu_feature_update_enable_state() and relates V3: use bitmap_or and bitmap_andnot Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Jack Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amd/powerplay: guard manual mode prerequisite for clock level forceEvan Quan3-8/+21
Force clock level is for dpm manual mode only. Reported-by: Candice Li <candice.li@amd.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jack Gui <Jack.Gui@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: only apply gds clearing workaround when ras is supportedHawking Zhang1-0/+4
gds clearing workaround should only be applied on asics that support gfx ras Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: fix memory leak when ras is not supported on specific ip blockHawking Zhang4-4/+7
free ras_if if ras is not supported Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: check mmhub_funcs pointer before refering to itHawking Zhang1-1/+1
mmhub callback functions are not initialized for all the ASICs Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: Remove unnecessary TLB workaround (v2)Felix Kuehling1-16/+1
This workaround is better handled in user mode in a way that doesn't require allocating extra memory and breaking userptr BOs. The TLB bug is a performance bug, not a functional or security bug. Hence it is safe to remove this kernel part of the workaround to allow a better workaround using only virtual address alignments in user mode. v2: Removed VI_BO_SIZE_ALIGN definition Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: Use optimal mtypes and PTE bits for ArcturusFelix Kuehling2-2/+22
For compute VRAM allocations on Arturus use the new RW mtype for non-coherent local memory, CC mtype for coherent local memory and PTE_SNOOPED bit for invalidating non-dirty cache lines on remote XGMI mappings. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Tested-by: Amber Lin <Amber.Lin@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: Determing PTE flags separately for each mapping (v3)Felix Kuehling2-17/+24
The same BO can be mapped with different PTE flags by different GPUs. Therefore determine the PTE flags separately for each mapping instead of storing them in the KFD buffer object. Add a helper function to determine the PTE flags to be extended with ASIC and memory-type-specific logic in subsequent commits. v2: Split Arcturus-specific MTYPE changes into separate commit v3: Fix return type of get_pte_flags to uint64_t Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: Support new arcturus mtypeOak Zeng2-0/+4
Arcturus repurposed mtype WC to RW. Modify gmc functions to support the new mtype Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: Extends amdgpu vm definitions (v2)Oak Zeng1-0/+2
Add RW mtype introduced for arcturus. v2: * Don't add probe-invalidation bit from UAPI * Don't add unused AMDGPU_MTYPE_ definitions Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: switch to amdgpu_ras_late_init for nbio v7_4 (v2)Hawking Zhang1-1/+12
call helper function in late init phase to handle ras init for nbio ip block v2: init local var r to 0 in case the function return failure on asics that don't have ras_late_init implementation Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: add ras_late_init callback function for nbio v7_4 (v3)Hawking Zhang2-0/+47
ras_late_init callback function will be used to do common ras init in late init phase. v2: call ras_late_fini to do cleanup when fails to enable interrupt v3: rename sysfs/debugfs node name to pcie_bif_xxx Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: add mmhub ras_late_init callback function (v2)Hawking Zhang3-22/+35
The function will be called in late init phase to do mmhub ras init v2: check ras_late_init function pointer before invoking the function Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: switch to amdgpu_ras_late_init for gmc v9 block (v2)Hawking Zhang1-112/+47
call helper function in late init phase to handle ras init for gmc ip block v2: call ras_late_fini to do clean up when fail to enable interrupt Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: switch to amdgpu_ras_late_init for sdma v4 block (v2)Hawking Zhang1-74/+24
call helper function in late init phase to handle ras init for sdma ip block v2: call ras_late_fini to do clean up when fail to enable interrupt Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: switch to amdgpu_ras_late_init for gfx v9 block (v2)Hawking Zhang1-71/+21
call helper function in late init phase to handle ras init for gfx ip block v2: call ras_late_fini to do clean up when fail to enable interrupt Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: add helper function to do common ras_late_init/fini (v3)Hawking Zhang2-0/+79
In late_init for ras, the helper function will be used to 1). disable ras feature if the IP block is masked as disabled 2). send enable feature command if the ip block was masked as enabled 3). create debugfs/sysfs node per IP block 4). register interrupt handler v2: check ih_info.cb to decide add interrupt handler or not v3: add ras_late_fini for cleanup all the ras fs node and remove interrupt handler Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: poll ras_controller_irq and err_event_athub_irq statusHawking Zhang1-0/+12
For the hardware that can not enable BIF ring for IH cookies for both ras_controller_irq and err_event_athub_irq, the driver has to poll the status register in irq handling and ack the hardware properly when there is interrupt triggered Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: add ras_controller and err_event_athub interrupt supportHawking Zhang3-0/+143
Ras controller interrupt and Ras err event athub interrupt are two dedicated interrupts for RAS support. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: update nbio v7_4 ip header filesHawking Zhang2-5/+5
Add mmBIF_INTR_CNTL and its shift mask. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: add nbif v7_4 irq source header for vega20Hawking Zhang1-0/+42
nbif v7_4 interrupt source definition Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu/nbio: add functions to query ras specific interrupt statusHawking Zhang2-0/+34
ras_controller_interrupt and err_event_interrupt are ras specific interrupts. add functions to check their status and ack them if they are generated. both funcitons should only be invoked in ISR when BIF ring is disabled or even not initialized. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: switch to new amdgpu_nbio structureHawking Zhang27-154/+108
no functional change, just switch to new structures Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-14drm/amdgpu: add new amdgpu nbio header fileHawking Zhang1-0/+87
More nbio funcitonalities will be added and nbio could be treated as an ip block like gfx/sdma.etc Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-06Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into ↵Dave Airlie1-1/+3
drm-next single etnaviv fix for an error path. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Lucas Stach <l.stach@pengutronix.de> Link: https://patchwork.freedesktop.org/patch/msgid/4ae00cfb47c8e6fffca5dbb45ae9370cd4e5eaf4.camel@pengutronix.de
2019-09-06Merge tag 'drm-next-5.4-2019-08-30' of ↵Dave Airlie99-140/+91412
git://people.freedesktop.org/~agd5f/linux into drm-next drm-next-5.4-2019-08-30: amdgpu: - Add DC support for Renoir - Add some GPUVM hw bug workarounds - add support for the smu11 i2c controller - GPU reset vram lost bug fixes - Navi1x powergating fixes - Navi12 power fixes - Renoir power fixes - Misc bug fixes and cleanups Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190830212650.5055-1-alexander.deucher@amd.com
2019-09-03Merge tag 'exynos-drm-next-for-v5.4' of ↵Dave Airlie7-3/+19
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next - JUst one cleanup which drops the use of drmP.h header file. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Inki Dae <daeinki@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190901120619.3992-1-daeinki@gmail.com
2019-09-02drm/etnaviv: fix missing unlock on error in etnaviv_iommuv1_context_alloc()Wei Yongjun1-1/+3
Add the missing unlock before return from function etnaviv_iommuv1_context_alloc() in the error handling case. Fixes: 27b67278e007 ("drm/etnaviv: rework MMU handling") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2019-09-01drm/exynos: drop use of drmP.hSam Ravnborg7-3/+19
There was a few uses of drmP that was missed in the last patch removing this header from exynos. Remove the final uses of this header. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Inki Dae <inki.dae@samsung.com> Cc: Joonyoung Shim <jy0922.shim@samsung.com> Cc: Seung-Woo Kim <sw0312.kim@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Jingoo Han <jingoohan1@gmail.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2019-08-30drm/amdgpu: Move null pointer dereference checkAustin Kim1-2/+3
Null pointer dereference check should have been checked, ahead of below routine. struct amdgpu_device *adev = hwmgr->adev; With this commit, it could avoid potential NULL dereference. Signed-off-by: Austin Kim <austindh.kim@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amdgpu: Fix undefined dm_ip_block for navi12Petr Cvek1-0/+2
There is missing "if defined" CONFIG_DRM_AMD_DC block for non DC configurations. This will cause link error. The patch is fixing that. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=110979 Signed-off-by: Petr Cvek <petrcvekcz@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amdgpu: fix no interrupt issue for renoir emu (v2)Aaron Liu1-8/+10
In renoir's vega10_ih model, there's a security change in mmIH_CHICKEN register, that limits IH to use physical address (FBPA, GPA) directly. Those chicken bits need to be programmed first. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amdgpu: update IH_CHICKEN in oss 4.0 IP header for VG/RV seriesAaron Liu1-0/+4
In Renoir's emulator, those chicken bits need to be programmed. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amd/powerplay: SMU_MSG_OverridePcieParameters is unsupport for APUAaron Liu1-0/+3
For apu, SMU_MSG_OverridePcieParameters is unsupport. So return directly in smu_override_pcie_parameters function. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-30drm/amdgpu: Handle job is NULL use case in amdgpu_device_gpu_recoverAndrey Grodzovsky1-6/+4
This should be checked at all places job is accessed. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amdgpu: Enable DC on RenoirRoman Li2-0/+9
Enable DC support for renoir. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add DCN2.1 changes to DMLRoman Li2-0/+23
Hook up the DML changes for renoir. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Correct order of RV family clk managers for RenoirRoman Li1-6/+6
Need to check for renoir first. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: add Renoir to kconfigBhawanpreet Lakha1-0/+8
Add a kconfig option to enable renoir. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: build dcn21 blocksBhawanpreet Lakha1-0/+3
Enable the building of dcn21 support. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: add dcn21 core DC changesBhawanpreet Lakha4-0/+11
Add missing parameters, to make dcn21 compile without errors Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: add dal_asic_id for renoirBhawanpreet Lakha1-0/+5
Add the rev id for renoir. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: call update_bw_bounding_boxBhawanpreet Lakha2-0/+10
call update_bw_bounding_box in DC construct Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Handle Renoir in amdgpu_dm (v2)Bhawanpreet Lakha1-0/+14
Hook up renoir support to KMS. v2: squash in "Fixes for Renoir in amdgpu_dm" Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Handle Renoir in DCBhawanpreet Lakha3-0/+20
add Renoir DCN version in DC and handle it Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Fix register namesBhawanpreet Lakha1-2/+2
rename VM_CONTEXT0 to MMVM_CONTEXT0 as that is the name defined in the register files Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir DMLBhawanpreet Lakha6-0/+8058
DML provides the display configuration validation as provided by the hw teams. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir GPIOBhawanpreet Lakha7-0/+687
Misc display related configuration details. Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29drm/amd/display: Add Renoir resource (v2)Bhawanpreet Lakha3-1/+1726
Manages the renoir display resources (crtcs, phys, plls, etc.). v2: rebase (Alex) Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-25 18:19:52 +0300