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2021-06-29drm/i915/ehl: Remove require_force_probe protectionTejas Upadhyay1-1/+0
Removing force probe protection from EHL platform. Did not observe warnings, errors, flickering or any visual defects while doing ordinary tasks like browsing and editing documents in a two monitor setup. For more info drm-tip idle run results : https://intel-gfx-ci.01.org/tree/drm-tip/drmtip.html? Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210629104954.927151-1-tejaskumarx.surendrakumar.upadhyay@intel.com
2021-06-29drm/i915/jsl: Remove require_force_probe protectionTejas Upadhyay1-1/+0
Removing force probe protection from JSL platform. Did not observe warnings, errors, flickering or any visual defects while doing ordinary tasks like browsing and editing documents in a two monitor setup. For more info drm-tip idle run results : https://intel-gfx-ci.01.org/tree/drm-tip/drmtip.html? Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210629105356.927359-1-tejaskumarx.surendrakumar.upadhyay@intel.com
2021-06-25drm/i915/display: use max_level to control loopLucas De Marchi1-5/+4
Since we are already loop through the levels to sanitize them, mark what is the real max_level so it can be used in subsequent loop. This makes it simpler to later add the adjustment latency to "valid levels". No change in behavior, just makes the code easier to follow. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210622212210.3746133-2-lucas.demarchi@intel.com
2021-06-25drm/i915/display: fix level 0 adjustement on display ver >= 12Lucas De Marchi2-8/+8
We should no longer increment level 0 by 1usec when we have 16Gb DIMMs. Instead spec says to add 3usec (as opposed to 2) to each valid level when punit replies 0 to level 0. So set wm_lv_0_adjust_needed to false for DISPLAY_VER() >= 12 and set the proper adjustment value when handling WaWmMemoryReadLatency. Bspec: 49326, 4381 Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210622212210.3746133-1-lucas.demarchi@intel.com
2021-06-25drm/i915/display/adl_p: Implement Wa_16011303918José Roberto de Souza1-0/+12
PSR2 is not compatible with DC3CO or VRR in this stepping, so not enabling PSR2 if VRR will be enabled or not enabling DC3CO if PSR2 is possible. BSpec: 54369 Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Cc: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-5-jose.souza@intel.com
2021-06-25drm/i915/xelpd: Handle PSR2 SDP indication in the prior scanlineJosé Roberto de Souza3-0/+40
In some modes there is not enough time during hblank to transmit PSR2 SDP plus the pixels CRC SDP, if such case happens PSR2 needs to be disabled. But eDP spec 1.4b allows to transmit PSR2 SDP in a prior scanline alone and than later the CRC SDP, allowing PSR2 to be enabled in those hblank constrained modes. BSpec: 49274 Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-4-jose.souza@intel.com
2021-06-25drm/i915/display/adl_p: Implement Wa_16011168373José Roberto de Souza2-0/+23
Another WA that is required for PSR2. BSpec: 54369 Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Cc: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-3-jose.souza@intel.com
2021-06-25drm/i915/display/adl_p: Implement Wa_22012278275José Roberto de Souza2-3/+32
The PSR2_CTL io buffer wake and fast wake values do not match expected in pre production hardware, so here adding a table that matches with HW to program it with values that HW expect. Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-2-jose.souza@intel.com
2021-06-25drm/i915/display/psr: Handle SU Y granularityJosé Roberto de Souza2-34/+80
We were only handling X and width granularity, what was causing issues when sink had a granularity different than 4. While at it, renaming su_x_granularity to su_w_granularity to better match reality. Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-1-jose.souza@intel.com
2021-06-24drm/i915: s/intel_crtc/crtc/Ville Syrjälä15-105/+100
Clear out the straggler 'intel_crtc' variables. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-7-ville.syrjala@linux.intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-06-24drm/i915: Clean up intel_fbdev_init_bios() a bitVille Syrjälä1-39/+57
Sort out the mess with the local variables in intel_fbdev_init_bios(). Get rid of all aliasing pointers, use standard naming/types, and introduce a few more locals in the loops to avoid the hard to read long struct walks. While at we also polish the debugs a bit to use the canonical [CRTC:%d:%s] style. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-6-ville.syrjala@linux.intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-06-24drm/i915: Clean up pre-skl wm calling conventionVille Syrjälä3-51/+59
Just pass the full atomic state+crtc to the pre-skl watermark functions, and clean up the types/variable names around the area. Note that having both .compute_pipe_wm() and .compute_intermediate_wm() is entirely redundant now. We could unify them to a single vfunc. But let's do this one step at a time. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-5-ville.syrjala@linux.intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-06-24drm/i915: Clean up intel_find_initial_plane_obj() a bitVille Syrjälä1-51/+62
Sort out the mess with the local variables in intel_find_initial_plane_obj(). Get rid of all aliasing pointers and use standard naming/types. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-4-ville.syrjala@linux.intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-06-24drm/i915: Clean up intel_get_load_detect_pipe() a bitVille Syrjälä1-22/+19
Sort out the mess with the local variables in intel_get_load_detect_pipe(). Get rid of all aliasing pointers and use standard naming/types. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-3-ville.syrjala@linux.intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-06-24drm/i915: Stop hand rolling drm_crtc_mask()Ville Syrjälä1-3/+2
Use drm_crtc_mask() instead of hand rolling it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-2-ville.syrjala@linux.intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-06-24drm/i915/fbc: Allocate llb before cfbVille Syrjälä1-9/+9
Since the llb allocation has a fixed size, let's grab it before the potentially variable sized cfb. That should avoid some allocation failure cases once we allow different compression ratios for FBC1. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-10-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-06-24drm/i915/fbc: Make the cfb allocation loop a bit more legibleVille Syrjälä1-25/+26
Write the cfb allocation loop as an actual loop instead of some hard to read goto thing. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-9-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-06-24drm/i915/fbc: Extract intel_fbc_stolen_end()Ville Syrjälä1-7/+12
Declutter find_compression_limit() a bit by extracting intel_fbc_stolen_end(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-8-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-06-24drm/i915/fbc: Introduce g4x_dpfc_ctl_limit()Ville Syrjälä1-33/+25
Exctract the limit->register value conversion into a common helper. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-7-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-06-24drm/i915/fbc: Handle 16bpp compression limit betterVille Syrjälä1-4/+2
The limit++ for the 16bpp case is nonsense since the compression limit is always supposed to be power of two. Replace it with <<=1. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-6-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-06-24drm/i915/fbc: Don't pass around the mm nodeVille Syrjälä1-7/+6
No point in passing the mm node explicitly to find_compression_limit() since it's always the same node for the cfb. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-5-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-06-24drm/i915/fbc: Embed the compressed_llb nodeVille Syrjälä2-21/+10
Not much point in dynamically allocating the line length buffer mm node that I can see. Just embed it directly like we do the for the cfb node. One less failure point to worry about. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-4-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-06-24drm/i915/fbc: Extract intel_fbc_program_cfb()Ville Syrjälä1-18/+28
Extract the CFB (+LLB) programming into a separate function. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-3-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-06-24drm/i915/fbc: s/threshold/limit/Ville Syrjälä2-26/+27
Let's call the compression limit the limit. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210610183237.3920-2-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-06-24drm/i915: Add the missing adls vswing tablesVille Syrjälä1-0/+101
adls is supposed to use special buf trans tables. Add what's missing. v2: Drop the RBR/HBR table since it's the same as for tgl Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-18-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2021-06-24drm/i915: Nuke buf_trans hdmi functionsVille Syrjälä1-44/+7
All the foo_get_buf_trans_hdmi() functions just return a single table. Remove the pointless wrappers. v2: Handle adl-p Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-17-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2021-06-24drm/i915: Clean up jsl/ehl buf trans functionsVille Syrjälä1-67/+20
The jsl/ehl buf trans functions are needlessly complicated. Simplify them. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-16-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2021-06-24drm/i915: Fix ehl edp hbr2 vswing tableVille Syrjälä1-2/+26
EHL is supposed to use special buf trans values for eDP HBR2+. Add such a table. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-15-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2021-06-24drm/i915: keep backlight_enable on until turn eDP display offLee Shawn C3-1/+37
This workaround is specific for a particular panel on Google chromebook project. When user space daemon enter idle state. It request adjust brightness to 0, turn backlight_enable signal off and keep eDP main link active. On general LCD, this behavior might not be a problem. But on this panel, its tcon would expect source to execute full eDP power off sequence after drop backlight_enable signal. Without eDP power off sequence. Even source try to turn backlight_enable signal on and restore proper brightness level. This panel is not able to light on again. This WA ignored the request from user space daemon to disable backlight_enable signal and keep it on always. When user space request kernel to turn eDP display off, kernel driver still can control backlight_enable signal properly. It would not impact standard eDP power off sequence. v2: 1. modify the quirk name and debug messages. 2. unregister backlight.power callback for specific device. v3: 1. modify debug output messages. 2. use DMI_EXACT_MATCH instead of DMI_MATCH. Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210624053932.21037-1-shawn.c.lee@intel.com
2021-06-23drm/i915: Deduplicate icl DP HBR2 vs. eDP HBR3 tableVille Syrjälä1-29/+10
The icl combo phy DP HBR2 is identical to the eDP HBR3 table. Get rid of one redundant copy. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-14-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2021-06-23drm/i915: Fix dg1 buf trans tablesVille Syrjälä1-6/+49
For some reason the dg1 buf trans tables have been stuffed into icl_get_combo_buf_trans_edp() which doesn't even get called on dg1. Split them out into a proper dg1 specific function, and also make sure we use the proper buf trans tables for DP as well as eDP. v2: Add the hobl stuff Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-13-ville.syrjala@linux.intel.com
2021-06-23drm/i915: Introduce rkl_get_combo_buf_trans()Ville Syrjälä1-11/+51
Give RKL its own get_buf_trans() func. v2: Drop the FIXME since the spec was clarified to indicate that TGL values are used for the HDMI/eDP cases. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-12-ville.syrjala@linux.intel.com
2021-06-23drm/i915: Clean up hsw/bdw/skl/kbl buf trans funcsVille Syrjälä1-187/+115
Split the hsw/bdw/skl/kbl get_buf_trans() functions into clean platform specific variants. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-11-ville.syrjala@linux.intel.com
2021-06-23drm/i915: Introduce encoder->get_buf_trans()Ville Syrjälä6-125/+65
Convert the get_buf_trans() functions into an encoder vfunc. Allows us to get rid of bunch of platform if-ladders. v2: Handle adl-p Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-10-ville.syrjala@linux.intel.com
2021-06-23drm/i915: Store the HDMI default entry in the bug trans structVille Syrjälä2-23/+27
Store the default HDMI buf trans entry in struct intel_ddi_buf_trans so that it's next to the actual table. This let's us start ridding ourselves of some platofrm specifics in intel_ddi_hdmi_num_entries(). Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-9-ville.syrjala@linux.intel.com
2021-06-23drm/i915; Return the whole buf_trans struct from get_buf_trans()Ville Syrjälä3-98/+98
Raise the abstraction level of the get_buf_trans() functions a bit more by returning the whole wrapper intel_ddi_buf_trans struct. v2: Handle adl-p Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-8-ville.syrjala@linux.intel.com
2021-06-23drm/i915: Introduce intel_get_buf_trans()Ville Syrjälä1-124/+129
Add a small helper to get the buf trans entris+num_entries from the struct. Should avoid copy-paste errors in the platform specific get_buf_trans() functions. @@ identifier T, N; @@ - *N = T.num_entries; - return T.entries; + return intel_get_buf_trans(&T, N); @@ @@ is_hobl_buf_trans(...) { ... } + + static const union intel_ddi_buf_trans_entry * + intel_get_buf_trans(const struct intel_ddi_buf_trans *ddi_translations, int *num_entries) + { + *num_entries = ddi_translations->num_entries; + return ddi_translations->entries; + } v2: Handle adl-p Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-7-ville.syrjala@linux.intel.com
2021-06-23drm/i915: Wrap the buf trans tables into a structVille Syrjälä2-178/+448
Put a wrapper struct around the buf trans tables so that we can declare the number of entries and default HDMI entry alongside the table. @wrap@ identifier old =~ "^.*translations.*"; fresh identifier new = "_" ## old; type T; @@ <... static const T - old + new [] = { ... }; + + static const struct intel_ddi_buf_trans old = { + .entries = new, + .num_entries = ARRAY_SIZE(new), + }; ...> @@ identifier wrap.old; @@ ( - ARRAY_SIZE(old) + old.num_entries | - old + old.entries ) @@ @@ union intel_ddi_buf_trans_entry { ... }; + +struct intel_ddi_buf_trans { + const union intel_ddi_buf_trans_entry *entries; + u8 num_entries; +}; v2: Handle adl-p Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-6-ville.syrjala@linux.intel.com
2021-06-23drm/i915: Rename dkl phy buf trans tablesVille Syrjälä1-16/+16
Rename the dkl phy buf trans tables to follow the same naming pattern used by everyone else. v2: Handle adl-p Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-5-ville.syrjala@linux.intel.com
2021-06-23drm/i915: Wrap the platform specific buf trans structs into a unionVille Syrjälä3-700/+708
In order to abstact the buf trans stuff let's wrap the platform specific structs into a union. v2: Handle adl-p Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-4-ville.syrjala@linux.intel.com
2021-06-23drm/i915: Introduce hsw_get_buf_trans()Ville Syrjälä4-39/+43
All the other platforms handle the output_type stuff in their *_get_buf_trans() functions. Do the same for hsw/bdw/skl. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-3-ville.syrjala@linux.intel.com
2021-06-23drm/i915: s/intel/hsw/ for hsw/bdw/skl buf transVille Syrjälä5-76/+70
Give the hsw/bdw/skl buf trans stuff a better namespace. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210608073603.2408-2-ville.syrjala@linux.intel.com
2021-06-22drm/i915/dsc: abstract helpers to get bigjoiner primary/secondary crtcJani Nikula4-16/+40
Add a single point of truth for figuring out the primary/secondary crtc for bigjoiner instead of duplicating the magic pipe +/- 1 in multiple places. Also fix the pipe validity checks to properly take non-contiguous pipes into account. The current checks may theoretically overflow i915->pipe_to_crtc_mapping[pipe], albeit with a warning, due to fused off pipes, as INTEL_NUM_PIPES() returns the actual number of pipes on the platform, and the check is for INTEL_NUM_PIPES() == pipe + 1. Prefer primary/secondary terminology going forward. v2: - Improved abstractions for pipe validity etc. Fixes: 8a029c113b17 ("drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave") Fixes: d961eb20adb6 ("drm/i915/bigjoiner: atomic commit changes for uncompressed joiner") Cc: Animesh Manna <animesh.manna@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by: Manasi Navare <manasi.dl.navare@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210610090528.20511-1-jani.nikula@intel.com
2021-06-22drm/i915/adl_p: Load DMCAnusha Srivatsa1-1/+9
Load DMC v2.10 on ADLP. The release notes mention that this version enables few power savings features. v2: Add DMC_PATH() for ADLP (Lucas) Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Clint Taylor <clinton.a.taylor@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-5-anusha.srivatsa@intel.com
2021-06-22drm/i915/adl_p: Pipe B DMC SupportAnusha Srivatsa2-0/+3
ADLP requires us to load both Pipe A and Pipe B. Plug Pipe B loading support. Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-4-anusha.srivatsa@intel.com
2021-06-22drm/i915/xelpd: Pipe A DMC pluggingAnusha Srivatsa5-61/+85
This patch adds Pipe A plumbing to the already existing parsing and loading functions which is taken care of in the prep patches. Adding MAX_DMC_FW to keep track for both Main and Pipe A DMC while loading the respective blobs. Also adding present field in dmc_info. s/find_dmc_fw_offset/csr_set_dmc_fw_offset. While at it add fw_info_matches_stepping() helper. CSR_PROGRAM() should now take the starting address of the particular blob (Main or Pipe) and not hardcode it. v2: Add dmc_offset and start_mmioaddr fields for dmc_info struct. v3: Add a missing corner cases of stepping-substepping combination in fw_info_matches_stepping() helper. v4: Add macro for start_mmioaddr for V1 package. Simplify code in dmc_set_fw_offset (Lucas) Cc: Souza, Jose <jose.souza@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-3-anusha.srivatsa@intel.com
2021-06-22drm/i915/dmc: Introduce DMC_FW_MAINAnusha Srivatsa2-23/+33
This is a prep patch for Pipe DMC plugging. Add dmc_info struct in intel_dmc to have all common fields shared between all DMC's in the package. Add DMC_FW_MAIN(dmc_id 0) to refer to the blob. v2: Remove dmc_offset and start_mmioaddr from dmc_info struct (Jose) Cc: Souza, Jose <jose.souza@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210621191415.29823-2-anusha.srivatsa@intel.com
2021-06-21drm/i915/display: Do not zero past infoframes.vscKees Cook1-1/+1
intel_dp_vsc_sdp_unpack() was using a memset() size (36, struct dp_sdp) larger than the destination (24, struct drm_dp_vsc_sdp), clobbering fields in struct intel_crtc_state after infoframes.vsc. Use the actual target size for the memset(). Fixes: 1b404b7dbb10 ("drm/i915/dp: Read out DP SDPs") Cc: stable@vger.kernel.org Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210617213301.1824728-1-keescook@chromium.org
2021-06-16drm/i915: Force a TypeC PHY disconnect during suspend/shutdownImre Deak3-9/+61
Disconnect TypeC PHYs during system suspend and shutdown, even with the corresponding TypeC sink still plugged to its connector, since leaving the PHY connected causes havoc at least during system resume in the presence of an Nvidia card. Note that this will only make a difference in the TypeC DP alternate mode, since in Thunderbolt alternate mode the PHY is never owned by the display engine and there is no notion of PHY ownership in legacy mode (the display engine being the only possible owner in that mode and the TypeC subsystem not having anything to do with the port in that case). Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3500 Reported-and-tested-by: Chris Chiu <chris.chiu@canonical.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210610174223.605904-1-imre.deak@intel.com
2021-06-16drm/i915/jsl: Add W/A 1409054076 for JSLTejas Upadhyay2-0/+43
When pipe A is disabled and MIPI DSI is enabled on pipe B, the AMT KVMR feature will incorrectly see pipe A as enabled. Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave it set while DSI is enabled on pipe B. No impact to setting it all the time. Changes since V5: - Added reviewed-by - Removed redundant braces and debug message format - Imre Changes since V4: - Modified function comment Wa_<number>:icl,jsl,ehl - Lucas - Modified debug message in sync state - Imre Changes since V3: - More meaningful name to workaround - Imre - Remove boolean check clear flag - Add WA_verify hook in dsi sync_state Changes since V2: - Used REG_BIT, ignored pipe A and used sw state check - Jani - Made function wrapper - Jani Changes since V1: - ./dim checkpatch errors addressed Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210615105613.851491-1-tejaskumarx.surendrakumar.upadhyay@intel.com
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-26 02:21:57 +0300