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2020-02-25drm/amd/display: dal_ddc_i2c_payloads_create can fail causing panicAric Cyr1-27/+25
[Why] Since the i2c payload allocation can fail need to check return codes [How] Clean up i2c payload allocations and check for errors Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-25drm/amd/display: Add aconnector condition check for dpcd readZhan Liu1-7/+14
[Why] core_link_read_dpcd() will invoke dm_helpers_dp_read_dpcd(), which needs to read dpcd info with the help of aconnector. If aconnector (dc->links[i]->prev) is NULL, then dpcd status cannot be read. As a result, dpcd read fails and a line of error will be printed out in dmesg.log as: "*ERROR* Failed to found connector for link!" [How] Make sure that aconnector (dc->links[i]->prev) is not NULL, then read dpcd status. Signed-off-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Joseph Gravenor <Joseph.Gravenor@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-25drm/amdgpu: Improve Vega20 XGMI TLB flush workaroundFelix Kuehling2-21/+53
Using a heavy-weight TLB flush once is not sufficient. Concurrent memory accesses in the same TLB cache line can re-populate TLB entries from stale texture cache (TC) entries while the heavy-weight TLB flush is in progress. To fix this race condition, perform another TLB flush after the heavy-weight one, when TC is known to be clean. Move the workaround into the low-level TLB flushing functions. This way they apply to amdgpu as well, and KIQ-based TLB flush only needs to synchronize once. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: shaoyun liu <shaoyun.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-25drm/amdgpu: fix psp ucode not loaded in bare-metalMonk Liu1-1/+1
for bare-metal we alawys need to load sys/sos/kdb Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-25amdgpu/gmc_v9: save/restore sdpif regs during S3Shirish S3-1/+39
fixes S3 issue with IOMMU + S/G enabled @ 64M VRAM. Suggested-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-25drm/amdgpu/discovery: make the discovery code less chattyAlex Deucher1-1/+1
Make the IP block base output debug only. Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-25drm/amdgpu: fix colliding of preemptionMonk Liu2-5/+6
what: some os preemption path is messed up with world switch preemption fix: cleanup those logics so os preemption not mixed with world switch this patch is a general fix for issues comes from SRIOV MCBP, but there is still UMD side issues not resovlved yet, so this patch cannot fix all world switch bug. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-25drm/amdgpu: fix memory leak during TDR test(v2)Monk Liu1-1/+5
fix system memory leak v2: fix coding style Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-25drm/amdgpu: cleanup some incorrect reg access for SRIOVMonk Liu2-3/+4
1) we shouldn't load PSP kdb and sys/sos for VF, they are supposed to be handled by hypervisor 2) ih reroute doesn't work on VF thus we should avoid calling it, besides VF should not use those PSP register sets for PF 3) shouldn't load SMU ucode under SRIOV, otherwise PSP would report error Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-19drm/amdgpu: drop the non-sense firmware version check on arcturusEvan Quan1-2/+3
As the firmware versions of arcturus are different from other gfx9 ASICs. And the warning("CP firmware version too old, please update!") caused by this check can be eliminated. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-19drm/amdgpu: add is_raven_kicker judgement for raven1changzhu1-2/+9
The rlc version of raven_kicer_rlc is different from the legacy rlc version of raven_rlc. So it needs to add a judgement function for raven_kicer_rlc and avoid disable GFXOFF when loading raven_kicer_rlc. Signed-off-by: changzhu <Changfeng.Zhu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-19drm/amdgpu: record non-zero error counter info in NBIO before resetting GPUGuchun Chen1-1/+14
When NBIO's RAS error happens, before trigging GPU reset, it's needed to record error counter information, which can correct the error counter value missed issue when reading from debugfs. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-19drm/amdgpu: log on non-zero error conter per IP before GPU resetGuchun Chen1-0/+33
Once sync flood interrupt is triggered by RAS error, before actual GPU recovery job, it's necessary to log on and print non-zero error counter, this will help user knows where the RAS error source is from quickly. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-19drm/amd/display: Don't take the address of skip_scdc_overwrite in ↵Nathan Chancellor1-2/+1
dc_link_detect_helper Clang warns: ../drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link.c:980:36: warning: address of 'sink->edid_caps.panel_patch.skip_scdc_overwrite' will always evaluate to 'true' [-Wpointer-bool-conversion] if (&sink->edid_caps.panel_patch.skip_scdc_overwrite) ~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~ 1 warning generated. This is probably not what was intended so remove the address of operator, which matches how skip_scdc_overwrite is handled in the rest of the driver. While we're here, drop an extra newline after this if block. Fixes: a760fc1bff03 ("drm/amd/display: add monitor patch to disable SCDC read/write") Link: https://github.com/ClangBuiltLinux/linux/issues/879 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Zhan Liu <zhan.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-14drm/amd/powerplay: correct the way for checking SMU_FEATURE_BACO_BIT supportEvan Quan1-1/+12
Since 'smu_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT)' will always return false considering the 'smu_system_features_control(smu, false)' disabled all SMU features. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amdgpu: return -EFAULT if copy_to_user() failsDan Carpenter1-4/+2
The copy_to_user() function returns the number of bytes remaining to be copied, but we want to return a negative error code to the user. Fixes: 030d5b97a54b ("drm/amdgpu: use amdgpu_device_vram_access in amdgpu_ttm_vram_read") Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amdgpu/gfx10: disable gfxoff when reading rlc clockAlex Deucher1-0/+2
Otherwise we readback all ones. Fixes rlc counter readback while gfxoff is active. Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amdgpu/gfx9: disable gfxoff when reading rlc clockAlex Deucher1-0/+2
Otherwise we readback all ones. Fixes rlc counter readback while gfxoff is active. Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amdgpu/soc15: fix xclk for ravenAlex Deucher1-1/+6
It's 25 Mhz (refclk / 4). This fixes the interpretation of the rlc clock counter. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amdgpu/display move get_num_odm_splits() into dc_resource.cAlex Deucher4-17/+19
It's used by more than just DCN2.0. Fixes missing symbol when amdgpu is built without DCN support. Reviewed-by: Zhan Liu <zhan.liu@amd.com> Tested-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amdgpu/display: extend DCN guardsAlex Deucher3-4/+4
to cover dcn2.x related headers. Reviewed-by: Zhan Liu <zhan.liu@amd.com> Tested-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amdgpu/display: extend DCN guard in dal_bios_parser_init_cmd_tbl_helper2Alex Deucher1-10/+3
To cover DCN 2.x. Reviewed-by: Zhan Liu <zhan.liu@amd.com> Tested-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/powerplay: Ratelimit PP_ASSERT warningsKent Russell1-2/+2
In certain situations the message could be reported dozens-to-hundreds of times, based on how often the function is called. E.g. If MCLK DPM, any calls to get/set MCLK will result in a failure message, potentially flooding dmesg. Ratelimit the warnings to avoid this flood. Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amd/powerplay: always refetch the enabled features status on dpm enablementEvan Quan1-3/+3
Otherwise, the cached dpm features status may be inconsistent under some case(e.g. baco reset of Navi asic). Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amd/display: fix dtm unloadingBhawanpreet Lakha1-1/+25
there was a type in the terminate command. We should be calling psp_dtm_unload() instead of psp_hdcp_unload() Fixes: 143f23053333 ("drm/amdgpu: psp DTM init") Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amd/display: Fix message for encryptionBhawanpreet Lakha1-6/+1
-msg_in is not needed for enabling encryption. -Use hdcp2_set_encryption instead of hdcp1_enable_encryption for hdcp2.2 Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amd/display: fix backwards byte order in rx_caps.Bhawanpreet Lakha1-2/+2
We were using incorrect byte order after we started using the drm_defines So fix it. Fixes: 02837a91ae75 ("drm/amd/display: add and use defines from drm_hdcp.h") Signed-off-by: JinZe.Xu <JinZe.Xu@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amd/display: update HDCP DTM immediately after hardware programmingWenjing Liu8-110/+106
[why] HDCP DTM needs to be aware of the upto date display topology information in order to validate hardware consistency. [how] update HDCP DTM on update_stream_config call. Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amd/display: no hdcp retry if bksv or ksv list is revokedWenjing Liu5-3/+13
[why] According to the specs when bksv or ksv list fails SRM check, HDCP TX should abort hdcp immediately. However with the current code HDCP will be reattampt upto 4 times. [how] Add the logic that stop HDCP retry if bksv or ksv list is revoked. Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amd/display: Handle revoked receiversBhawanpreet Lakha2-6/+28
[Why] PSP added a new return code for revoked receivers (SRM). We need to handle that so we don't retry hdcp This is already being handled on windows [How] Add the enums to psp interface header and handle them. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amdgpu/runpm: enable runpm on baco capable VI+ asicsAlex Deucher1-2/+8
Seems to work reliably on VI+ except for a few so enable runpm barring those where baco for runtime power management is not supported. [rajneesh] Picked https://patchwork.freedesktop.org/patch/335402/ to enable runtime pm with baco for kfd. Also fixed a checkpatch warning and added extra checks for VEGA20 and ARCTURUS. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amdkfd: refactor runtime pm for bacoRajneesh Bhardwaj6-26/+70
So far the kfd driver implemented same routines for runtime and system wide suspend and resume (s2idle or mem). During system wide suspend the kfd aquires an atomic lock that prevents any more user processes to create queues and interact with kfd driver and amd gpu. This mechanism created problem when amdgpu device is runtime suspended with BACO enabled. Any application that relies on kfd driver fails to load because the driver reports a locked kfd device since gpu is runtime suspended. However, in an ideal case, when gpu is runtime suspended the kfd driver should be able to: - auto resume amdgpu driver whenever a client requests compute service - prevent runtime suspend for amdgpu while kfd is in use This change refactors the amdgpu and amdkfd drivers to support BACO and runtime power management. Reviewed-by: Oak Zeng <oak.zeng@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amdkfd: show warning when kfd is lockedRajneesh Bhardwaj1-0/+2
During system suspend the kfd driver aquires a lock that prohibits further kfd actions unless the gpu is resumed. This adds some info which can be useful while debugging. Reviewed-by: Oak Zeng <oak.zeng@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-13drm/amdgpu: Fix missing error check in suspendRajneesh Bhardwaj1-0/+3
amdgpu_device_suspend might return an error code since it can be called from both runtime and system suspend flows. Add the missing return code in case of a failure. Reviewed-by: Oak Zeng <oak.zeng@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amd/display: Remove set but not unused variable 'stream_status'YueHaibing1-7/+1
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c: In function dcn10_post_unlock_program_front_end: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:2623:29: warning: variable stream_status set but not used [-Wunused-but-set-variable] commit bbf5f6c3f83b ("drm/amd/display: Split program front end part that occur outside lock") involved this unused variable. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amdgpu/powerplay: fix baco check for vega20Alex Deucher1-3/+4
We need to handle the runpm case as well as GPU reset. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amdgpu/smu: properly handle runpm/suspend/resetAlex Deucher1-16/+19
We need some special handling when using baco vs. other things. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amdgpu: add flag for runtime suspendAlex Deucher2-0/+3
So we know whether we in are in runtime suspend or system suspend. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amdgpu:/navi10: use the ODCAP enum to index the caps arrayAlex Deucher1-11/+11
Rather than the FEATURE_ID flags. Avoids a possible reading past the end of the array. Reviewed-by: Evan Quan <evan.quan@amd.com> Reported-by: Aleksandr Mezin <mezin.alexander@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amdgpu: update smu_v11_0_pptable.hAlex Deucher1-14/+32
Update to the latest changes. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amdgpu: Do not move root PT bo to relocated listxinhui pan1-17/+17
As root PD has no parent, we just need move its status to idle. Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> CC: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amdgpu: correct comment to clear up the confusionGuchun Chen1-1/+6
Former comment looks to be one intended behavior in code, actually it's not. So correct it. Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Guchun Chen <guchun.chen@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amd/powerplay: suppress nonsupport profile mode overrun messagePrike Liang1-2/+6
SMU12 not support WORKLOAD_DEFAULT_BIT and WORKLOAD_PPLIB_POWER_SAVING_BIT. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amd/powerplay: update smu11_driver_if_navi10.hEvan Quan2-3/+4
To pair the latest SMU firmwares. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amd/display: DCN2.x Do not program DPPCLK if same valueSung Lee1-1/+1
[WHY] Programming DPPCLK to the same value currently set may cause underflow while playing video in certain conditions. [HOW] Only program DPPCLK if clock is not the same as the previous value programmed. Signed-off-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amd/display: Use fb_base/fb_offset if available for translationNicholas Kazlauskas1-0/+6
[Why] In the case where we do have these passed in then we should be using these instead of the registers - those are only programmed when booting the adapter as primary. [How] Check if fb_base/fb_offset are non-zero. The value of 0 is invalid for fb_base but is valid for fb_offset on dGPU. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amd/display: Add psr get_state callWyatt Wood3-7/+10
[Why] Driver needs to know PSR state. [How] Use GPINT to call to firmware and get psr state. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amd/display: Don't map ATOM_ENABLE to ATOM_INITNicholas Kazlauskas1-4/+0
[Why] In DCN hardware sequencer we do actually call ATOM_INIT correctly per pipe. The workaround is not necessary for command table offloading. [How] Drop the workaround since it's not needed. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Chris Park <Chris.Park@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amd/display: add monitor patch to disable SCDC read/writeMartin Leung4-0/+18
[why] customer issue: found that for their specific panel, EDID register space being overwritten during SCDC read write [how] customer accepted HDMI 2 features not working - disabled SCDC read/write as well as HDMI 2 in general based on monitor patch Signed-off-by: Martin Leung <martin.leung@amd.com> Reviewed-by: Chris Park <Chris.Park@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-11drm/amd/display: add odm split logic to scaling calculationsDmytro Laktyushkin3-80/+132
Currently odm scaling calculations are only done when adding initial odm pipe. Any scaling re-calculations will mess up odm because of this. This change resolves the problem by updating scaling split logic to handle odm. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Michael Strauss <Michael.Strauss@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-30 20:44:56 +0300