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2020-05-26Merge tag 'qcom-drivers-for-5.8' of ↵Arnd Bergmann19-307/+775
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for v5.8 This contains a large set of cleanups, bug fixes, general improvements and documentation fixes for the RPMH driver. It adds a debugfs mechanism for inspecting Command DB. Socinfo got the "soc_id" attribute defines and definitions for a various variants of MSM8939. RPMH, RPMPD and RPMHPD where made possible to build as modules, but RPMH had to be reverted due to a compilation issue when tracing is enabled. RPMHPD gained power-domains for the SM8250 voltage corners. The SCM driver gained fixes for two build warnings and the SMP2P had an unnecessary error print removed. * tag 'qcom-drivers-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (42 commits) Revert "soc: qcom: rpmh: Allow RPMH driver to be loaded as a module" soc: qcom: rpmh-rsc: Remove the pm_lock soc: qcom: rpmh-rsc: Simplify locking by eliminating the per-TCS lock kernel/cpu_pm: Fix uninitted local in cpu_pm soc: qcom: rpmh-rsc: We aren't notified of our own failure w/ NOTIFY_BAD soc: qcom: rpmh-rsc: Correctly ignore CPU_CLUSTER_PM notifications firmware: qcom_scm-legacy: Replace zero-length array with flexible-array soc: qcom: rpmh-rsc: Timeout after 1 second in write_tcs_reg_sync() soc: qcom: rpmh-rsc: Factor "tcs_reg_addr" and "tcs_cmd_addr" calculation soc: qcom: socinfo: add msm8936/39 and apq8036/39 soc ids soc: qcom: aoss: Add SM8250 compatible soc: qcom: pdr: Remove impossible error condition soc: qcom: rpmh: Dirt can only make you dirtier, not cleaner soc: qcom: rpmhpd: Add SM8250 power domains firmware: qcom_scm: fix bogous abuse of dma-direct internals dt-bindings: soc: qcom: apr: Use generic node names for APR services firmware: qcom_scm: Remove unneeded conversion to bool soc: qcom: cmd-db: Properly endian swap the slv_id for debugfs soc: qcom: cmd-db: Use 5 digits for printing address soc: qcom: cmd-db: Cast sizeof() to int to silence field width warning ... Link: https://lore.kernel.org/r/20200519052533.1250024-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-26Merge tag 'v5.7-next-soc.2' of ↵Arnd Bergmann7-37/+51
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers - make mmsys kconfig entry to depend on ARCH_MEDIATEK instead of a specific SoC - move clock driver to bind against the new mmsys driver (mt2712, mt2701, mt8183, mt6797 and mt6779) * tag 'v5.7-next-soc.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: clk/soc: mediatek: mt6779: Bind clock driver from platform device clk/soc: mediatek: mt6797: Bind clock driver from platform device clk/soc: mediatek: mt8183: Bind clock driver from platform device clk / soc: mediatek: Bind clock and gpu driver for mt2701 clk / soc: mediatek: Bind clock and gpu driver for mt2712 soc: mediatek: Enable mmsys driver by default if Mediatek arch is selected Link: https://lore.kernel.org/r/d2eb19f4-589a-89c1-02ad-9f19a6cfb09a@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-26Merge tag 'tee-login-for-5.8' of ↵Arnd Bergmann4-1/+174
git://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers Adds utility function in TEE subsystem for client UUID generation. This function is also used in the optee driver. * tag 'tee-login-for-5.8' of git://git.linaro.org/people/jens.wiklander/linux-tee: tee: optee: Add support for session login client UUID generation tee: add support for session's client UUID generation Link: https://lore.kernel.org/r/20200512131243.GA10028@jade Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'reset-for-v5.8' of git://git.pengutronix.de/pza/linux into ↵Arnd Bergmann6-31/+253
arm/drivers Reset controller updates for v5.8 This tag adds support for i.MX8MP and i.MX8MN SoCs to the i.MX7 reset controller driver, extends the Hi6220 reset driver to support the AO reset controller used to bring the Mali450 GPU out of reset, and adds a define for the internal DAC reset line on Amlogic GXL SoCs. * tag 'reset-for-v5.8' of git://git.pengutronix.de/pza/linux: reset: hi6220: Add support for AO reset controller reset: imx7: Add support for i.MX8MP SoC dt-bindings: reset: imx7: Document usage on i.MX8MP SoC dt-bindings: reset: imx7: Add support for i.MX8MN dt-bindings: reset: meson: add gxl internal dac reset Link: https://lore.kernel.org/r/20200515143844.GA17201@pengutronix.de Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'amlogic-drivers' of ↵Arnd Bergmann4-26/+214
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers soc: amlogic: driver updates for v5.8 - support GX SoCs in the EE power-controller driver * tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCs soc: amlogic: meson-ee-pwrc: add support for Meson8/Meson8b/Meson8m2 dt-bindings: power: meson-ee-pwrc: add support for the Meson GX SoCs dt-bindings: power: meson-ee-pwrc: add support for Meson8/8b/8m2 Link: https://lore.kernel.org/r/5ec6f570.1c69fb81.a3753.711b@mx.google.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'tee-smatch-for-5.8' of ↵Arnd Bergmann1-2/+1
git://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers tee: remove unnecessary NULL check in tee_shm_alloc() * tag 'tee-smatch-for-5.8' of git://git.linaro.org/people/jens.wiklander/linux-tee: tee: remove unnecessary NULL check in tee_shm_alloc() Link: https://lore.kernel.org/r/20200504181333.GA11018@jade Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'v5.7-next-soc' of ↵Arnd Bergmann22-412/+594
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers Refactor the mmsys to reflect that it's a clock driver and the entry point for the DRM subsystem. Replace clk-provider.h include with of_clk.h for mach-mediatek * tag 'v5.7-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: ARM: mediatek: Replace <linux/clk-provider.h> by <linux/of_clk.h> soc: mediatek: Missing platform_device_unregister() on error in mtk_mmsys_probe() soc: mediatek: mmsys: Drop <linux/clk-provider.h> soc / drm: mediatek: Fix mediatek-drm device probing soc / drm: mediatek: Move routing control to mmsys device clk / soc: mediatek: Move mt8173 MMSYS to platform driver dt-bindings: mediatek: Update mmsys binding to reflect it is a system controller drm/mediatek: Omit warning on probe defers Link: https://lore.kernel.org/r/2cf27d33-59c6-023b-9993-57a2639824ea@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'tegra-for-5.8-firmware-v2' of ↵Arnd Bergmann4-10/+25
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers firmware: tegra: Changes for v5.8-rc1 This contains a change that makes the BPMP driver a regular driver, which fixes some weird suspend/resume ordering issues. Another fix is also included to implement another way of enabling the L2 cache after LP2 suspend. * tag 'tegra-for-5.8-firmware-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: firmware: tegra: Defer BPMP probe if shared memory not available firmware: tf: Different way of L2 cache enabling after LP2 suspend firmware: tegra: Make BPMP a regular driver Link: https://lore.kernel.org/r/20200515145311.1580134-6-thierry.reding@gmail.com Link: https://lore.kernel.org/r/20200522142846.2376224-1-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'renesas-drivers-for-v5.8-tag2' of ↵Arnd Bergmann1-0/+7
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers Renesas driver updates for v5.8 (take two) - Add the main config option for the RZ/G1H SoC. * tag 'renesas-drivers-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: Add Renesas R8A7742 config option Link: https://lore.kernel.org/r/20200515100547.14671-5-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'tee-subsys-for-5.8' of ↵Arnd Bergmann4-3/+42
git://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers TEE subsystem work - Reserve GlobalPlatform implementation defined logon method range - Add support to register kernel memory with TEE to allow TEE bus drivers to register memory references. * tag 'tee-subsys-for-5.8' of git://git.linaro.org/people/jens.wiklander/linux-tee: tee: add private login method for kernel clients tee: enable support to register kernel memory Link: https://lore.kernel.org/r/20200504181049.GA10860@jade Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'renesas-drivers-for-v5.8-tag1' of ↵Arnd Bergmann8-0/+123
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers Renesas driver updates for v5.8 - Add System Controller (SYSC) and Reset (RST) support for the new RZ/G1H (R8A7742) SoC. * tag 'renesas-drivers-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: rcar-rst: Add support for RZ/G1H soc: renesas: rcar-sysc: Add R8A7742 support clk: renesas: Add r8a7742 CPG Core Clock Definitions dt-bindings: power: rcar-sysc: Add r8a7742 power domain index macros Link: https://lore.kernel.org/r/20200430084849.1457-5-geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-25Merge tag 'scmi-updates-5.8' of ↵Arnd Bergmann13-30/+340
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers ARM SCMI/SCPI updates for v5.8 1. Addition of ARM SMC/HVC as SCMI transport type with required abstraction already in place 2. Initial infrastructure support to add SCMI notifications from platform to agents 3. Miscellaneous fix adding header include guards * tag 'scmi-updates-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: arm_scmi: fix psci dependency firmware: arm_scmi: Fix return error code in smc_send_message firmware: arm_scmi: Fix handling of unexpected delayed responses firmware: arm_scmi: Clear channel for delayed responses firmware: arm_scmi: Clear channel on reception of unexpected responses firmware: arm_scmi: Rename .clear_notification() transport_ops firmware: arm_scmi: Add support for notifications message processing firmware: arm_scmi: Add notifications support in transport layer firmware: arm_scmi: Update protocol commands and notification list firmware: arm_scmi: Add receive buffer support for notifications firmware: arm_scpi: Add include guard to linux/scpi_protocol.h firmware: arm_scmi: Add include guard to linux/scmi_protocol.h firmware: arm_scmi: Drop checking for shmem property in parent node firmware: arm_scmi: Check shmem property for channel availablity firmware: arm_scmi: Drop empty stub for smc_mark_txdone firmware: arm_scmi: Make mutex channel specific firmware: arm_scmi: Add smc/hvc transport dt-bindings: arm: Add smc/hvc transport for SCMI Link: https://lore.kernel.org/r/20200512110357.GA26454@bogus Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-22firmware: tegra: Defer BPMP probe if shared memory not availableJon Hunter1-2/+2
Since commit 93d2e4322aa7 ("of: platform: Batch fwnode parsing when adding all top level devices") was added, the probing of the Tegra SRAM device has occurred later in the boot sequence, after the BPMP has been probed. The BPMP uses sections of the SRAM for shared memory and if the BPMP is probed before the SRAM then it fails to probe and never tries again. This is causing a boot failure on Tegra186 and Tegra194. Fix this by allowing the probe of the BPMP to be deferred if the SRAM is not available yet. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-05-20clk/soc: mediatek: mt6779: Bind clock driver from platform deviceMatthias Brugger2-7/+10
The mmsys driver is now the top level entry point for the multimedia system (mmsys), we bind the clock driver by creating a platform device. We also bind the MediaTek DRM driver which is not yet implement and therefor will errror out for now. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200518113156.25009-3-matthias.bgg@kernel.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-20clk/soc: mediatek: mt6797: Bind clock driver from platform deviceMatthias Brugger2-7/+10
The mmsys driver is now the top level entry point for the multimedia system (mmsys), we bind the clock driver by creating a platform device. We also bind the MediaTek DRM driver which is not yet implement and therefor will errror out for now. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200518113156.25009-2-matthias.bgg@kernel.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-20clk/soc: mediatek: mt8183: Bind clock driver from platform deviceMatthias Brugger2-7/+10
The mmsys driver is now the top level entry point for the multimedia system (mmsys), we bind the clock driver by creating a platform device. We also bind the MediaTek DRM driver which is not yet implement and therefor will errror out for now. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200518113156.25009-1-matthias.bgg@kernel.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-20clk / soc: mediatek: Bind clock and gpu driver for mt2701Enric Balletbo i Serra2-7/+10
Now that the mmsys driver is the top-level entry point for the multimedia subsystem, we could bind the clock and the gpu driver on those devices that is expected to work, so the drm driver is intantiated by the mmsys driver and display, hopefully, working again. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200401201736.2980433-3-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-20clk / soc: mediatek: Bind clock and gpu driver for mt2712Enric Balletbo i Serra2-7/+10
Now that the mmsys driver is the top-level entry point for the multimedia subsystem, we could bind the clock and the gpu driver on those devices that is expected to work, so the drm driver is intantiated by the mmsys driver and display, hopefully, working again on those devices. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200401201736.2980433-2-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-20soc: mediatek: Enable mmsys driver by default if Mediatek arch is selectedEnric Balletbo i Serra1-2/+1
The mmsys driver supports only MT8173 device for now, but like other system controllers is an important piece for other Mediatek devices. Actually it depends on the mt8173 clock specific driver but that dependency is not real as it can build without the clock driver. Instead of depends on a specific model, make the driver depends on the generic ARCH_MEDIATEK and enable by default so other Mediatek devices can start using it without flood the Kconfig. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Tested-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20200401201736.2980433-1-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-20soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCsMartin Blumenstingl1-2/+24
Add support for the Meson GX SoCs to the meson-ee-pwrc driver. The power domains on the GX SoCs are very similar to G12A. The only known differences so far are: - The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the VPU power-domain) - The GX SoCs have an additional reset line called "dvin" Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20200515204709.1505498-5-martin.blumenstingl@googlemail.com
2020-05-20soc: amlogic: meson-ee-pwrc: add support for Meson8/Meson8b/Meson8m2Martin Blumenstingl1-9/+77
This adds support for the power domains on Meson8/Meson8b/Meson8m2. Meson8 doesn't use any reset lines while Meson8b and Meson8m2 use the same set of reset lines (which is different from the newer SoCs). Add dedicated compatible strings for Meson8, Meson8b and Meson8m2 to support these differences. Notable differences between Meson8 and G12A are: - there is no HHI_VPU_MEM_PD_REG2 on the 32-bit SoCs - the Meson8b datasheet describes an "audio DSP memory" power domain which is used for the hardware audio decoder - the "amlogic,ao-sysctrl" only includes the power management related registers on the 32-bit SoCs, meaning the for example the AO_RTI_GEN_PWR_SLEEP0 register is at offset (0x2 << 2) rather than (0x3a << 2). As result of this (0x38 << 2) is subtracted from the register offsets, which is the start of the power management related registers. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200515204709.1505498-4-martin.blumenstingl@googlemail.com
2020-05-20dt-bindings: power: meson-ee-pwrc: add support for the Meson GX SoCsMartin Blumenstingl2-0/+41
The power domains on the GX SoCs are very similar to G12A. The only known differences so far are: - The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the VPU power-domain) - The GX SoCs have an additional reset line called "dvin" Add a new compatible string and adjust the reset line expectations for these SoCs. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200515204709.1505498-3-martin.blumenstingl@googlemail.com
2020-05-20dt-bindings: power: meson-ee-pwrc: add support for Meson8/8b/8m2Martin Blumenstingl2-15/+72
The power domains on the 32-bit Meson8/Meson8b/Meson8m2 SoCs are very similar to what G12A still uses. The (known) differences are: - Meson8 doesn't use any reset lines at all - Meson8b and Meson8m2 use the same reset lines, which are different from what the 64-bit SoCs use - there is no "vapb" clock on the older SoCs - amlogic,ao-sysctrl cannot point to the whole AO sysctrl region but only the power management related registers Add a new compatible string and adjust clock and reset line expectations for each SoC. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200515204709.1505498-2-martin.blumenstingl@googlemail.com
2020-05-18Revert "soc: qcom: rpmh: Allow RPMH driver to be loaded as a module"Bjorn Andersson2-6/+1
Attempting to compile rpmh-rsc.c as a module with TRACING enabled causes a build error as no _rcuidle function is generated for tracepoints when CONFIG_MODULE is set. Attempts has been made, but no resolution has been agreed upon, so lets revert this commit for now. This reverts commit 1d3c6f86fd3f8b88c707f56d8c3f94e014b40e83. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15soc: qcom: rpmh-rsc: Remove the pm_lockDouglas Anderson3-44/+67
It has been postulated that the pm_lock is bad for performance because a CPU currently running rpmh_flush() could block other CPUs from coming out of idle. Similarly CPUs coming out of / going into idle all need to contend with each other for the spinlock just to update the variable tracking who's in PM. Let's optimize this a bit. Specifically: - Use a count rather than a bitmask. This is faster to access and also means we can use the atomic_inc_return() function to really detect who the last one to enter PM was. - Accept that it's OK if we race and are doing the flush (because we think we're last) while another CPU is coming out of idle. As long as we block that CPU if/when it tries to do an active-only transfer we're OK. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200504104917.v6.5.I295cb72bc5334a2af80313cbe97cb5c9dcb1442c@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15soc: qcom: rpmh-rsc: Simplify locking by eliminating the per-TCS lockDouglas Anderson2-40/+28
The rpmh-rsc code had both a driver-level lock (sometimes referred to in comments as drv->lock) and a lock per-TCS. The idea was supposed to be that there would be times where you could get by with just locking a TCS lock and therefor other RPMH users wouldn't be blocked. The above didn't work out so well. Looking at tcs_write() the bigger drv->lock was held for most of the function anyway. Only the __tcs_buffer_write() and __tcs_set_trigger() calls were called without holding the drv->lock. It actually turns out that in tcs_write() we don't need to hold the drv->lock for those function calls anyway even if the per-TCS lock isn't there anymore. From the newly added comments in the code, this is because: - We marked "tcs_in_use" under lock. - Once "tcs_in_use" has been marked nobody else could be writing to these registers until the interrupt goes off. - The interrupt can't go off until we trigger w/ the last line of __tcs_set_trigger(). Thus, from a tcs_write() point of view, the per-TCS lock was useless. Looking at rpmh_rsc_write_ctrl_data(), only the per-TCS lock was held. It turns out, though, that this function already needs to be called with the equivalent of the drv->lock held anyway (we either need to hold drv->lock as we will in a future patch or we need to know no other CPUs could be running as happens today). Specifically rpmh_rsc_write_ctrl_data() might be writing to a TCS that has been borrowed for writing an active transation but it never checks this. Let's eliminate this extra overhead and avoid possible AB BA locking headaches. Suggested-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200504104917.v6.4.Ib8dccfdb10bf6b1fb1d600ca1c21d9c0db1ef746@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15kernel/cpu_pm: Fix uninitted local in cpu_pmDouglas Anderson1-2/+2
cpu_pm_notify() is basically a wrapper of notifier_call_chain(). notifier_call_chain() doesn't initialize *nr_calls to 0 before it starts incrementing it--presumably it's up to the callers to do this. Unfortunately the callers of cpu_pm_notify() don't init *nr_calls. This potentially means you could get too many or two few calls to CPU_PM_ENTER_FAILED or CPU_CLUSTER_PM_ENTER_FAILED depending on the luck of the stack. Let's fix this. Fixes: ab10023e0088 ("cpu_pm: Add cpu power management notifiers") Cc: stable@vger.kernel.org Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200504104917.v6.3.I2d44fc0053d019f239527a4e5829416714b7e299@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15soc: qcom: rpmh-rsc: We aren't notified of our own failure w/ NOTIFY_BADDouglas Anderson1-0/+4
When a PM Notifier returns NOTIFY_BAD it doesn't get called with CPU_PM_ENTER_FAILED. It only get called for CPU_PM_ENTER_FAILED if someone else (further down the notifier chain) returns NOTIFY_BAD. Handle this case by taking our CPU out of the list of ones that have entered PM. Without this it's possible we could detect that the last CPU went down (and we would flush) even if some CPU was alive. That's not good since our flushing routines currently assume they're running on the last CPU for mutual exclusion. Fixes: 985427f997b6 ("soc: qcom: rpmh: Invoke rpmh_flush() for dirty caches") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Maulik Shah <mkshah@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200504104917.v6.2.I1927d1bca2569a27b2d04986baf285027f0818a2@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15soc: qcom: rpmh-rsc: Correctly ignore CPU_CLUSTER_PM notificationsDouglas Anderson1-0/+3
Our switch statement doesn't have entries for CPU_CLUSTER_PM_ENTER, CPU_CLUSTER_PM_ENTER_FAILED, and CPU_CLUSTER_PM_EXIT and doesn't have a default. This means that we'll try to do a flush in those cases but we won't necessarily be the last CPU down. That's not so ideal since our (lack of) locking assumes we're on the last CPU. Luckily this isn't as big a problem as you'd think since (at least on the SoC I tested) we don't get these notifications except on full system suspend. ...and on full system suspend we get them on the last CPU down. That means that the worst problem we hit is flushing twice. Still, it's good to make it correct. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Fixes: 985427f997b6 ("soc: qcom: rpmh: Invoke rpmh_flush() for dirty caches") Reported-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200504104917.v6.1.Ic7096b3b9b7828cdd41cd5469a6dee5eb6abf549@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-15ARM: mediatek: Replace <linux/clk-provider.h> by <linux/of_clk.h>Geert Uytterhoeven1-1/+1
The Mediatek platform code is not a clock provider, and just needs to call of_clk_init(). Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200505154536.4099-3-geert+renesas@glider.be Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-15soc: mediatek: Missing platform_device_unregister() on error in ↵Wei Yongjun1-1/+3
mtk_mmsys_probe() Add the missing platform_device_unregister() before return from mtk_mmsys_probe() in the error handling case. Fixes: 667c769246b0 ("soc / drm: mediatek: Fix mediatek-drm device probing") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20200506141317.119537-1-weiyongjun1@huawei.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-14soc: mediatek: mmsys: Drop <linux/clk-provider.h>Geert Uytterhoeven1-1/+0
After the split, the mt8173 MMSYS driver is no longer a clock provider, and thus does not need to include <linux/clk-provider.h>. Fixes: 13032709e2328553 ("clk / soc: mediatek: Move mt8173 MMSYS to platform driver") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200506120204.31422-1-geert+renesas@glider.be Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2020-05-13firmware: qcom_scm-legacy: Replace zero-length array with flexible-arrayGustavo A. R. Silva1-1/+1
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] sizeof(flexible-array-member) triggers a warning because flexible array members have incomplete type[1]. There are some instances of code in which the sizeof operator is being incorrectly/erroneously applied to zero-length arrays and the result is zero. Such instances may be hiding some bugs. So, this work (flexible-array member conversions) will also help to get completely rid of those sorts of issues. This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20200508210805.GA24170@embeddedor Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-12soc: qcom: rpmh-rsc: Timeout after 1 second in write_tcs_reg_sync()Douglas Anderson1-5/+7
If our data still isn't there after 1 second, shout and give up. Reported-by: Joe Perches <joe@perches.com> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200415095953.v3.2.I8550512081c89ec7a545018a7d2d9418a27c1a7a@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-12soc: qcom: rpmh-rsc: Factor "tcs_reg_addr" and "tcs_cmd_addr" calculationDouglas Anderson1-15/+26
We can make some of the register access functions more readable by factoring out the calculations a little bit. Suggested-by: Joe Perches <joe@perches.com> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200415095953.v3.1.Ic70288f256ff0be65cac6a600367212dfe39f6c9@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-12soc: qcom: socinfo: add msm8936/39 and apq8036/39 soc idsVincent Knecht1-0/+4
This patch adds missing SoC IDs for MSM8936/39 and their APQ variants. Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org> Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200511212733.214464-1-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-12soc: qcom: aoss: Add SM8250 compatibleBjorn Andersson2-0/+2
Add SM8250 compatible to the qcom_aoss binding and driver. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200427054202.2822144-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-11tee: optee: Add support for session login client UUID generationVesa Jääskeläinen1-1/+5
Adds support for client UUID generation for OP-TEE. For group based session logins membership is verified. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2020-05-11tee: add support for session's client UUID generationVesa Jääskeläinen3-0/+169
TEE Client API defines that from user space only information needed for specified login operations is group identifier for group based logins. REE kernel is expected to formulate trustworthy client UUID and pass that to TEE environment. REE kernel is required to verify that provided group identifier for group based logins matches calling processes group memberships. TEE specification only defines that the information passed from REE environment to TEE environment is encoded into on UUID. In order to guarantee trustworthiness of client UUID user space is not allowed to freely pass client UUID. UUIDv5 form is used encode variable amount of information needed for different login types. Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> [jw: remove unused variable application_id] Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2020-05-07firmware: arm_scmi: fix psci dependencySudeep Holla2-2/+2
When CONFIG_ARM_PSCI_FW is disabled but CONFIG_HAVE_ARM_SMCCC is enabled, arm-scmi runs into a link failure: arm-linux-gnueabi-ld: drivers/firmware/arm_scmi/smc.o: in function `smc_send_message': smc.c:(.text+0x200): undefined reference to `arm_smccc_1_1_get_conduit' Change from HAVE_ARM_SMCCC to ARM_PSCI_FW config dependency for now. We rely on PSCI bindings anyways for the conduit and this should be fine. Link: https://lore.kernel.org/r/20200507144905.11397-1-sudeep.holla@arm.com Fixes: 1dc6558062da ("firmware: arm_scmi: Add smc/hvc transport") Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-06firmware: tf: Different way of L2 cache enabling after LP2 suspendDmitry Osipenko2-2/+20
ASUS TF300T device may not work properly if firmware is asked to fully re-initialize L2 cache after resume from LP2 suspend. The downstream kernel of TF300T uses different opcode to enable cache after resuming from LP2, this opcode also works fine on Nexus 7 and Ouya devices. Supposedly, this may be needed by an older firmware versions. Reported-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-05-06reset: hi6220: Add support for AO reset controllerPeter Griffin1-1/+68
This is required to bring Mali450 gpu out of reset. Cc: Peter Griffin <peter.griffin@linaro.org> Cc: Enrico Weigelt <info@metux.net> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> [jstultz: Added comment, Fix void return build issue Reported-by: kbuild test robot <lkp@intel.com>] Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-05-06reset: imx7: Add support for i.MX8MP SoCAnson Huang1-0/+101
i.MX8MP is a new SoC of i.MX8M family, it has same src IP inside but with different module layout, add support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-05-06dt-bindings: reset: imx7: Document usage on i.MX8MP SoCAnson Huang2-1/+53
The driver now supports i.MX8MP, so update bindings accordingly. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-05-06dt-bindings: reset: imx7: Add support for i.MX8MNAnson Huang2-29/+31
i.MX8MN can reuse i.MX8MQ's reset driver, update the compatible property and related info to support i.MX8MN. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-05-06dt-bindings: reset: meson: add gxl internal dac resetJerome Brunet1-1/+1
Add the reset line of the internal DAC found on the amlogic gxl SoC family Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2020-05-04soc: renesas: Add Renesas R8A7742 config optionLad Prabhakar1-0/+7
Add configuration option for the RZ/G1H (R8A77420) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1588197415-13747-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-05-04Linux 5.7-rc4v5.7-rc4Linus Torvalds1-1/+1
2020-05-03Merge tag 'for-5.7-rc3-tag' of ↵Linus Torvalds4-7/+53
git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux Pull more btrfs fixes from David Sterba: "A few more stability fixes, minor build warning fixes and git url fixup: - fix partial loss of prealloc extent past i_size after fsync - fix potential deadlock due to wrong transaction handle passing via journal_info - fix gcc 4.8 struct intialization warning - update git URL in MAINTAINERS entry" * tag 'for-5.7-rc3-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux: MAINTAINERS: btrfs: fix git repo URL btrfs: fix gcc-4.8 build warning for struct initializer btrfs: transaction: Avoid deadlock due to bad initialization timing of fs_info::journal_info btrfs: fix partial loss of prealloc extent past i_size after fsync
2020-05-03Merge tag 'iommu-fixes-v5.7-rc3' of ↵Linus Torvalds5-7/+11
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU fixes from Joerg Roedel: - Fix a memory leak when dev_iommu gets freed and a sub-pointer does not - Build dependency fixes for Mediatek, spapr_tce, and Intel IOMMU driver - Export iommu_group_get_for_dev() only for GPLed modules - Fix AMD IOMMU interrupt remapping when x2apic is enabled - Fix error path in the QCOM IOMMU driver probe function * tag 'iommu-fixes-v5.7-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: iommu/qcom: Fix local_base status check iommu: Properly export iommu_group_get_for_dev() iommu/vt-d: Use right Kconfig option name iommu/amd: Fix legacy interrupt remapping for x2APIC-enabled system iommu: spapr_tce: Disable compile testing to fix build on book3s_32 config iommu/mediatek: Fix MTK_IOMMU dependencies iommu: Fix the memory leak in dev_iommu_free()
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