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2022-07-03can: netlink: dump bitrate 0 if can_priv::bittiming.bitrate is -1UDario Binacchi2-1/+4
Upcoming changes on slcan driver will require you to specify a bitrate of value -1 to prevent the open_candev() from failing but at the same time highlighting that it is a fake value. In this case the command `ip --details -s -s link show' would print 4294967295 as the bitrate value. The patch change this value in 0. Link: https://lore.kernel.org/all/20220628163137.413025-5-dario.binacchi@amarulasolutions.com Suggested-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Tested-by: Jeroen Hofstee <jhofstee@victronenergy.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-03can: slcan: use the alloc_can_skb() helperDario Binacchi1-37/+33
It is used successfully by most (if not all) CAN device drivers. It allows to remove replicated code. Link: https://lore.kernel.org/all/20220628163137.413025-4-dario.binacchi@amarulasolutions.com Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Tested-by: Jeroen Hofstee <jhofstee@victronenergy.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-03can: slcan: use netdev helpers to print out messagesDario Binacchi1-3/+2
Replace printk() calls with corresponding netdev helpers. Link: https://lore.kernel.org/all/20220628163137.413025-3-dario.binacchi@amarulasolutions.com Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Tested-by: Jeroen Hofstee <jhofstee@victronenergy.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-03can: slcan: use the BIT() helperDario Binacchi1-1/+1
Use the BIT() helper instead of an explicit shift. Link: https://lore.kernel.org/all/20220628163137.413025-2-dario.binacchi@amarulasolutions.com Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Tested-by: Jeroen Hofstee <jhofstee@victronenergy.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-07-02netfilter: nft_set_pipapo: release elements in clone from abort pathPablo Neira Ayuso1-15/+33
New elements that reside in the clone are not released in case that the transaction is aborted. [16302.231754] ------------[ cut here ]------------ [16302.231756] WARNING: CPU: 0 PID: 100509 at net/netfilter/nf_tables_api.c:1864 nf_tables_chain_destroy+0x26/0x127 [nf_tables] [...] [16302.231882] CPU: 0 PID: 100509 Comm: nft Tainted: G W 5.19.0-rc3+ #155 [...] [16302.231887] RIP: 0010:nf_tables_chain_destroy+0x26/0x127 [nf_tables] [16302.231899] Code: f3 fe ff ff 41 55 41 54 55 53 48 8b 6f 10 48 89 fb 48 c7 c7 82 96 d9 a0 8b 55 50 48 8b 75 58 e8 de f5 92 e0 83 7d 50 00 74 09 <0f> 0b 5b 5d 41 5c 41 5d c3 4c 8b 65 00 48 8b 7d 08 49 39 fc 74 05 [...] [16302.231917] Call Trace: [16302.231919] <TASK> [16302.231921] __nf_tables_abort.cold+0x23/0x28 [nf_tables] [16302.231934] nf_tables_abort+0x30/0x50 [nf_tables] [16302.231946] nfnetlink_rcv_batch+0x41a/0x840 [nfnetlink] [16302.231952] ? __nla_validate_parse+0x48/0x190 [16302.231959] nfnetlink_rcv+0x110/0x129 [nfnetlink] [16302.231963] netlink_unicast+0x211/0x340 [16302.231969] netlink_sendmsg+0x21e/0x460 Add nft_set_pipapo_match_destroy() helper function to release the elements in the lookup tables. Stefano Brivio says: "We additionally look for elements pointers in the cloned matching data if priv->dirty is set, because that means that cloned data might point to additional elements we did not commit to the working copy yet (such as the abort path case, but perhaps not limited to it)." Fixes: 3c4287f62044 ("nf_tables: Add set type for arbitrary concatenation of ranges") Reviewed-by: Stefano Brivio <sbrivio@redhat.com> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2022-07-02netfilter: nf_tables: stricter validation of element dataPablo Neira Ayuso1-1/+8
Make sure element data type and length do not mismatch the one specified by the set declaration. Fixes: 7d7402642eaf ("netfilter: nf_tables: variable sized set element keys / data") Reported-by: Hugues ANGUELKOV <hanguelkov@randorisec.fr> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2022-07-02net/mlx5e: TC, Support offloading police actionJianbo Liu9-5/+124
Add parsing support by implementing struct mlx5e_tc_act for police action. TC rule with police actions is broken down into several rules in different tables. One rule with the original match in the original flow table, which set fte_id, do metering, and jump to the post_meter table. If there are more police actions, more rules are created for each of them. Besides, a last rule is created in the end. In post_meter table, there are two pre-defined rules, one is to drop packet if its packet color is RED, the other is to jump back to post_act table. As fte_id is updated before jumping, the rule for next meter is matched to do another round of metering (if there are multiple meters in the flow rule). Otherwise, last fte_id is matched and do the original actions. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Ariel Levkovich <lariel@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5e: Add flow_action to parse stateJianbo Liu3-3/+3
As a preparation for validating police action, adds flow_action to parse state, which is to passed to parsing callbacks. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5e: Add post meter table for flow meteringJianbo Liu7-3/+245
Flow meter object monitors the packets rate for the flows it is attached to, and color packets with GREEN or RED. The post meter table is used to check the color. Packet is dropped if it's RED, or forwarded to post_act table if GREEN. Packet color will be set to 8 LSB of the register C5, so they are reserved for metering, which are previously used for matching fte id. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Ariel Levkovich <lariel@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5e: Add generic macros to use metadata register mappingJianbo Liu5-10/+12
There are many definitions to get bits and mask for different types of metadata register mapping, add generic macros to unify them. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Ariel Levkovich <lariel@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5e: Get or put meter by the index of tc police actionJianbo Liu2-0/+226
Add functions to create and destroy flow meter aso object. This object only supports the range allocation. 64 objects are allocated at a time, and there are two meters in each object. Usually only one meter is allocated for a flow, so bitmap is used to manage these 128 meters. TC police action is mapped to hardware meter. As the index is unique for each police action, add APIs to allocate or free hardware meter by the index. If the meter is already created, increment its refcnt, otherwise create new one. If police action has different parameters, update hardware meter accordingly. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5e: Add support to modify hardware flow meter parametersJianbo Liu3-0/+192
The policing rate and burst from user are converted to flow meter parameters in hardware. These parameters are set or modified by ACCESS_ASO WQE, add function to support it. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Ariel Levkovich <lariel@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5e: Prepare for flow meter offload if hardware supports itJianbo Liu7-1/+129
If flow meter aso object is supported, set the allocated range, and initialize aso wqe. The allocated range is indicated by log_meter_aso_granularity in HW capabilities, and currently is 6. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Maor Dickman <maord@nvidia.com> Reviewed-by: Ariel Levkovich <lariel@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5: Implement interfaces to control ASO SQ and CQJianbo Liu2-0/+162
Add interfaces to use ASO object control channel. The channel consists of a control SQ and CQ to which user can post ACCESS_ASO work requests to modify ASO objects. The functions to get wqe from SQ, fill wqe, post the request, and poll the completion of the work, are provided. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Ariel Levkovich <lariel@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5: Add support to create SQ and CQ for ASOJianbo Liu3-1/+350
Add a separate API to create SQ and CQ for advanced steering operations (ASO). Since the mlx5_en API to create these resources is strongly coupled with netdev channels and datapath elements, this API provides an alternative for creating send queues that are used for ASO. Currently the API allows creating channels with 2 wqbbs only - meaning the support will be for a single ACCESS_ASO wqe with data at a time. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Ariel Levkovich <lariel@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5: E-switch: Change eswitch mode only via devlink commandChris Mi3-22/+15
Enable or disable switchdev according to the eswitch mode set by devlink command. So it is not changed by other functions anymore. Signed-off-by: Chris Mi <cmi@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5: E-switch, Remove dependency between sriov and eswitch modeChris Mi8-83/+89
Currently, there are three eswitch modes, none, legacy and switchdev. None is the default mode. Remove redundant none mode as eswitch mode should always be either legacy mode or switchdev mode. With this patch, there are two behavior changes: 1. Legacy becomes the default mode. When querying eswitch mode using devlink, a valid mode is always returned. 2. When disabling sriov, the eswitch mode will not change, only vfs are unloaded. Signed-off-by: Chris Mi <cmi@nvidia.com> Reviewed-by: Maor Dickman <maord@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5: E-switch, Introduce flag to indicate if fdb table is createdChris Mi2-0/+12
Introduce flag to indicate if fdb table is created as a pre-step to prepare for removing dependency between sriov and eswitch mode in the downstream patches. Signed-off-by: Chris Mi <cmi@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5: E-switch, Introduce flag to indicate if vport acl namespace is createdChris Mi2-0/+6
Eswitch vport acl namespace is needed when loading vfs. There is no need to free and reallocate it when switching eswitch mode. Introduce flag to indicate if it is created or not. When needed, create it. Only free it when the driver is unloaded or in bare metal mode. Signed-off-by: Chris Mi <cmi@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5: delete dead code in mlx5_esw_unlock()Dan Carpenter1-2/+0
Smatch complains about this function: drivers/net/ethernet/mellanox/mlx5/core/eswitch.c:2000 mlx5_esw_unlock() warn: inconsistent returns '&esw->mode_lock'. Before commit ec2fa47d7b98 ("net/mlx5: Lag, use lag lock") there used to be a matching mlx5_esw_lock() function and the lock and unlock functions were symmetric. But now we take the lock unconditionally and must unlock unconditionally as well. As near as I can tell this is dead code and can just be deleted. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02net/mlx5: Delete ipsec_fs header file as not usedLeon Romanovsky1-21/+0
ipsec_fs.h is not used and can be safely deleted. Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-07-02Merge tag 'nfsd-5.19-2' of ↵Linus Torvalds2-2/+3
git://git.kernel.org/pub/scm/linux/kernel/git/cel/linux Pull nfsd fixes from Chuck Lever: "Notable regression fixes: - Fix NFSD crash during NFSv4.2 READ_PLUS operation - Fix incorrect status code returned by COMMIT operation" * tag 'nfsd-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/cel/linux: SUNRPC: Fix READ_PLUS crasher NFSD: restore EINVAL error translation in nfsd_commit()
2022-07-02Merge tag 'for-5.19/parisc-4' of ↵Linus Torvalds2-1/+6
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc architecture fixes from Helge Deller: "Two important fixes for bugs in code which was added in 5.18: - Fix userspace signal failures on 32-bit kernel due to a bug in vDSO - Fix 32-bit load-word unalignment exception handler which returned wrong values" * tag 'for-5.19/parisc-4' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Fix vDSO signal breakage on 32-bit kernel parisc/unaligned: Fix emulate_ldw() breakage
2022-07-02parisc: Fix vDSO signal breakage on 32-bit kernelHelge Deller1-0/+5
Addition of vDSO support for parisc in kernel v5.18 suddenly broke glibc signal testcases on a 32-bit kernel. The trampoline code (sigtramp.S) which is mapped into userspace includes an offset to the context data on the stack, which is used by gdb and glibc to get access to registers. In a 32-bit kernel we used by mistake the offset into the compat context (which is valid on a 64-bit kernel only) instead of the offset into the "native" 32-bit context. Reported-by: John David Anglin <dave.anglin@bell.net> Tested-by: John David Anglin <dave.anglin@bell.net> Fixes: df24e1783e6e ("parisc: Add vDSO support") CC: stable@vger.kernel.org # 5.18 Signed-off-by: Helge Deller <deller@gmx.de>
2022-07-02Merge tag 'perf-tools-fixes-for-v5.19-2022-07-02' of ↵Linus Torvalds9-17/+134
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux Pull perf tools fixes from Arnaldo Carvalho de Melo: - BPF program info linear (BPIL) data is accessed assuming 64-bit alignment resulting in undefined behavior as the data is just byte aligned. Fix it, Found using -fsanitize=undefined. - Fix 'perf offcpu' build on old kernels wrt task_struct's state/__state field. - Fix perf_event_attr.sample_type setting on the 'offcpu-time' event synthesized by the 'perf offcpu' tool. - Don't bail out when synthesizing PERF_RECORD_ events for pre-existing threads when one goes away while parsing its procfs entries. - Don't sort the task scan result from /proc, its not needed and introduces bugs when the main thread isn't the first one to be processed. - Fix uninitialized 'offset' variable on aarch64 in the unwind code. - Sync KVM headers with the kernel sources. * tag 'perf-tools-fixes-for-v5.19-2022-07-02' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux: perf synthetic-events: Ignore dead threads during event synthesis perf synthetic-events: Don't sort the task scan result from /proc perf unwind: Fix unitialized 'offset' variable on aarch64 tools headers UAPI: Sync linux/kvm.h with the kernel sources perf bpf: 8 byte align bpil data tools kvm headers arm64: Update KVM headers from the kernel sources perf offcpu: Accept allowed sample types only perf offcpu: Fix build failure on old kernels
2022-07-02Merge tag 'powerpc-5.19-4' of ↵Linus Torvalds7-16/+52
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: - Fix BPF uapi confusion about the correct type of bpf_user_pt_regs_t. - Fix virt_addr_valid() when memory is hotplugged above the boot-time high_memory value. - Fix a bug in 64-bit Book3E map_kernel_page() which would incorrectly allocate a PMD page at PUD level. - Fix a couple of minor issues found since we enabled KASAN for 64-bit Book3S. Thanks to Aneesh Kumar K.V, Cédric Le Goater, Christophe Leroy, Kefeng Wang, Liam Howlett, Nathan Lynch, and Naveen N. Rao. * tag 'powerpc-5.19-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/memhotplug: Add add_pages override for PPC powerpc/bpf: Fix use of user_pt_regs in uapi powerpc/prom_init: Fix kernel config grep powerpc/book3e: Fix PUD allocation size in map_kernel_page() powerpc/xive/spapr: correct bitmap allocation size
2022-07-02MAINTAINERS: add Wenjia as SMC maintainerKarsten Graul1-0/+1
Add Wenjia as maintainer for Shared Memory Communications (SMC) Sockets. Acked-by: Wenjia Zhang <wenjia@linux.ibm.com> Acked-by: Alexandra Winter <wintera@linux.ibm.com> Signed-off-by: Karsten Graul <kgraul@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02Merge branch 'lan937x-dsa-driver'David S. Miller16-25/+1143
Arun Ramadoss says: ==================== net: dsa: microchip: DSA Driver support for LAN937x LAN937x is a Multi-Port 100BASE-T1 Ethernet Physical Layer switch compliant with the IEEE 802.3bw-2015 specification. The device provides 100 Mbit/s transmit and receive capability over a single Unshielded Twisted Pair (UTP) cable. LAN937x is successive revision of KSZ series switch. This series of patches provide the DSA driver support for Microchip LAN937X switch through MII/RMII interface. The RGMII interface support will be added in the follow up series. LAN937x uses the most of functionality of KSZ9477. The LAN937x switch series family consists of following SKUs: LAN9370: - 4 T1 Phys - 1 RGMII port LAN9371: - 3 T1 Phys & 1 TX Phy - 2 RGMII ports LAN9372: - 5 T1 Phys & 1 TX Phy - 2 RGMII ports LAN9373: - 5 T1 Phys - 2 RGMII - 1 SGMII port LAN9374: - 6 T1 Phys - 2 RGMII ports Changes in v15: - fixed compilation issue. - Updated the phylink_mac_link_up to check only for 10/100/1000 speed. Changes in v14: - Updated the patch series to latest ksz code refactoring. - RGMII register configuration is removed from the series. It will be added in the follow up patch series. Changes in v13: - Fixed the compilation issue in patch 5 and 6 Changes in v12: - Removed the reduntant spi indirect enable in lan937x_init - Used the ksz_port_stp_state_set function - Apply rgmii internal delay only if it is rgmii port - Set the bit for 100baseTx in phylink_get_caps - Moved the ethtool related API from patch 5 to 7 - Moved lan_alu_entry struct in lan937x_dev.h from patch 5 to 9 - Moved lan_vlan_entry in lan937x_dev.h from patch 5 to 10 - Used the ksz_get_stats64 function for get_stats64 hook - Splitted the patch 5. one for port configuration, spi driver, phy read & write and mtu configuration. - Updated the indentation in ethernet-controller.yaml - lan937x.yaml: Removed the blank lines, updated the ethernet handle to macb0. Added the rgmii internal delay only for the ports. Changes in v11: - Tagged as RFC to get the feedback for the subpatches 1/10, 5/10 and 6/10 Changes in v10: - dsa.yaml: dropped moving mdio properties to dsa.yaml as per the feedback https://patchwork.kernel.org/project/netdevbpf/patch/20220318085540.281721-3-prasanna.vengateshan@microchip.com/#24787466 - microchip,lan937x.yaml: Naming convention changes in the example - lan937x_main.c: Moving configurations from lan937x_reset_switch() to setup() - lan937x_main.c: helper function has been introduced for lan937x_internal_phy_read & write - lan937x_dev.h: lan_alu_struct struct data type changes - lan937x_main.c: lan937x_get_stats64 make non blocking - lan937x_main.c: modified lan937x_port_mirror_add to include extack Changes in v9: - lan937x_main.c: of_node_put() correction in lan937x_parse_dt_rgmii_delay - lan937x_dev.c: removed the interface checks from lan937x_apply_rgmii_delay. - changes in ethernet-controller.yaml and dsa.yaml Changes in v8: - lan937x_dev.c: fixed lan937x_r_mib_pkt warning in the sub patches - lan937x_main.c: phylink_autoneg_inband() check removed in lan937x_phylink_mac_link_up() - lan937x_main.c: made legacy_pre_march2020 = false as this is non-legacy driver and indentation correction in lan937x_phylink_mac_link_up() - removed unnecessary parenthesis in lan937x_get_strings() Changes in v7: - microchip,lan937x.yaml: *-internal-delay-ps enum values & commit messages corrections - lan937x_main.c: removed phylink_validate() and added phylink_get_caps() - lan937x_main.c: added support for ethtool standard stats (get_eth_*_stats and get_stats64) - lan937x_main.c: removed unnecessary PVID read from lan937x_port_vlan_del() - integrated the changes of ksz9477 multi bridging support to lan937x dev and tested both multi bridging and STP - lan937x_port_vlan_del - dummy pvid read removed Changes in v6: - microchip_t1.c: There was new merge done in the net-next tree for microchip_1.c after the v5 submission. Hence rebased it for v6. Changes in v5: - microchip,lan937x.yaml: Added mdio properties detail - microchip,lan937x.yaml: *-internal-delay-ps added under port node - lan937x_dev.c: changed devm_mdiobus_alloc from of_mdiobus_register as suggested by Vladimir - lan937x_dev.c: added dev_info for rgmii internal delay & error message to user in case of out of range values - lan937x_dev.c: return -EOPNOTSUPP for C45 regnum values for lan937x_sw_mdio_read & write operations - return from function with out storing in a variable - lan937x_main.c: Added vlan_enable info in vlan_filtering API - lan937x_main.c: lan937x_port_vlan_del: removed unintended PVID write Changes in v4: - tag_ksz.c: cpu_to_be16 to put_unaligned_be16 - correct spacing in comments - tag_ksz.c: NETIF_F_HW_CSUM fix is integrated - lan937x_dev.c: mdio_np is removed from global and handled locally - lan937x_dev.c: unused functions removed lan937x_cfg32 & lan937x_port_cfg32 - lan937x_dev.c: lan937x_is_internal_100BTX_phy_port function name changes - lan937x_dev.c: RGMII internal delay handling for MAC. Delay values are retrieved from DTS and updated - lan937x_dev.c: corrected mutex operations for few dev variables - microchip,lan937x.yaml: introduced rx-internal-delay-ps & tx-internal-delay-ps for RGMII internal delay - lan937x_dev.c: Unnecessary mutex_lock has been removed - lan937x_main.c: PHY_INTERFACE_MODE_NA handling for lan937x_phylink_validate - lan937x_main.c: PORT_MIRROR_SNIFFER check in right place - lan937x_main.c: memset is used instead of writing 0's individually in lan937x_port_fdb_add function - lan937x_main.c: Removed \n from NL_SET_ERR_MSG_MOD calls Changes in v3: - Removed settings of cnt_ptr to zero and the memset() added a cleanup patch which moves this into ksz_init_mib_timer(). - Used ret everywhere instead of rc - microchip,lan937x.yaml: Remove mdio compatible - microchip_t1.c: Renaming standard phy registers - tag_ksz.c: LAN937X_TAIL_TAG_OVERRIDE renaming LAN937X_TAIL_TAG_BLOCKING_OVERRIDE - tag_ksz.c: Changed Ingress and Egress naming convention based on Host - tag_ksz.c: converted to skb_mac_header(skb) from (is_link_local_ether_addr(hdr->h_dest)) - lan937x_dev.c: Removed BCAST Storm protection settings since we have Tc commands for them - lan937x_dev.c: Flow control setting in lan937x_port_setup function - lan937x_dev.c: RGMII internal delay added only for cpu port, - lan937x_dev.c: of_get_compatible_child(node, "microchip,lan937x-mdio") to of_get_child_by_name(node, "mdio"); - lan937x_dev.c:lan937x_get_interface API: returned PHY_INTERFACE_MODE_INTERNAL instead of PHY_INTERFACE_MODE_NA - lan937x_main.c: Removed compat interface implementation in lan937x_config_cpu_port() API & dev_info corrected as well - lan937x_main.c: deleted ds->configure_vlan_while_not_filtering = true - lan937x_main.c: Added explanation for lan937x_setup lines - lan937x_main.c: FR_MAX_SIZE correction in lan937x_get_max_mtu API - lan937x_main.c: removed lan937x_port_bridge_flags dummy functions - lan937x_spi.c - mdiobus_unregister to be added to spi_remove function - lan937x_main.c: phy link layer changes - lan937x_main.c: port mirroring: sniff port selection limiting to one port - lan937x_main.c: Changed to global vlan filtering - lan937x_main.c: vlan_table array to structure - lan937x_main.c -Use extack instead of reporting errors to Console - lan937x_main.c - Remove cpu_port addition in vlan_add api - lan937x_main.c - removed pvid resetting Changes in v2: - return check for register read/writes - dt compatible compatible check is added against chip id value - lan937x_internal_t1_tx_phy_write() is renamed to lan937x_internal_phy_write() - lan937x_is_internal_tx_phy_port is renamed to lan937x_is_internal_100BTX_phy_port as it is 100Base-Tx phy - Return value for lan937x_internal_phy_write() is -EOPNOTSUPP in case of failures - Return value for lan937x_internal_phy_read() is 0xffff for non existent phy - cpu_port checking is removed from lan937x_port_stp_state_set() - lan937x_phy_link_validate: 100baseT_Full to 100baseT1_Full - T1 Phy driver is moved to drivers/net/phy/microchip_t1.c - Tx phy driver support will be added later - Legacy switch checkings in dts file are removed. - tag_ksz.c: Re-used ksz9477_rcv for lan937x_rcv - tag_ksz.c: Xmit() & rcv() Comments are corrected w.r.to host - net/dsa/Kconfig: Family skew numbers altered in ascending order - microchip,lan937x.yaml: eth is replaced with ethernet - microchip,lan937x.yaml: spi1 is replaced with spi - microchip,lan937x.yaml: cpu labelling is removed - microchip,lan937x.yaml: port@x value will match the reg value now ====================
2022-07-02net: dsa: microchip: add LAN937x in the ksz spi probeArun Ramadoss1-0/+26
This patch add the LAN937x part support in the existing ksz_spi_probe. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add phylink_mac_config supportArun Ramadoss4-2/+74
This patch add support for phylink_mac_config dsa hook. It configures the mac for MII/RMII modes. The RGMII mode will be added in the future patches. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add phylink_mac_link_up supportArun Ramadoss5-0/+82
This patch add support for phylink_mac_link_up. It configures the mac for the speed, flow control and duplex mode. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add phylink_get_caps supportArun Ramadoss3-0/+15
The internal phy of the LAN937x are capable of 100Mbps Full duplex. The xMII port of switch is capable of 10Mbps Full & Half Duplex, 100Mbps Full & Half Duplex and 1000Mbps Half duplex. xMII port also supports Tx and Rx Flow control. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add MTU and fast_age supportArun Ramadoss4-0/+36
This patch add the support for port_max_mtu, port_change_mtu and port_fast_age dsa functionality. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: register mdio-busArun Ramadoss1-0/+74
This patch register mdio-bus for the lan937x series switch. mdio read and write uses the vphy for accessing the phy register. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add phy read and write supportArun Ramadoss4-0/+156
This patch add support for the writing and reading of the phy registers. LAN937x uses the Vphy indirect addressing method for accessing the phys. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: lan937x: add dsa_tag_protocolArun Ramadoss2-0/+12
This patch update the ksz_get_tag_protocol to return LAN937x specific tag if the chip id matches one of LAN937x series switch Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: add DSA support for microchip LAN937xArun Ramadoss6-1/+333
Basic DSA driver support for lan937x and the device will be configured through SPI interface. It adds the lan937x_dev_ops in ksz_common.c file and tries to reuse the functionality of ksz9477 series switch. drivers/net/dsa/microchip/ path is already part of MAINTAINERS & the new files come under this path. Hence no update needed to the MAINTAINERS Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: microchip: generic access to ksz9477 static and reserved tableArun Ramadoss4-10/+58
The ksz9477 and lan937x has few difference in the static and reserved table register 0x041C. For the ksz9477 if the bit 0 is 1 - read operation and 0 - write operation. But for lan937x bit 1:0 used for selecting the read/write operation, 01 - write and 10 - read. To use ksz9477 mdb add/del and enable_stp_addr for the lan937x, masks & shifts are introduced for ksz9477 & lan937x in ksz_common.c. Then updated the function with masks & shifts based on the switch instead of hard coding it. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: dsa: tag_ksz: add tag handling for Microchip LAN937xPrasanna Vengateshan3-2/+63
The Microchip LAN937X switches have a tagging protocol which is very similar to KSZ tagging. So that the implementation is added to tag_ksz.c and reused common APIs Signed-off-by: Prasanna Vengateshan <prasanna.vengateshan@microchip.com> Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02dt-bindings: net: dsa: dt bindings for microchip lan937xPrasanna Vengateshan2-0/+193
Documentation in .yaml format and updates to the MAINTAINERS Also 'make dt_binding_check' is passed. RGMII internal delay values for the mac is retrieved from rx-internal-delay-ps & tx-internal-delay-ps as per the feedback from v3 patch series. https://lore.kernel.org/netdev/20210802121550.gqgbipqdvp5x76ii@skbuf/ It supports only the delay value of 0ns and 2ns. Signed-off-by: Prasanna Vengateshan <prasanna.vengateshan@microchip.com> Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02dt-bindings: net: make internal-delay-ps based on phy-modePrasanna Vengateshan1-12/+23
*-internal-delay-ps properties would be applicable only for RGMII interface modes. It is changed as per the request. Ran dt_binding_check to confirm nothing is broken. link: https://lore.kernel.org/netdev/d8e5f6a8-a7e1-dabd-f4b4-ea8ea21d0a1d@gmail.com/ Signed-off-by: Prasanna Vengateshan <prasanna.vengateshan@microchip.com> Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02Merge branch 'lan8814-led'David S. Miller2-17/+57
Divya Koppera says: ==================== net: LED feature for LAN8814 PHY Enable LED mode configuration for LAN8814 PHY v2 -> v3: - Fixed compilation issues v1 -> v2: - Updated dt-bindings for micrel,led-mode in LAN8814 PHY ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: phy: micrel: Adding LED feature for LAN8814 PHYDivya Koppera1-17/+56
LED support for extended mode where LED 1: Enhanced Mode 5 (10M/1000M/Activity) LED 2: Enhanced Mode 4 (100M/1000M/Activity) By default it supports KSZ9031 LED mode Signed-off-by: Divya Koppera <Divya.Koppera@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02dt-bindings: net: Updated micrel,led-mode for LAN8814 PHYDivya Koppera1-0/+1
Enable led-mode configuration for LAN8814 phy Signed-off-by: Divya Koppera <Divya.Koppera@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02net: add skb_[inner_]tcp_all_headers helpersEric Dumazet48-115/+119
Most drivers use "skb_transport_offset(skb) + tcp_hdrlen(skb)" to compute headers length for a TCP packet, but others use more convoluted (but equivalent) ways. Add skb_tcp_all_headers() and skb_inner_tcp_all_headers() helpers to harmonize this a bit. Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-02perf synthetic-events: Ignore dead threads during event synthesisNamhyung Kim1-2/+3
When it synthesize various task events, it scans the list of task first and then accesses later. There's a window threads can die between the two and proc entries may not be available. Instead of bailing out, we can ignore that thread and move on. Signed-off-by: Namhyung Kim <namhyung@kernel.org> Acked-by: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lore.kernel.org/lkml/20220701205458.985106-2-namhyung@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-07-02perf synthetic-events: Don't sort the task scan result from /procNamhyung Kim1-2/+2
It should not sort the result as procfs already returns a proper ordering of tasks. Actually sorting the order caused problems that it doesn't guararantee to process the main thread first. Signed-off-by: Namhyung Kim <namhyung@kernel.org> Acked-by: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lore.kernel.org/lkml/20220701205458.985106-1-namhyung@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-07-02perf unwind: Fix unitialized 'offset' variable on aarch64Ivan Babrou1-1/+1
Commit dc2cf4ca866f5715 ("perf unwind: Fix segbase for ld.lld linked objects") uncovered the following issue on aarch64: util/unwind-libunwind-local.c: In function 'find_proc_info': util/unwind-libunwind-local.c:386:28: error: 'offset' may be used uninitialized in this function [-Werror=maybe-uninitialized] 386 | if (ofs > 0) { | ^ util/unwind-libunwind-local.c:199:22: note: 'offset' was declared here 199 | u64 address, offset; | ^~~~~~ util/unwind-libunwind-local.c:371:20: error: 'offset' may be used uninitialized in this function [-Werror=maybe-uninitialized] 371 | if (ofs <= 0) { | ^ util/unwind-libunwind-local.c:199:22: note: 'offset' was declared here 199 | u64 address, offset; | ^~~~~~ util/unwind-libunwind-local.c:363:20: error: 'offset' may be used uninitialized in this function [-Werror=maybe-uninitialized] 363 | if (ofs <= 0) { | ^ util/unwind-libunwind-local.c:199:22: note: 'offset' was declared here 199 | u64 address, offset; | ^~~~~~ In file included from util/libunwind/arm64.c:37: Fixes: dc2cf4ca866f5715 ("perf unwind: Fix segbase for ld.lld linked objects") Signed-off-by: Ivan Babrou <ivan@cloudflare.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Fangrui Song <maskray@google.com> Cc: Ian Rogers <irogers@google.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: kernel-team@cloudflare.com Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lore.kernel.org/lkml/20220701182046.12589-1-ivan@cloudflare.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-07-02selftests/net: fix section name when using xdp_dummy.oHangbin Liu5-7/+7
Since commit 8fffa0e3451a ("selftests/bpf: Normalize XDP section names in selftests") the xdp_dummy.o's section name has changed to xdp. But some tests are still using "section xdp_dummy", which make the tests failed. Fix them by updating to the new section name. Fixes: 8fffa0e3451a ("selftests/bpf: Normalize XDP section names in selftests") Signed-off-by: Hangbin Liu <liuhangbin@gmail.com> Acked-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/r/20220630062228.3453016-1-liuhangbin@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-07-02qlogic/qed: fix repeated words in commentsJilin Yuan1-1/+1
Delete the redundant word 'a'. Signed-off-by: Jilin Yuan <yuanjilin@cdjrlc.com> Link: https://lore.kernel.org/r/20220630123924.7531-1-yuanjilin@cdjrlc.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-26 18:21:18 +0300