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2018-12-17Merge tag 'usb-ci-v4.21-rc1' of ↵Greg Kroah-Hartman6-34/+455
git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb into usb-next Peter writes: - Improve the over-current handling for imx - Add the HSIC support for imx * tag 'usb-ci-v4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb: usb: chipidea: imx: allow to configure oc polarity on i.MX25 usb: chipidea: imx: Warn if oc polarity isn't specified usb: chipidea: imx: support configuring for active low oc signal doc: usb: ci-hdrc-usb2: Add pinctrl properties for HSIC pin groups usb: chipidea: host: override ehci->hub_control usb: chipidea: imx: add HSIC support usb: chipidea: add flag for imx hsic implementation
2018-12-12usb: renesas_usbhs: mark PM functions as __maybe_unusedArnd Bergmann1-2/+2
Without CONFIG_PM, we get a new build warning here: drivers/usb/renesas_usbhs/common.c:860:12: error: 'usbhsc_resume' defined but not used [-Werror=unused-function] static int usbhsc_resume(struct device *dev) ^~~~~~~~~~~~~ drivers/usb/renesas_usbhs/common.c:844:12: error: 'usbhsc_suspend' defined but not used [-Werror=unused-function] static int usbhsc_suspend(struct device *dev) ^~~~~~~~~~~~~~ Fixes: d54d334e75b9 ("usb: renesas_usbhs: Use SIMPLE_DEV_PM_OPS macro") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-12-12usb: core: Remove unnecessary memset()Suwan Kim1-2/+0
register_root_hub() calls memset() setting usb_dev->bus->devmap. devicemap to 0 during hcd probe function (usb_hcd_pci_probe). But in previous function which is also the procedure of usb_hcd_pci_probe(), usb_bus_init() already initialized bus->devmap calling memset(). Furthermore, register_root_hub() is called only once in kernel. So, calling memset() which resets usb_bus->devmap.devicemap in register_root_hub() is redundant. Signed-off-by: Suwan Kim <suwan.kim027@gmail.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-12-12usb: host: isp1362-hcd: convert to DEFINE_SHOW_ATTRIBUTEYangtao Li1-13/+3
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-12-12Merge tag 'usb-for-v4.21' of ↵Greg Kroah-Hartman25-239/+775
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next Felipe writes: USB changes for v4.21 So it looks like folks are interested in dwc3 again. Almost 64% of the changes are in dwc3 this time around with some other bits in gadget functions and dwc2. There are two important parts here: a. removal of the waitqueue from dwc3's dequeue implementation, which will guarantee that gadget functions can dequeue from any context and; b. better method for starting isochronous transfers to avoid, as much as possible, missed isoc frames. Apart from these, we have the usual set of non-critical fixes and new features all over the place. * tag 'usb-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (56 commits) usb: dwc2: Fix disable all EP's on disconnect usb: dwc3: gadget: Disable CSP for stream OUT ep usb: dwc2: disable power_down on Amlogic devices Revert "usb: dwc3: pci: Use devm functions to get the phy GPIOs" USB: gadget: udc: s3c2410_udc: convert to DEFINE_SHOW_ATTRIBUTE usb: mtu3: fix dbginfo in qmu_tx_zlp_error_handler usb: dwc3: trace: add missing break statement to make compiler happy usb: dwc3: gadget: Report isoc transfer frame number usb: gadget: Introduce frame_number to usb_request usb: renesas_usbhs: Use SIMPLE_DEV_PM_OPS macro usb: renesas_usbhs: Remove dummy runtime PM callbacks usb: dwc2: host: use hrtimer for NAK retries usb: mtu3: clear SOFTCONN when clear USB3_EN if work as HS mode usb: mtu3: enable SETUPENDISR interrupt usb: mtu3: fix the issue about SetFeature(U1/U2_Enable) usb: mtu3: enable hardware remote wakeup from L1 automatically usb: mtu3: remove QMU checksum usb/mtu3: power down device ip at setup usb: dwc2: Disable power down feature on Samsung SoCs usb: dwc3: Correct the logic for checking TRB full in __dwc3_prepare_one_trb() ...
2018-12-12Merge tag 'phy-for-4.21_v1' of ↵Greg Kroah-Hartman43-162/+2000
git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next Kishon writes: phy: for 4.21 *) Change phy set_mode ops to take both mode and setmode as arguments *) Add phy_configure() and phy_validate() API's mostly used for MIPI D-PHY *) Add helpers to get default values of parameters define in MIPI D-PHY spec *) Add driver for TI's CPSW Port PHY Interface Mode selection *) Add driver for Cadence Sierra PHY used with USB and PCIe *) Add driver for Freescale i.MX8MQ USB3 PHY *) Fixes QMP PHY bindings to allow the clocks provided by the PHY to be pointed at in device tree *) Fix for using fully specified regions (in device tree) for configuring the second lane in dual lane PHYs in QMP PHY *) Add support for Allwinner H6 USB2 PHY in phy-sun4i-usb driver *) Update phy-rcar-gen3-usb driver to follow the hardware manual *) Add support for fine grained power management in mapphone-mdm6600 driver Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> * tag 'phy-for-4.21_v1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (30 commits) phy: qcom-qmp: Expose provided clocks to DT dt-bindings: phy-qcom-qmp: Move #clock-cells to child phy: qcom-qmp: Utilize fully-specified DT registers dt-bindings: phy-qcom-qmp: Fix register underspecification phy: ti: fix semicolon.cocci warnings phy: dphy: Add configuration helpers phy: Add MIPI D-PHY configuration options phy: Add configuration interface phy: Add MIPI D-PHY mode phy: add driver for Freescale i.MX8MQ USB3 PHY dt-bindings: phy: add binding for Freescale i.MX8MQ USB3 PHY phy: Use of_node_name_eq for node name comparisons net: ethernet: ti: cpsw: add support for port interface mode selection phy dt-bindings: net: ti: cpsw: switch to use phy-gmii-sel phy phy: ti: introduce phy-gmii-sel driver dt-bindings: phy: add cpsw port interface mode selection phy bindings phy: mvebu-cp110-comphy: fix spelling in structure name phy: mapphone-mdm6600: Improve phy related runtime PM calls phy: renesas: rcar-gen3-usb2: follow the hardware manual procedure phy: cadence: Add driver for Sierra PHY ...
2018-12-12phy: qcom-qmp: Expose provided clocks to DTEvan Green1-1/+22
Register a simple clock provider for the PHY pipe clock sources so that device tree users can point at these clocks via phandles to the lane nodes. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Tested-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12dt-bindings: phy-qcom-qmp: Move #clock-cells to childEvan Green1-6/+5
The phy-qcom-qmp bindings specified #clock-cells as 1. This was never used because of_clk_add_provider() was never called, so there was no way anybody could reference these clocks from DT. Furthermore, even if they could be accessed, the bindings never specified what should go in that additional cell. Fix these incomplete and broken bindings. Move the #clock-cells into the child node, since that is the actual clock provider, and not all instances of qcom-qmp-phy are clock providers. Also set #clock-cells to zero, since there's nothing to pass to it. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: qcom-qmp: Utilize fully-specified DT registersEvan Green1-13/+38
Utilize the newly fixed up DT bindings to get the tx2 and rx2 register regions for the second lane of dual-lane PHYs. Before this change, the driver was simply using lane one's register region and adding 0x400, which reached well beyond the DT-specified register allocation. This would have been a crash were it not for the page size on ARM64. Fix the driver not to rely on the magic of virtual memory by using the newly specified DT register regions for tx2 and rx2. In order to support existing device trees, this change also contains a fallback mode for when those new register regions don't exist, which reverts to the original behavior of overreaching and prints a complaint. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12dt-bindings: phy-qcom-qmp: Fix register underspecificationEvan Green1-8/+62
Add register regions for the second lane of dual-lane nodes. This additional specification is needed so that the driver can stop reaching beyond the tx and rx register allocations to get at the second lane registers in a dual-lane PHY. While in there, document #clock-cells as optional for PHYs that don't provide a pipe clock. Also, document the pcs_misc register region, which was being quietly supplied and used. Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: ti: fix semicolon.cocci warningskbuild test robot1-1/+1
drivers/phy/ti/phy-gmii-sel.c:91:2-3: Unneeded semicolon Remove unneeded semicolon. Generated by: scripts/coccinelle/misc/semicolon.cocci Fixes: 1811851f4e73 ("phy: ti: introduce phy-gmii-sel driver") CC: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: dphy: Add configuration helpersMaxime Ripard4-0/+181
The MIPI D-PHY spec defines default values and boundaries for most of the parameters it defines. Introduce helpers to help drivers get meaningful values based on their current parameters, and validate the boundaries of these parameters if needed. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: Add MIPI D-PHY configuration optionsMaxime Ripard2-0/+285
Now that we have some infrastructure for it, allow the MIPI D-PHY phy's to be configured through the generic functions through a custom structure added to the generic union. The parameters added here are the ones defined in the MIPI D-PHY spec, plus the number of lanes in use. The current set of parameters should cover all the potential users. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: Add configuration interfaceMaxime Ripard2-0/+122
The phy framework is only allowing to configure the power state of the PHY using the init and power_on hooks, and their power_off and exit counterparts. While it works for most, simple, PHYs supported so far, some more advanced PHYs need some configuration depending on runtime parameters. These PHYs have been supported by a number of means already, often by using ad-hoc drivers in their consumer drivers. That doesn't work too well however, when a consumer device needs to deal with multiple PHYs, or when multiple consumers need to deal with the same PHY (a DSI driver and a CSI driver for example). So we'll add a new interface, through two funtions, phy_validate and phy_configure. The first one will allow to check that a current configuration, for a given mode, is applicable. It will also allow the PHY driver to tune the settings given as parameters as it sees fit. phy_configure will actually apply that configuration in the phy itself. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: Add MIPI D-PHY modeMaxime Ripard1-0/+1
MIPI D-PHY is a MIPI standard meant mostly for display and cameras in embedded systems. Add a mode for it. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: add driver for Freescale i.MX8MQ USB3 PHYLi Jun5-0/+135
This is a cleaned up port of the downstream i.MX8MQ USB3 PHY driver. Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12dt-bindings: phy: add binding for Freescale i.MX8MQ USB3 PHYLucas Stach1-0/+17
This adds the binding for the USB3 PHY found on the i.MX8M SoC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: Use of_node_name_eq for node name comparisonsRob Herring2-5/+5
Convert string compares of DT node names to use of_node_name_eq helper instead. This removes direct access to the node name pointer. For instances using of_node_cmp, this has the side effect of now using case sensitive comparisons. This should not matter for any FDT based system which all of these are. Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Heiko Stuebner <heiko@sntech.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12net: ethernet: ti: cpsw: add support for port interface mode selection phyGrygorii Strashko1-1/+18
Add support for port interface mode selection phy (phy-gmii-sel): - try to request interface mode selection phy from Port DT node and fail silently if not defined and old CONFIG_TI_CPSW_PHY_SEL driver enabled. - use new phy if requested successfully. Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12dt-bindings: net: ti: cpsw: switch to use phy-gmii-sel phyGrygorii Strashko1-1/+7
The cpsw-phy-sel driver was replaced with new PHY driver phy-gmii-sel, so deprecate cpsw-phy-sel bindings and update CPSW binding to use phy-gmii-sel PHY bindings. Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: ti: introduce phy-gmii-sel driverGrygorii Strashko3-0/+360
TI am335x/am437x/dra7(am5)/dm814x CPSW3G Ethernet Subsystem supports two 10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII interfaces. The interface mode is selected by configuring the MII mode selection register(s) (GMII_SEL) in the System Control Module chapter (SCM). GMII_SEL register(s) and bit fields placement in SCM are different between SoCs while fields meaning is the same. Historically CPSW external Port's interface mode selection configuration was introduced using custom API and driver cpsw-phy-sel.c. This leads to unnecessary driver, DT binding and custom API support effort. This patch introduces CPSW Port's PHY Interface Mode selection Driver (phy-gmii-sel) which implements standard Linux PHY interface and used as a replacement for TI's specific driver cpsw-phy-sel.c and corresponding custom API. Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12dt-bindings: phy: add cpsw port interface mode selection phy bindingsGrygorii Strashko1-0/+68
Add CPSW Port's Interface Mode Selection PHY (phy-gmii-sel) DT Bindings Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: mvebu-cp110-comphy: fix spelling in structure nameMiquel Raynal1-2/+2
Rename the mvebu_comhy_conf structure to be mvebu_comphy_conf, which is probably what the original author meant. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: mapphone-mdm6600: Improve phy related runtime PM callsTony Lindgren1-20/+51
I noticed that phy_pm_runtime_get_sync() and phy_pm_runtime_put() are not currently doing anything for phy-mapphone-mdm6600, only the sysfs interface for works for "auto" and "on". This is because of the shared GPIO pins between mdm6600 USB port and n_gsm port. We have not enabled runtime PM for the phy driver until after we've booted up mdm6600 properly to the USB mode. Otherwise phy_create() would have called pm_runtime_enable() and pm_runtime_no_callbacks() automatically on init. Let's fix this by registering the phy a bit later after we've powered up the mdm6600 USB port. And as the PM runtime support is only needed for the n_gsm mode and not for USB, we can allow the device to idle between phy_mdm6600_power_on() and phy_mdm6600_power_off(). Note that for suspend, runtime_pm is already disabled for the phy so we need to check for pm_runtime_enabled(). Cc: Johan Hovold <jhovold@gmail.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Sebastian Reichel <sre@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: renesas: rcar-gen3-usb2: follow the hardware manual procedureYoshihiro Shimoda1-6/+11
This patch modifies rcar_gen3_init_otg() procedure to follow Figure 73.4 of "R-Car Series, 3rd Generation User's Manual: Hardware Rev.1.00". Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: cadence: Add driver for Sierra PHYAlan Douglas3-1/+404
Add a Sierra PHY driver with PCIe and USB support. The PHY has multiple lanes, which can be configured into groups, and a generic PHY device is created for each group. There are two resets controlling the overall PHY block, one to enable the APB interface for programming registers, and another to enable the PHY itself. Additionally there are resets for each PHY lane. The PHY can be configured in hardware to read register settings from ROM, or they can be written by the driver. The sequence of operation on startup is to enable the APB bus, write the PHY registers (if required) for each lane group, and then enable the PHY. Each group of lanes can then be individually controlled using the power_on()/ power_off() function for that generic PHY Signed-off-by: Alan Douglas <adouglas@cadence.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12dt-bindings: phy: Document cadence Sierra PHY bindingsAlan Douglas1-0/+67
Add DT binding documentation for Sierra PHY. The PHY supports a number of different protocols, including PCIe and USB. The PHY lanes may be configured as single or multi-lane links. Each link is treated as a separate sub-node. For example, if there are 4 lanes in total the first 2 might be configured as a multi-lane PCIe link while the other two are single lane USB links, and in this case there would be 3 sub-nodes. There are two resets for the PHY block (one for APB register access, one for the PHY link) and separate resets for each link. For multi-lane links, the reset corresponds to the reset line on the master lane, the resets on other lanes have no effect. Signed-off-by: Alan Douglas <adouglas@cadence.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: core: clean up unused ethernet specific phy modesGrygorii Strashko1-4/+0
After recent changes PHY_MODE_SGMII, PHY_MODE_2500SGMII, PHY_MODE_QSGMII, PHY_MODE_10GKR are not used any more and can be removed. Hence - remove them. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: mvebu-cp110-comphy: convert to use eth phy mode and submodeGrygorii Strashko2-56/+53
Convert mvebu-cp110-comphy PHY driver to use recently introduced PHY_MODE_ETHERNET and phy_set_mode_ext(). Cc: Russell King - ARM Linux <linux@armlinux.org.uk> Cc: Maxime Chevallier <maxime.chevallier@bootlin.com> Cc: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: ocelot-serdes: convert to use eth phy mode and submodeGrygorii Strashko2-13/+18
Convert ocelot-serdes PHY driver to use recently introduced PHY_MODE_ETHERNET and phy_set_mode_ext(). Cc: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Quentin Schulz <quentin.schulz@bootlin.com> Tested-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: core: add PHY_MODE_ETHERNETGrygorii Strashko1-0/+1
Add new PHY's mode to be used by Ethernet PHY interface drivers or multipurpose PHYs like serdes. It will be reused in further changes. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: core: rework phy_set_mode to accept phy mode and submodeGrygorii Strashko16-22/+39
Currently the attempt to add support for Ethernet interface mode PHY (MII/GMII/RGMII) will lead to the necessity of extending enum phy_mode and duplicate there values from phy_interface_t enum (or introduce more PHY callbacks) [1]. Both approaches are ineffective and would lead to fast bloating of enum phy_mode or struct phy_ops in the process of adding more PHYs for different subsystems which will make them unmaintainable. As discussed in [1] the solution could be to introduce dual level PHYs mode configuration - PHY mode and PHY submode. The PHY mode will define generic PHY type (subsystem - PCIE/ETHERNET/USB_) while the PHY submode - subsystem specific interface mode. The last is usually already defined in corresponding subsystem headers (phy_interface_t for Ethernet, enum usb_device_speed for USB). This patch is cumulative change which refactors PHY framework code to support dual level PHYs mode configuration - PHY mode and PHY submode. It extends .set_mode() callback to support additional parameter "int submode" and converts all corresponding PHY drivers to support new .set_mode() callback declaration. The new extended PHY API int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode) is introduced to support dual level PHYs mode configuration and existing phy_set_mode() API is converted to macros, so PHY framework consumers do not need to be changed (~21 matches). [1] http://lkml.kernel.org/r/d63588f6-9ab0-848a-5ad4-8073143bd95d@ti.com Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12MAINTAINERS: Add Kishon as maintainer of PHY bindingsRob Herring1-0/+1
DT bindings normally go in via subsystem maintainers, so add PHY bindings under generic PHY framework. Reported-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: sun4i-usb: add support for H6 USB2 PHYIcenowy Zheng1-2/+17
The USB 2.0 PHY on Allwinner H6 SoC is similar to older Allwinner SoCs, with some USB0 quirk like A83T and PHY index 1/2 missing. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12phy: sun4i-usb: add support for missing USB PHY indexIcenowy Zheng1-0/+7
The new Allwinner H6 SoC's USB2 PHY has two holes -- USB1 (which is a 3.0 port with dedicated PHY) and USB2 (which doesn't exist at all). Add support for this kind of missing USB PHY index. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12dt-bindings: phy: add binding for Allwinner H6 USB2 PHYIcenowy Zheng1-3/+5
The USB2.0 PHY on Allwinner H6 is similar to the ones on the ones on older SoCs, but with holes in PHY number (USB1 and USB2 are missing, in which USB1 is a USB3 PHY). Add binding for the PHY. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-11usb: dwc2: Fix disable all EP's on disconnectMinas Harutyunyan1-18/+23
Disabling all EP's allow to reset EP's to initial state. Introduced new function dwc2_hsotg_ep_disable_lock() which before calling dwc2_hsotg_ep_disable() function acquire hsotg->lock and release on exiting. From dwc2_hsotg_ep_disable() function removed acquiring hsotg->lock. In dwc2_hsotg_core_init_disconnected() function when USB reset interrupt asserted disabling all ep’s by dwc2_hsotg_ep_disable() function. This updates eliminating sparse imbalance warnings. Reverted changes in dwc2_hostg_disconnect() function. Introduced new function dwc2_hsotg_ep_disable_lock(). Changed dwc2_hsotg_ep_ops. Now disable point to dwc2_hsotg_ep_disable_lock() function. In functions dwc2_hsotg_udc_stop() and dwc2_hsotg_suspend() dwc2_hsotg_ep_disable() function replaced by dwc2_hsotg_ep_disable_lock() function. In dwc2_hsotg_ep_disable() function removed acquiring of hsotg->lock. Fixes: dccf1bad4be7 ("usb: dwc2: Disable all EP's on disconnect") Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-12-11usb: chipidea: imx: allow to configure oc polarity on i.MX25Uwe Kleine-König1-0/+15
Up to now the polarity of the over current pin was hard coded to active high. Use the already defined device tree properties to configure polarity on i.MX25, too. In difference to i.MX6/7 use active high behavior if the polarity is unspecified to keep compatibility to existing device trees. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Peter Chen <peter.chen@nxp.com>
2018-12-11usb: chipidea: imx: Warn if oc polarity isn't specifiedUwe Kleine-König1-0/+2
The polarity of the over current detection pin isn't configured on i.MX6/7 if it's unspecified in the device tree. So the actual configuration depends on bootloader behavior which is bad. So encourage users to fix their device tree by issuing a warning in this case. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Peter Chen <peter.chen@nxp.com>
2018-12-11usb: chipidea: imx: support configuring for active low oc signalUwe Kleine-König4-14/+43
The status quo on i.MX6 is that if "over-current-active-high" is specified in the device tree this is configured as expected. If the property is missing polarity isn't changed and so the polarity is kept as setup by the bootloader. Reset default is active high, so active low can only be used with help by the bootloader. On i.MX7 it is similar, but there disabling of over current detection has a similar inconsistency. This patch introduces a new property that allows to explicitly configure for active low over current detection and consistently sets this up. In the absence of an explicit configuration the bit is kept as is. On i.MX7 over current detection is used unless disabled in the device tree. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Peter Chen <peter.chen@nxp.com>
2018-12-11doc: usb: ci-hdrc-usb2: Add pinctrl properties for HSIC pin groupsPeter Chen1-1/+30
For USB HSIC, the data and strobe pin needs to be pulled down at default, we consider it as "idle" state. When the USB host is ready to be used, the strobe pin needs to be pulled up, we consider it as "active" state. Signed-off-by: Peter Chen <peter.chen@nxp.com>
2018-12-11usb: chipidea: host: override ehci->hub_controlPeter Chen1-0/+75
The chipidea controller has some special requirements during suspend/resume, override common ehci->hub_control to implement it. Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Peter Chen <peter.chen@nxp.com>
2018-12-11usb: chipidea: imx: add HSIC supportPeter Chen3-19/+270
To support imx HSIC, there are some special requirement: - The HSIC pad is 1.2v, it may need to supply from external - The data/strobe pin needs to be pulled down first, and after host mode is initialized, the strobe pin needs to be pulled up - During the USB suspend/resume, special setting is needed Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Peter Chen <peter.chen@nxp.com>
2018-12-11usb: chipidea: add flag for imx hsic implementationPeter Chen2-0/+20
NXP (Freecale) imx HSIC design has some special requirements, add some flags at host code to handle them. Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Peter Chen <peter.chen@nxp.com>
2018-12-10usb: dwc3: gadget: Disable CSP for stream OUT epTejas Joglekar1-2/+6
In stream mode, when fast-forwarding TRBs, the stream number is not cleared causing the new stream to not get assigned. So we don't want controller to carry on transfers when short packet is received. So disable the CSP for stream capable endpoint. This is based on the 3.30a Programming guide, where table 3-1 device descriptor structure field definitions says for CSP bit If this bit is 0, the controller generates an XferComplete event and remove the stream. So if we keep CSP as 1 then switching between streams would not happen as in stream mode, when fast-forwarding TRBs, the stream number is not cleared causing the new stream to not get assigned. Signed-off-by: Tejas Joglekar <joglekar@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-12-10Merge 4.20-rc6 into usb-nextGreg Kroah-Hartman294-1265/+3083
We want the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-12-10usb: dwc2: disable power_down on Amlogic devicesMartin Blumenstingl1-0/+1
Disable power_down by setting the parameter to DWC2_POWER_DOWN_PARAM_NONE. This fixes a problem on various Amlogic Meson SoCs where USB devices are only recognized when plugged in before booting Linux. A hot-plugged USB device was not detected even though the device got power (my USB thumb drive for example has an LED which lit up). A similar fix was implemented for Rockchip SoCs in commit c216765d3a1def ("usb: dwc2: disable power_down on rockchip devices"). That commit suggests that a change in the dwc2 driver is the cause because the default value for the "hibernate" parameter (which then got renamed to "power_down" to support other modes) was changed in the v4.17 merge window with: commit 6d23ee9caa6790 ("Merge tag 'usb-for-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-testing"). Cc: <stable@vger.kernel.org> # 4.19 Acked-by: Minas Harutyunyan <hminas@synopsys.com> Suggested-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2018-12-10Linux 4.20-rc6v4.20-rc6Linus Torvalds1-1/+1
2018-12-10Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds83-368/+1225
Pull networking fixes from David Miller: "A decent batch of fixes here. I'd say about half are for problems that have existed for a while, and half are for new regressions added in the 4.20 merge window. 1) Fix 10G SFP phy module detection in mvpp2, from Baruch Siach. 2) Revert bogus emac driver change, from Benjamin Herrenschmidt. 3) Handle BPF exported data structure with pointers when building 32-bit userland, from Daniel Borkmann. 4) Memory leak fix in act_police, from Davide Caratti. 5) Check RX checksum offload in RX descriptors properly in aquantia driver, from Dmitry Bogdanov. 6) SKB unlink fix in various spots, from Edward Cree. 7) ndo_dflt_fdb_dump() only works with ethernet, enforce this, from Eric Dumazet. 8) Fix FID leak in mlxsw driver, from Ido Schimmel. 9) IOTLB locking fix in vhost, from Jean-Philippe Brucker. 10) Fix SKB truesize accounting in ipv4/ipv6/netfilter frag memory limits otherwise namespace exit can hang. From Jiri Wiesner. 11) Address block parsing length fixes in x25 from Martin Schiller. 12) IRQ and ring accounting fixes in bnxt_en, from Michael Chan. 13) For tun interfaces, only iface delete works with rtnl ops, enforce this by disallowing add. From Nicolas Dichtel. 14) Use after free in liquidio, from Pan Bian. 15) Fix SKB use after passing to netif_receive_skb(), from Prashant Bhole. 16) Static key accounting and other fixes in XPS from Sabrina Dubroca. 17) Partially initialized flow key passed to ip6_route_output(), from Shmulik Ladkani. 18) Fix RTNL deadlock during reset in ibmvnic driver, from Thomas Falcon. 19) Several small TCP fixes (off-by-one on window probe abort, NULL deref in tail loss probe, SNMP mis-estimations) from Yuchung Cheng" * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (93 commits) net/sched: cls_flower: Reject duplicated rules also under skip_sw bnxt_en: Fix _bnxt_get_max_rings() for 57500 chips. bnxt_en: Fix NQ/CP rings accounting on the new 57500 chips. bnxt_en: Keep track of reserved IRQs. bnxt_en: Fix CNP CoS queue regression. net/mlx4_core: Correctly set PFC param if global pause is turned off. Revert "net/ibm/emac: wrong bit is used for STA control" neighbour: Avoid writing before skb->head in neigh_hh_output() ipv6: Check available headroom in ip6_xmit() even without options tcp: lack of available data can also cause TSO defer ipv6: sr: properly initialize flowi6 prior passing to ip6_route_output mlxsw: spectrum_switchdev: Fix VLAN device deletion via ioctl mlxsw: spectrum_router: Relax GRE decap matching check mlxsw: spectrum_switchdev: Avoid leaking FID's reference count mlxsw: spectrum_nve: Remove easily triggerable warnings ipv4: ipv6: netfilter: Adjust the frag mem limit when truesize changes sctp: frag_point sanity check tcp: fix NULL ref in tail loss probe tcp: Do not underestimate rwnd_limited net: use skb_list_del_init() to remove from RX sublists ...
2018-12-10Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds3-5/+10
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Ingo Molnar: "Three fixes: a boot parameter re-(re-)fix, a retpoline build artifact fix and an LLVM workaround" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/vdso: Drop implicit common-page-size linker flag x86/build: Fix compiler support check for CONFIG_RETPOLINE x86/boot: Clear RSDP address in boot_params for broken loaders