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2022-05-06arm64: dts: qcom: Only include sc7180.dtsi in sc7180-trogdor.dtsiStephen Boyd19-19/+17
The SoC is always present on sc7180-trogdor.dtsi and thus we should include it in the "generic" dtsi file for trogdor. Previously we had removed it from there because we had to do the spi6/spi0 swizzle, so each trogdor variant board had to include sc7180.dtsi and then sc7180-trogdor.dtsi so that the latter dtsi file could modify the right spi bus for EC and H1 properties that are common to all trogdor boards. Now that we're done with that we can replace sc7180.dtsi includes with sc7180-trogdor.dtsi and include sc7180.dtsi in sc7180-trogdor.dtsi as was originally intended. We still need to include sc7180-trogdor.dtsi before the bridge dtsi files though because those rely on the panel label. Cc: "Joseph S. Barrera III" <joebar@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220427020339.360855-4-swboyd@chromium.org
2022-05-06arm64: dts: qcom: sc7180-trogdor: Simplify spi0/spi6 labelingStephen Boyd6-21/+3
We had to do this spi0/spi6 flip-flop on trogdor-r0 because the spi buses got swizzled between r0 and r1. The swizzle stopped after r1, but we kept this around to support either hardware possibility and to keep trogdor-r0 working. trogdor-r0 isn't supported upstream, so this swizzle is not doing anything besides making a pattern that others tryt to copy for the EC and H1 nodes. Let's remove it and simplify the dts files. Cc: "Joseph S. Barrera III" <joebar@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220427020339.360855-3-swboyd@chromium.org
2022-05-06arm64: dts: qcom: sc7180-trogdor: Simplify trackpad enablingStephen Boyd6-9/+12
Trogdor boards with a detachable keyboard don't have a trackpad over i2c. Instead the trackpad is on the detachable keyboard base. Let's move the enabling of the trackpad i2c bus out of the base sc7180-trogdor.dtsi file so that each trogdor board that is detachable, of which there are many, doesn't have to disable the trackpad bus. Cc: "Joseph S. Barrera III" <joebar@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220427020339.360855-2-swboyd@chromium.org
2022-05-06arm64: dts: qcom: sc7280: eDP for herobrine boardsDouglas Anderson5-0/+134
Add eDP support to herobrine boards, splitting up amongst the different files as makes sense. Rationale for the current split of things: * The eDP connector itself is on qcard. However, not all devices with a qcard will use an eDP panel. Some might use MIPI and, presumably, someone could build a device with qcard that had no display at all. * The qcard provides a PWM for backlight that goes to the eDP connector. This PWM is also provided to the board and it's expected that it would be used as the backlight PWM even for herobrine devices with MIPI displays. * It's currently assumed that all herobrine boards will have some sort of display, either MIPI or eDP (but not both). * We will assume herobrine-rev1 has eDP. The schematics allow for a MIPI panel to be hooked up but, aside from some testing, nobody is doing this and most boards don't have all the parts stuffed for it. The two panels would also share a PWM for backlight, which is weird. * herobrine-villager and herobrine-hoglin (crd) also have eDP. * herobrine-hoglin (crd) has slightly different regulator setup for the backlight. It's expected that this is unique to this board. See comments in the dts file. * There are some regulators that are defined in the qcard schematic but provided by the board like "vreg_edp_bl" and "vreg_edp_3p3". While we could put references to these regulators straight in the qcard.dtsi file, this would force someone using qcard that didn't provide those regulators to provide a dummy or do an ugly /delete-node/. Instead, we'll add references in herobrine.dtsi. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220426124053.v2.1.Iedd71976a78d53c301ce0134832de95a989c9195@changeid
2022-05-06arm64: dts: qcom: sa8155p-adp: Disable multiple Tx and Rx queues for ethernet IPBhupesh Sharma1-38/+2
Fix the issues seen with ethernet traffic getting stalled on SA8155p-ADP board with default (or larger) mtu size of 1500 bytes, by disabling multiple Tx and Rx queues for the stmmac IP block. With the single queue setup, the ethernet traffic is stable, wget / curl can work well on the board and no ethernet stall is observed even when longer netperf / iperf3 test are run. Also a performance of ~940 Mbits/sec is observed on the 1G link, so there is no observable degradation in performance as well. Fixes: c5cb42cc8411 ("arm64: dts: qcom: sa8155p-adp: Enable ethernet node") Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220423195003.353150-1-bhupesh.sharma@linaro.org
2022-05-06arm64: dts: qcom: sm8150: Fix iommu sid value for SDC2 controllerBhupesh Sharma1-1/+1
Fix the IOMMU sid value for SDC2 controller, to ensure that no ADMA error is observed when the microSD card is detected on the SA8155p-ADP board. Fixes: 876644c76034 ("arm64: dts: qcom: sm8150: Add support for SDC2") Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220422210611.173842-1-bhupesh.sharma@linaro.org
2022-05-04arm64: dts: qcom: sm8350-duo2: enable battery chargerKatherine Perez1-0/+12
Enable the relevant qup and I2C nodes to enable the battery charger. Signed-off-by: Katherine Perez <kaperez@linux.microsoft.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211207231736.1762503-2-kaperez@linux.microsoft.com
2022-05-04arm64: dts: qcom: Enable pm8350c pwm for sc7280-idp2Satya Priya1-0/+4
Enable pm8350c pmic pwm support for backlight on sc7280-idp2. Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1645509309-16142-5-git-send-email-quic_c_skakit@quicinc.com
2022-05-04arm64: dts: qcom: pm8350c: Add pwm supportSatya Priya1-0/+7
Add pwm support for PM8350C pmic. Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1645509309-16142-4-git-send-email-quic_c_skakit@quicinc.com
2022-05-03arm64: dts: qcom: sc7280-qcard: Configure CTS pin to bias-bus-hold for bluetoothVijaya Krishna Nivarthi1-5/+14
WLAN rail was leaking power during RBSC/sleep even after turning BT off. Change active and sleep pinctrl configurations to handle same. Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1650556567-4995-3-git-send-email-quic_vnivarth@quicinc.com
2022-05-03arm64: dts: qcom: sc7280-idp: Configure CTS pin to bias-bus-hold for bluetoothVijaya Krishna Nivarthi1-6/+12
WLAN rail was leaking power during RBSC/sleep even after turning BT off. Change active and sleep pinctrl configurations to handle same. Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1650556567-4995-2-git-send-email-quic_vnivarth@quicinc.com
2022-05-03arm64: dts: qcom: sc7180: Remove ipa interconnect nodeStephen Boyd1-7/+0
This device node is unused now that we've removed the driver that consumed it in the kernel. Drop the unused node to save some space. Cc: Alex Elder <elder@linaro.org> Cc: Taniya Das <quic_tdas@quicinc.com> Cc: Mike Tipton <quic_mdtipton@quicinc.com> Cc: Georgi Djakov <djakov@kernel.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Acked-by: Georgi Djakov <djakov@kernel.org> Reviewed-by: Alex Elder <elder@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415005828.1980055-1-swboyd@chromium.org
2022-04-23arm64: dts: qcom: sc7280-idp: Enable GPI DMAsVinod Koul1-0/+8
Some versions of the firmware for the sc7280-idp board FIFO mode disabled and must thus use GPI DMA. Enable gpi_dma0 and gpi_dma1 to allow this. Co-developed-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220421115526.1828659-3-vkoul@kernel.org
2022-04-23arm64: dts: qcom: sc7280: Add GENI I2C/SPI DMA channelsVinod Koul1-0/+97
The GENI I2C and SPI controllers may use the GPI DMA engine, define the rx and tx channels for these controllers to enable this. Co-developed-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220421115526.1828659-2-vkoul@kernel.org
2022-04-23arm64: dts: qcom: sc7280: Add GPI DMAenginesVinod Koul1-0/+44
The Qualcomm SC7280 has two GPI DMAengines, add definitions for these. Co-developed-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220421115526.1828659-1-vkoul@kernel.org
2022-04-23arm64: dts: qcom: sm8450: Fix qmp phy node (use phy@ instead of lanes@)Bhupesh Sharma1-2/+2
Fix the following 'make dtbs_check' warning(s) by using phy@ instead of lanes@: arch/arm64/boot/dts/qcom/sm8450-hdk.dtb: phy@1c0f000: 'lanes@1c0e000' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+' Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220418205509.1102109-5-bhupesh.sharma@linaro.org
2022-04-23arm64: dts: qcom: db845c: Add support for MCP2517FDVinod Koul1-0/+32
Add support for onboard MCP2517FD SPI CAN transceiver attached to SPI0 of RB3. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220421073438.1824061-1-vkoul@kernel.org
2022-04-23arm64: dts: qcom: qrb5165-rb5: Fix can-clock node nameVinod Koul1-1/+1
Per DT spec node names should not have underscores (_) in them, so change can_clock to can-clock. Fixes: 5c44c564e449 ("arm64: dts: qcom: qrb5165-rb5: Add support for MCP2518FD") Signed-off-by: Vinod Koul <vkoul@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220421073502.1824089-1-vkoul@kernel.org
2022-04-19arm64: dts: qcom: sc7280: Add SAR sensors to herobrine crdMatthias Kaehlcke1-0/+12
Enable the two SAR sensors of the CRD based on herobrine. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415172238.1.I671bdf40fdfce7a35f6349fca0dc56145d4210ee@changeid
2022-04-19arm64: dts: qcom: sm8250: camss: Add CCI definitionsBryan O'Donoghue1-0/+162
sm8250 has two CCI busses with two I2C busses apiece. Co-developed-by: Julian Grahsl <jgrahsl@snap.com> Signed-off-by: Julian Grahsl <jgrahsl@snap.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415164655.1679628-4-bryan.odonoghue@linaro.org
2022-04-19arm64: dts: qcom: sm8250: camss: Add CAMSS block definitionBryan O'Donoghue1-0/+153
Adds a CAMSS definition block. Co-developed-by: Julian Grahsl <jgrahsl@snap.com> Signed-off-by: Julian Grahsl <jgrahsl@snap.com> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415164655.1679628-3-bryan.odonoghue@linaro.org
2022-04-19arm64: dts: qcom: sm8250: Add camcc DT nodeBryan O'Donoghue1-0/+16
Add the camcc DT node for the Camera Clock Controller on sm8250. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415164655.1679628-2-bryan.odonoghue@linaro.org
2022-04-19arm64: dts: qcom: sm8450-qrd: Enable spi and i2c nodesVinod Koul1-0/+24
Enable the i2c5, spi4, spi18 and spi19 nodes which were tested on qrd board along with related qup nodes and gpi_dma0 Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220414101630.1189052-8-vkoul@kernel.org
2022-04-19arm64: dts: qcom: sm8450: Fix missing iommus for qup1Vinod Koul1-0/+3
qupv3_id_1 was missing iommus property which cause any dma transaction to fail and board crash. So add the missing iommus. Fixes: 5188049c9b36 ("arm64: dts: qcom: Add base SM8450 DTSI") Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220414101630.1189052-7-vkoul@kernel.org
2022-04-19arm64: dts: qcom: sm8450: Add qup nodes for qup2Vinod Koul1-0/+396
qup2 has 7 SEs, so add the SEs (i2c and spi) along with pinconf for these SEs Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220414101630.1189052-6-vkoul@kernel.org
2022-04-19arm64: dts: qcom: sm8450: Add qup nodes for qup1Vinod Koul1-0/+359
qup1 has 7 SEs, I2C13 and I2C14 were already added so added the remaining SEs (i2c and spi) along with pinconf for these SEs Also add interconnect properties for I2C13 and I2C14 Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220414101630.1189052-5-vkoul@kernel.org
2022-04-19arm64: dts: qcom: sm8450: Add qup nodes for qup0Vinod Koul1-0/+412
qup0 has 7 SEs, with SE7 as uart and already added, so add the remaining 6 SEs (i2c and spi) along with pinconf for these SEs Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220414101630.1189052-4-vkoul@kernel.org
2022-04-19arm64: dts: qcom: sm8450: Fix missing iommus for qupVinod Koul1-0/+3
qupv3_id_0 was missing iommus property which cause any dma transaction to fail and board crash. So add the missing iommus. While at it also add interconnect nodes for qup Fixes: 5188049c9b36 ("arm64: dts: qcom: Add base SM8450 DTSI") Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220414101630.1189052-3-vkoul@kernel.org
2022-04-19arm64: dts: qcom: sm8450: Add gpi_dma nodesVinod Koul1-0/+67
GPI DMA can be used for DMA operations for QUP devices, so add the three gpi_dma insances found in this SoC Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220414101630.1189052-2-vkoul@kernel.org
2022-04-19arm64: dts: qcom: sm8350-hdk: Enable &gpi_dma1Bjorn Andersson1-0/+4
Some versions of the firmware for the SM8350 Hardware Development Kit (HDK) has FIFO mode disabled for i2c13 and must thus use GPI DMA. Enable &gpi_dma1 to allow this. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20220412215137.2385831-3-bjorn.andersson@linaro.org
2022-04-19arm64: dts: qcom: sm8350: Add GENI I2C/SPI DMA channelsBjorn Andersson1-0/+108
The GENI I2C and SPI controllers may use the GPI DMA engine, define the rx and tx channels for these controllers to enable this. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20220412215137.2385831-2-bjorn.andersson@linaro.org
2022-04-19arm64: dts: qcom: sm8350: Define GPI DMA enginesBjorn Andersson1-0/+73
The Qualcomm SM8350 has three GPI DMA engines, add definitions for these. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20220412215137.2385831-1-bjorn.andersson@linaro.org
2022-04-19arm64: dts: qcom: sc7280: Add wakeup-source property for USB nodeSandeep Maheswaram1-0/+1
Adding wakeup-source property for USB controller in SC7280. This property is added to inform that the USB controller is wake up capable and to conditionally power down the phy during system suspend. Signed-off-by: Sandeep Maheswaram <quic_c_sanm@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1649704614-31518-7-git-send-email-quic_c_sanm@quicinc.com
2022-04-19arm64: dts: qcom: msm8996: override nodes by labelKrzysztof Kozlowski1-5/+3
Using node paths to extend or override a device tree node is error prone. If there was a typo error, a new node will be created instead of extending the existing node. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). This also reduces the indentation making the code easier to read. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220402192859.154977-2-krzysztof.kozlowski@linaro.org
2022-04-19arm64: dts: qcom: msm8994: override nodes by labelKrzysztof Kozlowski1-8/+6
Using node paths to extend or override a device tree node is error prone. If there was a typo error, a new node will be created instead of extending the existing node. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). This also reduces the indentation making the code easier to read. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220402192859.154977-1-krzysztof.kozlowski@linaro.org
2022-04-19arm64: dts: qcom: sdm845-xiaomi-beryllium: enable qcom wled backlight and ↵Joel Selvaraj1-0/+12
link to panel Xiaomi Poco F1 uses the QCOM WLED driver for backlight control. Enable and link it to the panel to use it. Signed-off-by: Joel Selvaraj <jo@jsfamily.in> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/BY5PR02MB70092607CD7CDD8CF8BCD464D9E09@BY5PR02MB7009.namprd02.prod.outlook.com
2022-04-19arm64: dts: qcom: sdm845-xiaomi-beryllium: enable second wifi channelJoel Selvaraj1-0/+7
Like the c630, the Poco F1 is also capable of using both antenna channels for 2.4 and 5ghz wifi, however unlike the c630 only the first channel is used for bluetooth. Similar to Oneplus 6. Signed-off-by: Joel Selvaraj <jo@jsfamily.in> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/BY5PR02MB7009E2566F9000F338432761D91F9@BY5PR02MB7009.namprd02.prod.outlook.com
2022-04-19arm64: dts: qcom: sdm845-xiaomi-beryllium: fix typo in panel's vddio-supply ↵Joel Selvaraj1-1/+1
property vddio is misspelled with a "0" instead of "o". Fix it. Signed-off-by: Joel Selvaraj <jo@jsfamily.in> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/BY5PR02MB7009901651E6A8D5ACB0425ED91F9@BY5PR02MB7009.namprd02.prod.outlook.com
2022-04-19arm64: dts: qcom: sdm845-xiaomi-beryllium: enable qcom ipa driverJoel Selvaraj1-0/+6
Enable Qualcomm IP Accelerator (IPA) driver for mobile data functionality which works by using ModemManager. Signed-off-by: Joel Selvaraj <jo@jsfamily.in> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/BY5PR02MB7009405D7C06C0B480974063D91F9@BY5PR02MB7009.namprd02.prod.outlook.com
2022-04-19arm64: dts: qcom: sdm845-xiaomi-beryllium: change firmware path and use mbn ↵Joel Selvaraj1-4/+4
format The "qcom/sdm845/" path conflicts with db845c's firmware that are present in the linux-firmware package. Xiaomi uses their own signed firmware for Poco F1 and can't use the db845c's firmware. So let's use "qcom/sdm845/beryllium/" to distinguish Poco F1's firmware files. For easier handling and packaging, the mdt+bXX files are squashed using Bjorn Andersson's pil-squasher tool from this link: https://github.com/andersson/pil-squasher Signed-off-by: Joel Selvaraj <jo@jsfamily.in> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/BY5PR02MB700966DEE6F6044EBEB5B892D91F9@BY5PR02MB7009.namprd02.prod.outlook.com
2022-04-19arm64: dts: qcom: do not use underscore in BCM node nameKrzysztof Kozlowski5-5/+5
Align BCM voter node with DT schema by using hyphen instead of underscore. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220411085935.130072-3-krzysztof.kozlowski@linaro.org
2022-04-19arm64: dts: qcom: sm8450: Add thermal zonesVladimir Zapolskiy1-0/+843
Add thermal zones handled by tsens sensors. The definitions and the trip points were taken from the downstream dts. For the CPU core thermal sensors, the trip points were changed to follow the example of other Qualcomm platforms. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220410234458.1739279-3-dmitry.baryshkov@linaro.org
2022-04-19arm64: dts: qcom: sm8450: Add thermal sensor controllersVladimir Zapolskiy1-0/+22
The change adds description of two thermal sensor controllers found on SM8450. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220410234458.1739279-2-dmitry.baryshkov@linaro.org
2022-04-19arm64: dts: qcom: msm8998: reserve potentially inaccessible clocksMichael Srba1-0/+15
With the gcc driver now being more complete and describing clocks which might not always be write-accessible to the OS, conservatively specify all such clocks as protected in the SoC dts. The board dts - or even user-supplied dts - can override this property to reflect the actual configuration. Signed-off-by: Michael Srba <michael.srba@seznam.cz> Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220411072156.24451-6-michael.srba@seznam.cz
2022-04-19Merge branch '20220411072156.24451-2-michael.srba@seznam.cz' into arm64-for-5.19Bjorn Andersson1-0/+4
2022-04-19dt-bindings: clock: gcc-msm8998: Add definitions of SSC-related clocksMichael Srba1-0/+4
Add definitions of four clocks which need to be manipulated in order to initialize the AHB bus which exposes the SCC block in the global address space. Signed-off-by: Michael Srba <Michael.Srba@seznam.cz> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220411072156.24451-2-michael.srba@seznam.cz
2022-04-13arm64: dts: qcom: add RPM clock controller fallback compatibleKrzysztof Kozlowski6-6/+6
The bindings require a fallback compatible to RPM clock controller. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-4-krzysztof.kozlowski@linaro.org
2022-04-13arm64: dts: qcom: msm8994: remove SMD qcom,local-pid propertyKrzysztof Kozlowski1-1/+0
The Qualcomm SMD does not use qcom,local-pid property. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-3-krzysztof.kozlowski@linaro.org
2022-04-13arm64: dts: qcom: msm8953: do not use underscore in node nameKrzysztof Kozlowski1-1/+1
Align RPM requests node with DT schema by using hyphen instead of underscore. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-2-krzysztof.kozlowski@linaro.org
2022-04-13arm64: dts: qcom: sm7225-fairphone-fp4: Enable wifiLuca Weiss1-0/+10
Configure regulators used by the wifi hardware and enable it. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220325101841.172304-2-luca.weiss@fairphone.com