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2022-07-20Merge branch irq/loongarch into irq/irqchip-nextMarc Zyngier23-279/+1450
2022-07-20irqchip / ACPI: Introduce ACPI_IRQ_MODEL_LPIC for LoongArchJianmin Lv3-0/+41
2022-07-20irqchip: Add LoongArch CPU interrupt controller supportHuacai Chen6-10/+149
2022-07-20irqchip: Add Loongson Extended I/O interrupt controller supportHuacai Chen5-10/+408
2022-07-20irqchip/loongson-liointc: Add ACPI init supportHuacai Chen4-78/+131
2022-07-20irqchip/loongson-pch-msi: Add ACPI init supportHuacai Chen4-46/+96
2022-07-20irqchip/loongson-pch-pic: Add ACPI init supportHuacai Chen5-36/+151
2022-07-20irqchip: Add Loongson PCH LPC controller supportHuacai Chen5-3/+216
2022-07-20LoongArch: Prepare to support multiple pch-pic and pch-msi irqdomainJianmin Lv2-0/+46
2022-07-20LoongArch: Use ACPI_GENERIC_GSI for gsi handlingJianmin Lv2-65/+1
2022-07-20genirq/generic_chip: Export irq_unmap_generic_chipJianmin Lv2-1/+2
2022-07-20ACPI: irq: Allow acpi_gsi_to_irq() to have an arch-specific fallbackMarc Zyngier2-2/+17
2022-07-20APCI: irq: Add support for multiple GSI domainsMarc Zyngier4-28/+50
2022-07-20LoongArch: Provisionally add ACPICA data structuresMarc Zyngier1-0/+142
2022-07-19Merge branch irq/renesas-irqc into irq/irqchip-nextMarc Zyngier14-106/+863
2022-07-19dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/V2L SoCLad Prabhakar1-1/+2
2022-07-11gpio: thunderx: Don't directly include asm-generic/msi.hMarc Zyngier1-2/+0
2022-07-10Merge branch irq/plic-masking into irq/irqchip-nextMarc Zyngier25-125/+176
2022-07-10irqchip/sifive-plic: Separate the enable and mask operationsSamuel Holland1-21/+34
2022-07-10irqchip/sifive-plic: Make better use of the effective affinity maskSamuel Holland2-18/+10
2022-07-10Merge branch irq/affinity-nosmp into irq/plic-maskingMarc Zyngier24-95/+141
2022-07-10Merge branch irq/stm32-exti-updates into irq/irqchip-nextMarc Zyngier2-127/+126
2022-07-10pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interruptLad Prabhakar1-0/+233
2022-07-10dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Document the properties to handl...Lad Prabhakar1-0/+15
2022-07-10gpio: gpiolib: Allow free() callback to be overriddenLad Prabhakar1-3/+6
2022-07-10irqchip: Add RZ/G2L IA55 Interrupt Controller driverLad Prabhakar3-0/+402
2022-07-10dt-bindings: interrupt-controller: Add Renesas RZ/G2L Interrupt ControllerLad Prabhakar1-0/+133
2022-07-10gpio: Remove dynamic allocation from populate_parent_alloc_arg()Marc Zyngier8-101/+73
2022-07-08PCI: hv: Take a const cpumask in hv_compose_msi_req_get_cpu()Samuel Holland1-1/+1
2022-07-07genirq: Provide an IRQ affinity mask in non-SMP configsSamuel Holland1-0/+8
2022-07-07genirq: Return a const cpumask from irq_data_get_affinity_maskSamuel Holland10-31/+39
2022-07-07genirq: Add and use an irq_data_update_affinity helperSamuel Holland10-14/+21
2022-07-07genirq: Refactor accessors to use irq_data_get_affinity_maskSamuel Holland1-7/+7
2022-07-07genirq: Drop redundant irq_init_effective_affinitySamuel Holland1-9/+1
2022-07-07genirq: GENERIC_IRQ_EFFECTIVE_AFF_MASK depends on SMPSamuel Holland3-8/+9
2022-07-07genirq: GENERIC_IRQ_IPI depends on SMPSamuel Holland2-1/+2
2022-07-07irqchip/mips-gic: Only register IPI domain when SMP is enabledSamuel Holland2-27/+56
2022-07-07irqchip/stm32-exti: Simplify irq description tableAntonio Borneo1-119/+101
2022-07-07irqchip/stm32-exti: Read event trigger type from event_trg registerAntonio Borneo1-84/+96
2022-07-07irqchip/stm32-exti: Tag emr register as undefined for stm32mp15Alexandre Torgue1-4/+5
2022-07-07irqchip/stm32-exti: Prevent illegal read due to unbounded DT valueAntonio Borneo1-0/+3
2022-07-07irqchip/stm32-exti: Fix irq_mask/irq_unmask for direct eventsLoic Pallardy1-2/+2
2022-07-07irqchip/stm32-exti: Fix irq_set_affinity return valueLudovic Barre1-1/+1
2022-07-07genirq: Don't return error on missing optional irq_request_resources()Antonio Borneo1-1/+2
2022-07-01Merge branch irq/plic-edge-fixes into irq/irqchip-nextMarc Zyngier2-10/+135
2022-07-01irqchip/sifive-plic: Fix T-HEAD PLIC edge trigger handlingSamuel Holland1-1/+1
2022-07-01dt-bindings: interrupt-controller: Require trigger type for T-HEAD PLICSamuel Holland1-1/+2
2022-07-01irqchip/sifive-plic: Add support for Renesas RZ/Five SoCLad Prabhakar1-4/+74
2022-07-01dt-bindings: interrupt-controller: sifive,plic: Document Renesas RZ/Five SoCLad Prabhakar1-5/+59
2022-06-19Linux 5.19-rc3v5.19-rc3Linus Torvalds1-1/+1
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