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2014-05-16ARM: dts: cpuimx35 Add touchscreen support.Denis Carikli1-0/+15
Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: mbimxsd51 baseboard: Add USB support.Denis Carikli1-0/+58
Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: add initial Colibri VF61 board supportStefan Agner2-0/+124
Add initial Toradex Colibri VF61 board support. Ethernet, UART and SDHC cards are working. Cache latencies need to be a bit higher than vf610.dtsi suggests. Those values are validated by running multiple memory tests. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16of: add vendor prefix for Toradex AGStefan Agner1-0/+1
Adds toradex to the list of DT vendor prefixes. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx27-pdk: Pass the memory rangeFabio Estevam1-1/+1
imx27-pdk has 128 MB of DRAM. Pass the memory range in dt. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx27-phytec-phycore-rdk: Add display control signal definitionsAlexander Shiyan1-0/+4
This patch adds display control signal definitions. These fields are not used in the driver yet, but will be used for reference to indicate the polarity of the signals. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx28-duckbill: use symbolic names from gpio.hMichael Heimpold1-2/+2
Use GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW instead of 0 and 1. Signed-off-by: Michael Heimpold <mhei@heimpold.de> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx28-duckbill: fix phy reset gpioMichael Heimpold1-2/+2
Fix a copy & paste error: on duckbills the GPIO used for resetting the ethernet phy differs from FSL's MX28EVK board. Reported-by: Stefan Wahren <info@lategoodbye.de> Signed-off-by: Michael Heimpold <mhei@heimpold.de> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx28: include gpio.h to allow use of symbolic namesMichael Heimpold1-0/+1
Signed-off-by: Michael Heimpold <mhei@heimpold.de> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx28-duckbill: fix mmc settingsMichael Heimpold1-2/+2
I2SE's duckbills are only equipped with a micro SD card slot and thus only provide a 4-bit interface. Signed-off-by: Michael Heimpold <mhei@heimpold.de> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx51-babbage: Add USB OTG supportFabio Estevam1-0/+7
Tested by pinging from the host PC to the imx51-babbage via a g_ether connection. Signed-off by: Dave Ebright <dave.ebright@parsons.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx51-babbage: Add USB Host1 supportFabio Estevam1-0/+55
Signed-off by: Dave Ebright <dave.ebright@parsons.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx35-pdk: Add initial device tree supportFabio Estevam2-0/+68
Add support for UART, eSDHC and NAND. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: vf610-twr: Enables FTM PWM device.Xiubo Li1-0/+6
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: vf610-twr: Add PWM0's pinctrl nodeXiubo Li1-0/+11
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: vf610: Add Freescale FTM PWM node.Xiubo Li1-0/+13
This adds devicetree node for VF610, and there are 8 channels supported. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: i.MX53: Add reset line to VPU device nodePhilipp Zabel1-0/+1
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: i.MX53: Enable CODA7541 VPUPhilipp Zabel1-1/+0
This IP module is always present and has no external connections. There is no reason to disable it in the device tree. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx25-pdk: Add USB Host1 supportFabio Estevam1-0/+6
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx27-phytec-phycore-rdk: Add display supportAlexander Shiyan1-0/+64
This patch adds FB, Sharp-LQ035Q7 display (add-on module) and corresponded pinctrl devicetree nodes to the Phytec PCM970 RDK. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx25-pdk: Add CAN supportFabio Estevam1-0/+23
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx25-pdk: Add keypad supportFabio Estevam2-1/+41
Tested with evtest. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: imx25-pdk: Add audio supportFabio Estevam1-0/+74
mx25pdk has a sgtl5000 codec connected to the I2C1 port. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: dts: set 'ti,set-rate-parent' for dpll4_m5 pathLaurent Pinchart1-0/+1
Set 'ti,set-rate-parent' property for the dpll4_m5x2_mul_ck clock, which is used for the ISP functional clock. This fixes the OMAP3 ISP driver's clock rate configuration, which needs the rate to be propagated properly to the divider node (dpll4_m5_ck). Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-05-16ARM: dts: use ti,fixed-factor-clock for dpll4_m5x2_mul_ckLaurent Pinchart2-4/+4
We need to use set-rate-parent for dpll4_m5 clock path, so use the ti,fixed-factor-clock version which supports set-rate-parent property. The set-rate-parent flag itself is set in the following patch, this one just changes the clock driver to ti,fixed-factor-clock without any other changes. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-05-16ARM: dts: am43xx-clocks: use ti, fixed-factor-clock for dpll_per_clkdcoldoDave Gerlach1-3/+6
Use the ti,fixed-factor-clock version so that autoidle for dpll_per_clkdcoldo is properly controlled after power management code is introduced. Without this the clock may be held active even when it is gated. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-05-16ARM: zynq: dt: Add a fixed regulator for CPU voltageSoren Brinkmann1-0/+10
To silence the warning cpufreq_cpu0: failed to get cpu0 regulator: -19 from the cpufreq driver regarding a missing regulator, add a fixed regulator to the DT. Zynq does not support voltage scaling and the CPU rail should always be supplied with 1 V, hence it is added in the SOC-level dtsi. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-16ARM: mvebu: add Device Tree description for the EHCI controllers on Armada 375Gregory CLEMENT2-0/+20
The Marvell Armada 375 SoCs contains two EHCI controllers. This commit adds the Device Tree description of these interfaces at the SoC level, and also enables the USB2 port on the Armada 375 DB platform. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-18-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-16ARM: mvebu: add Device Tree description of the xHCI controller on Armada 375Gregory CLEMENT2-0/+12
The Marvell Armada 375 SoCs contain a xHCI controller. This commit adds the Device Tree description of this interfaces at the SoC level, and also enables the USB3 port on the Armada 375 DB platform. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-17-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-16ARM: mvebu: add Device Tree description of the EHCI controller on Armada 38xGregory CLEMENT2-0/+12
The Marvell Armada 38x SoCs contains one EHCI controller. This commit adds the Device Tree description of this interface at the SoC level, and also enables the USB2 port on the Armada 385 DB platform. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-16-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-16ARM: mvebu: add Device Tree description of xHCI controllers on Armada 38xGregory CLEMENT3-0/+28
The Marvell Armada 38x SoCs contains two xHCI controllers. This commit adds the Device Tree description of those interfaces at the SoC level, and also enables the two USB3 ports on the Armada 385 DB platform and one USB3 port on the Armada 385 RD platform. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-15-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-16ARM: Kirkwood: DT versions of OpenRD boardsAndrew Lunn5-0/+266
Create DTS files to describe the Marvell OpenRD boards. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1399836639-1918-1-git-send-email-andrew@lunn.ch Tested-by: Francois Lorrain <francois.lorrain@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-16ARM: dts: add tps65090 power regulator for exynos5250-snowDoug Anderson1-0/+90
Added TPS65090 regulator related nodes to Snow board. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-16ARM: dts: add pinctrl for EC irq of exynos5250-snowDoug Anderson1-0/+9
Added pinctrl node for embedded controller (EC) IRQ on Snow board. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-16ARM: dts: add pinctrl for i2c-arbitrator of exynos5250-snowDoug Anderson1-0/+19
Added i2c-arbitrator pinctrl node to Snow board. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-15ARM: tegra: initial add of Colibri T30Stefan Agner3-0/+583
This patch adds the device tree to support Toradex Colibri T30, a computer on module which can be used on different carrier boards. The module consists of a Tegra 30 SoC, two PMIC, DDR3L RAM, eMMC, a LM95245 temperature sensor and an AX88772B USB Ethernet Controller. Furthermore, there is a STMPE811 and SGTL5000 audio codec which are not yet supported. Anything that is not self contained on the module is disabled by default. The device tree for the Evaluation Board includes the modules device tree and enables the supported pheripherials of the carrier board (the Evaluation Board supports almost all of them). Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-05-15ARM: sunxi: dt: declare the r_pio pin controller for A31 SoCBoris BREZILLON1-0/+14
The A31 SoC has a different pin controller for PL and PM banks. Define this new controller in the device tree. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-05-15ARM: sunxi: dt: add PRCM clk and reset controller subdevicesBoris BREZILLON1-0/+38
Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset controller subdevices. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-05-15ARM: shmobile: r8a7740 dtsi: Remove duplicate interrupt-parent propertyGeert Uytterhoeven1-1/+0
Caused by interaction between commit 08ec67b50db7ca8c9077e67ca23850cdc5bfc716 ("ARM: shmobile: r8a7740 dtsi: Add Ethernet support") and commit 9ff254adc1e32db46000a33b8ecbc4d7047672be ("ARM: shmobile: dts: Move interrupt-parent property to root node"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-15ARM: dts: AM33XX: fix ethernet and mdio default stateJohan Hovold6-1/+21
Make sure ethernet and mdio nodes are disabled by default and enable them explicitly only on boards that actually use them. Signed-off-by: Johan Hovold <jhovold@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-15ARM: dts: am4372: Add hdq device tree dataSourav Poddar2-0/+22
Add device tree nodes and pinmux for hdq/1wire on am43x epos evm. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-15ARM: omap2+: skip device build from platform code for dtSourav Poddar1-0/+2
For SOCs with dt enabled, device should be build through device tree. Prevent device build call from platform code, if device tree is enabled. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-15dts: dra7-evm: add USB supportRoger Quadros1-0/+24
Add USB pinmux information and USB modes for the USB controllers. CC: Benoît Cousson <bcousson@baylibre.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-15ARM: dts: dra7: Add USB related nodesRoger Quadros2-10/+149
Add nodes for the Super Speed USB controllers, omap-control-usb, USB2 PHY and USB3 PHY devices. Remove ocp2scp1 address space from hwmod data as it is now provided via device tree. CC: Benoît Cousson <bcousson@baylibre.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-15ARM: dts: dra7-clock: Add "l3init_960m_gfclk" clock gateRoger Quadros1-2/+10
This clock gate description is missing in the older Reference manuals. It is present on the SoC to provide 960MHz reference clock to the internal USB PHYs. Reference: DRA75x_DRA74x_ES1.1_NDA_TRM_vO.pdf, pg. 900, Table 3-812. CM_COREAON_L3INIT_60M_GFCLK_CLKCTRL Use l3init_960m_gfclk as parent of usb_otg_ss1_refclk960m and usb_otg_ss2_refclk960m. CC: Benoît Cousson <bcousson@baylibre.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-15ARM: dts: omap4+: Add clocks to USB2 PHY nodeRoger Quadros2-0/+4
The USB2 PHY driver expects named clocks for wakeup clock and reference clock. Provide this information for USB2 PHY nodes in OMAP4 and OMAP5 SoC DTS. CC: Benoît Cousson <bcousson@baylibre.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-15ARM: dts: dra7: add OCP2SCP3 and SATA nodesBalaji T K1-0/+39
Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY. [Roger Q] Clean up. Updated IRQ for interrupt crossbar. CC: Benoit Cousson <bcousson@baylibre.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-15ARM: dts: omap5: add sata nodeBalaji T K1-0/+40
Add support for sata. [Roger Q] Clean up. CC: Benoit Cousson <bcousson@baylibre.com> CC: Tony Lindgren <tony@atomide.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-05-14ARM: dts: Remove g2d_pd node for exynos5420Arun Kumar K1-6/+0
G2D power domain also controls the CMU block of G2D. Since clock registers can be accessed anytime for viewing clk_summary, it can cause a system crash if g2d power domain is disabled. Signed-off-by: Arun Kumar K <arun.kk@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-14ARM: dts: Remove mau_pd node for exynos5420Tushar Behera1-5/+0
MAU powerdomain provides clocks for Audio sub-system block. This block comprises of the I2S audio controller, audio DMA blocks and Audio sub-system clock registers. Right now, there is no way to hook up power-domains with clock providers. During late boot when this power-domain gets disabled, we get following external abort. Unhandled fault: imprecise external abort (0x1406) at 0x00000000 Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000007 Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-26 06:30:45 +0300