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2018-07-26Merge tag 'soc-fsl-for-4.19' of ↵Olof Johansson29-63/+100
git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers Various updates to soc/fsl for 4.19 Moves DPAA2 DPIO driver from staging to fsl/soc Adds multiple-pin support to QE gpio driver * tag 'soc-fsl-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: cleanup Kconfig menu soc: fsl: dpio: Convert DPIO documentation to .rst staging: fsl-mc: Remove remaining files staging: fsl-mc: Move DPIO from staging to drivers/soc/fsl staging: fsl-dpaa2: eth: move generic FD defines to DPIO soc: fsl: qe: gpio: Add qe_gpio_set_multiple Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-26Merge tag 'sunxi-drivers-for-4.19' of ↵Olof Johansson6-6/+208
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/drivers Allwinner drivers changes for 4.19 There's been work for this release cycles in both the SRAM controller driver in order to support more SoCs, as part of our VPU work, but also to enable the EMAC on the A64 (that needs to poke at registers within the same register space). Some work has been needed too to represent the bus to the display engine controllers that all need an SRAM to be mapped to the CPU to be able to access those controllers' registers. * tag 'sunxi-drivers-for-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: soc: sunxi: Add the A13, A23 and H3 system control compatibles drivers: soc: sunxi: Add support for the C1 SRAM region dt-bindings: sram: sunxi: Populate valid sections compatibles dt-bindings: sram: sunxi: Add A13, A20, A23 and H3 dedicated bindings soc: sunxi: sram: Add dt match for the A10 system-control compatible dt-bindings: sram: sunxi: Introduce new A10 binding for system-control bus: add bus driver for accessing Allwinner A64 DE2 dt-bindings: add binding for the Allwinner A64 DE2 bus soc: sunxi: sram: Add updated compatible string for A64 system control dt-bindings: sram: Rename A64 SRAM controller compatible soc: sunxi: export a regmap for EMAC clock reg on A64 Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-26Merge tag 'qcom-drivers-for-4.19' of ↵Olof Johansson17-7/+2341
git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers Qualcomm ARM Based Driver Updates for v4.19 * Add Qualcomm LLCC driver * Add Qualcomm RPMH controller * Fix memleak in Qualcomm RMTFS * Add dummy qcom_scm_assign_mem() * Fix check for global partition in SMEM * tag 'qcom-drivers-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: soc: qcom: rmtfs-mem: fix memleak in probe error paths soc: qcom: llc-slice: Add missing MODULE_LICENSE() drivers: qcom: rpmh: fix unwanted error check for get_tcs_of_type() drivers: qcom: rpmh-rsc: fix the loop index check in get_req_from_tcs firmware: qcom: scm: add a dummy qcom_scm_assign_mem() drivers: qcom: rpmh-rsc: Check cmd_db_ready() to help children drivers: qcom: rpmh-rsc: allow active requests from wake TCS drivers: qcom: rpmh: add support for batch RPMH request drivers: qcom: rpmh: allow requests to be sent asynchronously drivers: qcom: rpmh: cache sleep/wake state requests drivers: qcom: rpmh-rsc: allow invalidation of sleep/wake TCS drivers: qcom: rpmh-rsc: write sleep/wake requests to TCS drivers: qcom: rpmh: add RPMH helper functions drivers: qcom: rpmh-rsc: log RPMH requests in FTRACE dt-bindings: introduce RPMH RSC bindings for Qualcomm SoCs drivers: qcom: rpmh-rsc: add RPMH controller for QCOM SoCs drivers: soc: Add LLCC driver dt-bindings: Documentation for qcom, llcc soc: qcom: smem: Correct check for global partition Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-25soc: fsl: cleanup Kconfig menuLi Yang3-3/+6
Put NXP/Freescale QorIQ SoC drivers under a menu and make the item naming more aligned. Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-07-25soc: fsl: dpio: Convert DPIO documentation to .rstRoy Pledge2-3/+27
Convert the Datapath I/O documentation to .rst format and move to the Documation/networking/dpaa2 directory Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-07-25staging: fsl-mc: Remove remaining filesRoy Pledge6-22/+0
Remove the staging/drivers/fsl-mc directory from the staging area now that all the components have been moved to the main kernel areas. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-07-25staging: fsl-mc: Move DPIO from staging to drivers/soc/fslRoy Pledge20-20/+20
Move the NXP DPIO (Datapath I/O Driver) out of the drivers/staging directory and into the drivers/soc/fsl directory. The DPIO driver enables access to Queue and Buffer Manager (QBMAN) hardware on NXP DPAA2 devices. This is a prerequisite to moving the DPAA2 Ethernet driver out of staging. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-07-25staging: fsl-dpaa2: eth: move generic FD defines to DPIOHoria Geantă3-15/+19
Previous commits: commit 6e2387e8f19e ("staging: fsl-dpaa2/eth: Add Freescale DPAA2 Ethernet driver") commit 39163c0ce0f4 ("staging: fsl-dpaa2/eth: Errors checking update") have added bits that are not specific to the WRIOP accelerator. Move these where they belong (in DPIO) such that other accelerators can make use of them. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Acked-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-07-25soc: fsl: qe: gpio: Add qe_gpio_set_multipleJoakim Tjernlund1-0/+28
This cousin to gpio-mpc8xxx was lacking a multiple pins method, add one. Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-07-22Merge tag 'imx-drivers-4.19' of ↵Olof Johansson1-6/+12
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers i.MX drivers update for 4.19: - Handle i.MX6SL chip errata ERR006287 in the safest possible way by keeping the DISP domain always-on, because Upon resuming from power gating, the modules in the display power domain (eLCDIF, EPDC, PXP and SPDC) might fail to perform register reads correctly. - Use GENPD_FLAG_ALWAYS_ON flag for i.MX6QP PU ERR009619 handling. It is functionally identical to the exsiting implementation but simpler and slightly faster. * tag 'imx-drivers-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx6qp: Use GENPD_FLAG_ALWAYS_ON for PU errata soc: imx: gpc: Disable 6sl display power gating for ERR006287 Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-22Merge tag 'reset-for-4.19' of git://git.pengutronix.de/git/pza/linux into ↵Olof Johansson9-0/+460
next/drivers Reset controller changes for v4.19 This adds new drivers and bindings for the SDM845 AOSS (always on subsystem) reset controller and for the Uniphier USB3 core reset. SPI controller resets are added to the Uniphier reset driver. * tag 'reset-for-4.19' of git://git.pengutronix.de/git/pza/linux: reset: uniphier: add reset control support for SPI reset: uniphier: add USB3 core reset control dt-bindings: reset: uniphier: add USB3 core reset support reset: simple: export reset_simple_ops to be referred from modules reset: qcom: AOSS (always on subsystem) reset controller dt-bindings: reset: Add AOSS reset bindings for SDM845 SoCs Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-21soc: qcom: rmtfs-mem: fix memleak in probe error pathsJohan Hovold1-2/+1
Make sure to set the mem device release callback before calling put_device() in a couple of probe error paths so that the containing object also gets freed. Fixes: d1de6d6c639b ("soc: qcom: Remote filesystem memory driver") Cc: stable <stable@vger.kernel.org> # 4.15 Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21soc: qcom: llc-slice: Add missing MODULE_LICENSE()Niklas Cassel1-0/+3
Add missing MODULE_LICENSE(). According to the SPDX-License-Identifier, the license is GPL v2. Fixes the following warning: WARNING: modpost: missing MODULE_LICENSE() in drivers/soc/qcom/llcc-slice.o Fixes: a3134fb ("drivers: soc: Add LLCC driver") Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: qcom: rpmh: fix unwanted error check for get_tcs_of_type()Raju P.L.S.S.S.N1-4/+2
The patch fixes the bug reported by Dan Carpenter. It removes the unnecessary err check for ‘tcs’ reported by static checker warning: drivers/soc/qcom/rpmh-rsc.c:111 tcs_invalidate() warn: 'tcs' isn't an ERR_PTR See also: drivers/soc/qcom/rpmh-rsc.c:178 get_tcs_for_msg() warn: 'tcs' isn't an ERR_PTR drivers/soc/qcom/rpmh-rsc.c:180 get_tcs_for_msg() warn: 'tcs' isn't an ERR_PTR https://www.spinics.net/lists/linux-soc/msg04624.html Fixes: 9a3afcf ("drivers: qcom: rpmh-rsc: allow invalidation of sleep/wake TCS") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Reviewed-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: qcom: rpmh-rsc: fix the loop index check in get_req_from_tcsRaju P.L.S.S.S.N1-1/+1
get_req_from_tcs introduced in patch[1] returns tcs_request from tcs_group. The size of tcs (of type - tcs_group) array in rsc_drv is TCS_TYPE_NR. So the loop index needs to be iterated up to TCS_TYPE_NR only. [1] https://patchwork.kernel.org/patch/10477547/ Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21firmware: qcom: scm: add a dummy qcom_scm_assign_mem()Niklas Cassel1-0/+4
Add a dummy qcom_scm_assign_mem() to enable building drivers when CONFIG_COMPILE_TEST=y && CONFIG_QCOM_SCM=n. All other qcom_scm_* functions already have a dummy version. Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: qcom: rpmh-rsc: Check cmd_db_ready() to help childrenDouglas Anderson1-0/+13
Children of RPMh will need access to cmd_db. Rather than having each child have code to check if cmd_db is ready let's add the check to RPMh. With this we'll be able to remove this boilerplate code from clk-rpmh.c and qcom-rpmh-regulator.c. Neither of these files has landed upstream yet but patches are pretty far along. === This code is based upon v11 of Lina and Raju's RPMh series. Suggested-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: qcom: rpmh-rsc: allow active requests from wake TCSLina Iyer1-2/+21
Some RSCs may only have sleep and wake TCS, i.e, there is no dedicated TCS for active mode request, but drivers may still want to make active requests from these RSCs. In such cases re-purpose the wake TCS to send active state requests. The requirement for this is that the driver is aware that the wake TCS is being repurposed to send active request, hence the sleep and wake TCSes be invalidated before the active request is sent. Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: qcom: rpmh: add support for batch RPMH requestLina Iyer4-2/+168
Platform drivers need make a lot of resource state requests at the same time, say, at the start or end of an usecase. It can be quite inefficient to send each request separately. Instead they can give the RPMH library a batch of requests to be sent and wait on the whole transaction to be complete. rpmh_write_batch() is a blocking call that can be used to send multiple RPMH command sets. Each RPMH command set is set asynchronously and the API blocks until all the command sets are complete and receive their tx_done callbacks. Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: qcom: rpmh: allow requests to be sent asynchronouslyLina Iyer3-0/+60
Platform drivers that want to send a request but do not want to block until the RPMH request completes have now a new API - rpmh_write_async(). The API allocates memory and send the requests and returns the control back to the platform driver. The tx_done callback from the controller is handled in the context of the controller's thread and frees the allocated memory. This API allows RPMH requests from atomic contexts as well. Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: qcom: rpmh: cache sleep/wake state requestsLina Iyer4-7/+216
Active state requests are sent immediately to the RSC controller, while sleep and wake state requests are cached in this driver to avoid taxing the RSC controller repeatedly. The cached values will be sent to the controller when the rpmh_flush() is called. Generally, flushing is a system PM activity and may be called from the system PM drivers when the system is entering suspend or deeper sleep modes during cpuidle. Also allow invalidating the cached requests, so they may be re-populated again. Signed-off-by: Lina Iyer <ilina@codeaurora.org> [rplsssn: remove unneeded semicolon, address line over 80chars error] Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: qcom: rpmh-rsc: allow invalidation of sleep/wake TCSLina Iyer1-0/+44
Allow sleep and wake commands to be cleared from the respective TCSes, so that they can be re-populated. Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: qcom: rpmh-rsc: write sleep/wake requests to TCSLina Iyer2-0/+129
Sleep and wake requests are sent when the application processor subsystem of the SoC is entering deep sleep states like in suspend. These requests help lower the system power requirements when the resources are not in use. Sleep and wake requests are written to the TCS slots but are not triggered at the time of writing. The TCS are triggered by the firmware after the last of the CPUs has executed its WFI. Since these requests may come in different batches of requests, it is the job of this controller driver to find and arrange the requests into the available TCSes. Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: qcom: rpmh: add RPMH helper functionsLina Iyer5-3/+179
Sending RPMH requests and waiting for response from the controller through a callback is common functionality across all platform drivers. To simplify drivers, add a library functions to create RPMH client and send resource state requests. rpmh_write() is a synchronous blocking call that can be used to send active state requests. Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: qcom: rpmh-rsc: log RPMH requests in FTRACELina Iyer3-1/+93
Log sent RPMH requests and interrupt responses in FTRACE. Signed-off-by: Lina Iyer <ilina@codeaurora.org> Reviewed-by: Steven Rostedt (VMware) <rostedt@goodmis.org> [rplsssn@codeaurora.org: rebase to v4.18-rc1 & fix merge conflict] Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21dt-bindings: introduce RPMH RSC bindings for Qualcomm SoCsLina Iyer1-0/+137
Add device binding documentation for Qualcomm Technology Inc's RPMH RSC driver. The driver is used for communicating resource state requests for shared resources. Cc: devicetree@vger.kernel.org Signed-off-by: Lina Iyer <ilina@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> [rplsssn@codeaurora.org: minor order correction for TCS type] Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: qcom: rpmh-rsc: add RPMH controller for QCOM SoCsLina Iyer6-0/+631
Add controller driver for QCOM SoCs that have hardware based shared resource management. The hardware IP known as RSC (Resource State Coordinator) houses multiple Direct Resource Voter (DRV) for different execution levels. A DRV is a unique voter on the state of a shared resource. A Trigger Control Set (TCS) is a bunch of slots that can house multiple resource state requests, that when triggered will issue those requests through an internal bus to the Resource Power Manager Hardened (RPMH) blocks. These hardware blocks are capable of adjusting clocks, voltages, etc. The resource state request from a DRV are aggregated along with state requests from other processors in the SoC and the aggregate value is applied on the resource. Some important aspects of the RPMH communication - - Requests are <addr, value> with some header information - Multiple requests (upto 16) may be sent through a TCS, at a time - Requests in a TCS are sent in sequence - Requests may be fire-n-forget or completion (response expected) - Multiple TCS from the same DRV may be triggered simultaneously - Cannot send a request if another request for the same addr is in progress from the same DRV - When all the requests from a TCS are complete, an IRQ is raised - The IRQ handler needs to clear the TCS before it is available for reuse - TCS configuration is specific to a DRV - Platform drivers may use DRV from different RSCs to make requests Resource state requests made when CPUs are active are called 'active' state requests. Requests made when all the CPUs are powered down (idle state) are called 'sleep' state requests. They are matched by a corresponding 'wake' state requests which puts the resources back in to previously requested active state before resuming any CPU. TCSes are dedicated for each type of requests. Active mode TCSes (AMC) are used to send requests immediately to the resource, while control TCS are used to provide specific information to the controller. Sleep and Wake TCS send sleep and wake requests, after and before the system halt respectively. Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21drivers: soc: Add LLCC driverRishabh Bhatnagar5-0/+628
LLCC (Last Level Cache Controller) provides additional cache memory in the system. LLCC is partitioned into multiple slices and each slice gets its own priority, size, ID and other config parameters. LLCC driver programs these parameters for each slice. Clients that are assigned to use LLCC need to get information such size & ID of the slice they get and activate or deactivate the slice as needed. LLCC driver provides API for the clients to perform these operations. Signed-off-by: Channagoud Kadabi <ckadabi@codeaurora.org> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21dt-bindings: Documentation for qcom, llccRishabh Bhatnagar1-0/+26
Documentation for last level cache controller device tree bindings, client bindings usage examples. Signed-off-by: Channagoud Kadabi <ckadabi@codeaurora.org> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-21soc: qcom: smem: Correct check for global partitionBjorn Andersson1-5/+5
The moved check for the global partition ended up in the wrong place and I failed to spot this in my review. This moves it to the correct place. Fixes: 11d2e7edac6a ("soc: qcom: smem: check sooner in qcom_smem_set_global_partition()") Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Alex Elder <elder@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-07-19soc: sunxi: Add the A13, A23 and H3 system control compatiblesMaxime Ripard1-0/+12
The A13, A23 and H3 have variations of the system controls, in part due to the SRAM that are available (and can be mapped) in the SoC. In order to make it future proof, let's add compatibles for these SoCs in the driver. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-19reset: uniphier: add reset control support for SPIKunihiko Hayashi1-0/+9
Add reset control for SPI controller on UniPhier SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-07-17soc: imx6qp: Use GENPD_FLAG_ALWAYS_ON for PU errataLeonard Crestez1-6/+2
This is functionally identical but simpler and slightly faster. The PU domain is turned on at boot time and never turned off. In the current implementation the pm core will repeatedly call power_off when the domain is unused and get -EBUSY back. If the domain is marked as "always on" instead the pm core won't even attempt to turn it off. In theory on 6qp it is safe to turn PU off in suspend, however that is best accomplished with a new core flag. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-16reset: uniphier: add USB3 core reset controlKunihiko Hayashi3-0/+182
Add a reset line to enable USB3 core implemented in UniPhier SoCs. This reuses only the reset operations in reset-simple, because the reset-simple doesn't handle any SoC-dependent clocks and resets. This reset line is included in the USB3 glue layer, and it's necessary to enable clocks and deassert resets of the layer before using this reset line. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-07-16dt-bindings: reset: uniphier: add USB3 core reset supportKunihiko Hayashi1-0/+56
Add DT bindings for reset control of USB3 core implemented in UniPhier SoCs. The reset control belongs to USB3 glue layer. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-07-16reset: simple: export reset_simple_ops to be referred from modulesKunihiko Hayashi1-0/+1
Allow reset_simple_ops to be referred from modules that use reset-simple framework by adding EXPORT_SYMBOL_GPL. Suggested-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-07-16reset: qcom: AOSS (always on subsystem) reset controllerSibi Sankar3-0/+143
Add reset controller driver for Qualcomm SDM845 SoC to control reset signals provided by AOSS for Modem, Venus ADSP, GPU, Camera, Wireless, Display subsystem Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-07-16dt-bindings: reset: Add AOSS reset bindings for SDM845 SoCsSibi Sankar2-0/+69
Add SDM845 AOSS (always on subsystem) reset controller binding Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-07-15Merge tag 'vexpress-update-4.19' of ↵Olof Johansson1-7/+3
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers ARMv7 Vexpress update/cleanup for v4.19 Just single cleanup patch to use devm_ioremap_resource in place of devm_request_mem_region and devm_ioremap. * tag 'vexpress-update-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: misc: vexpress/syscfg: Use devm_ioremap_resource() to map memory Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-15Merge tag 'scmi-update-4.19' of ↵Olof Johansson1-5/+0
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers SCMI cleanup for v4.19 Single patch removing some unnecessary NULL pointer checks. * tag 'scmi-update-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: arm_scmi: remove some unnecessary checks Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-15Merge tag 'tegra-for-4.19-memory' of ↵Olof Johansson1-10/+6
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers memory: tegra: Changes for v4.19-rc1 This contains a single fix for the initialization order of the various parts of the Tegra memory controller driver. * tag 'tegra-for-4.19-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: memory: tegra: Correct driver probe order Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-15Merge tag 'omap-for-v4.19/ti-sysc-v2-signed' of ↵Olof Johansson6-4/+74
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers ti-sysc driver changes for v4.19 merge window These changes add support for mcan controller found on dra7 to probe it with only dts changes with no need for legacy hwmod platform data. As it depends on the related clock change, the clock change is included here and acked by Stephen Boyd. * tag 'omap-for-v4.19/ti-sysc-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: bus: ti-sysc: Add support for software reset bus: ti-sysc: Add support for using ti-sysc for MCAN on dra76x clk: ti: dra7: Add clkctrl clock data for the mcan clocks bus: ti-sysc: Use 2-factor allocator arguments Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-15Merge tag 'arm-soc/for-4.19/drivers' of https://github.com/Broadcom/stblinux ↵Olof Johansson8-2/+247
into next/drivers This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes for 4.19, please pull the following: - Doug updates the low-level suspend/resume code for ARM SoCs to support the latest rev B3.0 memory controllers found on newer chips with an appropriate match structure to perform the correct entry sequencing - Florian updates the Device Tree binding document for these memory controllers to list all possible compatible strings that exist given the supported memory controllers. - Stefan adds the GET_THROTTLED firmware property value that is required for the Rasperry Pi voltage monitoring driver and updates the Raspberry Pi firmware driver accordingly to register such a device using the HWMON subsystem. Finally he adds support for reporting under voltage conditions using a specialized HWMON driver. * tag 'arm-soc/for-4.19/drivers' of https://github.com/Broadcom/stblinux: firmware: raspberrypi: Remove VLA usage firmware: raspberrypi: Register hwmon driver hwmon: Add support for RPi voltage sensor soc: bcm: brcmstb: Add missing DDR MEMC compatible strings soc: bcm: brcmstb: pm: Add support for newer rev B3.0 controllers ARM: bcm2835: Add GET_THROTTLED firmware property Signed-off-by: Olof Johansson <olof@lixom.net>
2018-07-12misc: vexpress/syscfg: Use devm_ioremap_resource() to map memorySudeep Holla1-7/+3
Instead of checking the return value of platform_get_resource(), we can use devm_ioremap_resource() which has the NULL pointer check and the memory region requesting. devm_ioremap_resource is designed to replace calls to devm_request_mem_region followed by devm_ioremap, so let's use the same. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-07-11soc: imx: gpc: Disable 6sl display power gating for ERR006287Leonard Crestez1-0/+10
The imx6sl chip errata document describes ERR006287 like this: > Upon resuming from power gating, the modules in the display power domain (eLCDIF, EPDC, PXP and SPDC) might fail to perform register reads correctly. > When the modules listed above are used, do not use power gating on the display power domain. Link: https://www.nxp.com/docs/en/errata/IMX6SLCE.pdf#page=62 Handle this in the safest possible way by keeping the DISP domain always-on. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-11drivers: soc: sunxi: Add support for the C1 SRAM regionMaxime Ripard1-0/+10
This introduces support for the SRAM C1 section, that is controlled by the system controller. This SRAM area can be muxed either to the CPU or the Video Engine, that needs this area to store various tables (e.g. the Huffman VLD decoding tables). This only supports devices with the same layout as the A10 (which also includes the A13, A20, A33 and other SoCs). Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11dt-bindings: sram: sunxi: Populate valid sections compatiblesPaul Kocialkowski1-0/+17
This adds a list of valid SRAM sections compatibles for the A13, A20, A23 and H3 platforms. Per-platform compatibles are introduced for the SRAM sections of these platforms, with the A10 compatibles also listed as valid when applicable. In particular, compatibles for the C1 SRAM section are introduced. Other SRAMs (C2 and C3 in particular) are left out. They will be added we needed. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> [Maxime: Added the A10 compatible as fallback, not alternatives] Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11dt-bindings: sram: sunxi: Add A13, A20, A23 and H3 dedicated bindingsPaul Kocialkowski1-0/+4
This introduces dedicated bindings for the system control blocks found on the A13, A20, A23 and H3 sunxi platforms. Since the controllers on the A33 are the very same as those on the A23, no specific compatible is introduced for it. These bindings are introduced to allow reflecting the differences that exist between these controllers, that may become significant to driver implementations. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> [Maxime: Added A10 fallback compatible for the A20] Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11soc: sunxi: sram: Add dt match for the A10 system-control compatiblePaul Kocialkowski1-0/+4
This binds the new A10 system-control compatible to the associated driver, with the same driver data as the previous compatible. Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-11dt-bindings: sram: sunxi: Introduce new A10 binding for system-controlPaul Kocialkowski1-3/+4
Following-up on the introduction of a new binding for the A64, this introduces a system-control binding for the A10 as a replacement of the sram-controller binding. This change is motivated by consistency with the Allwinner literature, that mentions system control over SRAM controller. Moreover, the system control block is sometimes used for more than SRAM (e.g. for muxing related to the ethernet PHY). Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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