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2016-05-31pinctrl: uniphier: allow to have pinctrl node under syscon nodeMasahiro Yamada7-9/+35
Currently, the UniPhier pinctrl driver itself is a syscon, but it turned out much more reasonable to make it a child node of a syscon because our syscon node consists of a bunch of system configuration registers, not only pinctrl, but also phy, and misc registers. It is difficult to split the node. To allow to migrate to the new DT structure, this commit adds new compatible strings to not disturb the existing DT. After a while, the old binding will be removed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: add System Bus pin-mux settingsMasahiro Yamada6-0/+166
This is needed to get access to UniPhier System Bus (external bus). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: add dedicated pins to pin tables of PH1-LD4/sLD8Masahiro Yamada2-0/+77
These pins do not support pin-muxing, but it is useful to support pin configuration for them. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: support pin configuration for dedicated pinsMasahiro Yamada8-147/+144
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration (pin biasing, drive strength control), but not pin-muxing. Allow to fill the mux value table with -1 for those pins; pins with mux value -1 will be skipped in the pin-mux set function. The mux value type should be changed from "unsigned" to "int" in order to accommodate -1 as a special case. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: support per-pin input enable for new SoCsMasahiro Yamada2-11/+14
Upcoming new pinctrl drivers for PH1-LD11 and PH-LD20 support input signal gating for each pin. (While, existing ones only support it per pin-group.) This commit updates the core part for that. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: introduce capability flagMasahiro Yamada8-31/+34
The core part of the UniPhier pinctrl driver needs to support a new capability for upcoming UniPhier ARMv8 SoCs. This sometimes happens because pinctrl drivers include really SoC-specific stuff. This commit intends to tidy up SoC-specific parameters of the existing drivers before adding the new one. Having just one flag would be better than adding a new struct member every time a new SoC-specific capability comes up. At this time, there is one flag, UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE. This capability (I'd say rather quirk) was added for PH1-Pro4 and PH1-Pro5 as requirement from a customer. For those SoCs, one pin-mux setting is controlled by the combination of two separate registers; the LSB bits at register offset (8 * N) and the MSB bits at (8 * N + 4). Because it is impossible to update two separate registers atomically, the LOAD_PINCTRL register should be set in order to make the pin-mux settings really effective. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: support pin configuration in sparse pin spaceMasahiro Yamada1-44/+42
Unfortunately, the pin number of the new SoC, PH1-LD11, is not contiguous. The base frame work must be adjusted to support the new SoC pinctrl driver. The pin_desc_get() exploits radix-tree for pin look-up, so it works more efficiently with sparse pin space. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: support 3-bit drive strength controlMasahiro Yamada2-6/+21
The new ARMv8 SoC, PH1-LD20, supports more fine-grained drive strength control. Drive strength of some pins are controlled by 3-bit width registers (8-level granularity). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: rename macros for drive strength controlMasahiro Yamada8-1407/+1407
The new ARMv8 SoC, PH1-LD20, supports more fine-grained drive strength control. Some of the configuration registers on it have 3-bit width. The feature will be supported in the next commit, but a problem is that macro names are getting longer and longer in the current naming scheme. Before moving forward, this commit renames macros as follows: UNIPHIER_PIN_DRV_4_8 -> UNIPHIER_PIN_DRV_1BIT UNIPHIER_PIN_DRV_8_12_16_20 -> UNIPHIER_PIN_DRV_2BIT UNIPHIER_PIN_DRV_FIXED_4 -> UNIPHIER_PIN_DRV_FIXED4 UNIPHIER_PIN_DRV_FIXED_5 -> UNIPHIER_PIN_DRV_FIXED5 UNIPHIER_PIN_DRV_FIXED_8 -> UNIPHIER_PIN_DRV_FIXED8 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: allocate struct pinctrl_desc in probe functionMasahiro Yamada8-54/+33
Currently, every SoC driver defines struct pinctrl_desc statically, i.e. it consumes memory footprint even if it is not probed. In multi-platform, many pinctrl drivers are linked (generally as built-in objects), although only one of them is actually used. So, it is reasonable to allocate memory dynamically where possible. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: set pinctrl_desc name in common probe functionMasahiro Yamada7-24/+7
Every SoC driver sets the same name for struct pinctrl_desc and platform_driver. The common probe function can set desc->name instead of duplicating strings in each SoC driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: set pinctrl_desc owner in common probe functionMasahiro Yamada7-6/+1
The owner of the struct pinctrl_desc matches that of platform_driver. Set it in the common probe function. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: fix register offsets for drive strength controlMasahiro Yamada5-46/+46
These pin tables were generated by parsing hardware documents with a script, but the script had a bug. Fix the register offsets. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: rename function and variable namesMasahiro Yamada6-126/+126
Make function/variable names match the file names for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: uniphier: fix .pin_dbg_show() callbackMasahiro Yamada1-0/+6
Without this, reading the "pins" in the debugfs causes kernel BUG. Fixes: 6e9088920258 ("pinctrl: UniPhier: add UniPhier pinctrl core support") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: imx: fix initialization of imx_pinctrl_descPeng Fan1-11/+15
To i.MX7D, there are two iomux controllers, iomuxc and iomuxc_lpsr. They should not share one pin controller descriptor, otherwise the value filled into imx_pinctrl_desc when probing the first iomux controller will be overridden when probing the second one. In this patch, discard the static allcoated imx_pinctrl_desc and switch to dynamically allcate pin controller descriptor for each iomux controller. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Stefan Agner <stefan@agner.ch> Cc: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: amlogic: gxbb: add ethernet pinsKevin Hilman1-0/+39
Add EE domain pins for ethernet interface. Acked-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: amlogic: gxbb: add more UART pinsKevin Hilman1-0/+48
Add EE domain pins for UART A, B & C. Acked-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: amlogic: gxbb: add EMMC and SD pinsKevin Hilman1-0/+41
Add EE domain pins for eMMC and SD card. Acked-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: amlogic: gxbb: add UART_AO_B, I2CKevin Hilman1-1/+34
Add pins for some more AO domain devices: UART_AO_B and I2C master & slave. Acked-by: Carlo Caione <carlo@endlessm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: return -ENOMEM instead of -EINVAL for kasprintf() failureMasahiro Yamada1-1/+1
-ENOMEM is more suitable error code because kasprintf() fails in case of memory shortage. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: digicolor: add missing platform_set_drvdata() callMasahiro Yamada1-0/+2
gc_pinctrl_remove() calls platform_get_drvdata(), but I see neither platform_set_drvdata() nor dev_set_drvdata() anywhere in this driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: pinconf: separate config parameters with commas for debugfsMasahiro Yamada2-7/+11
To improve debugfs readability, use commas instead of whitespaces for separating configuration parameters. For example, the "pinconf-pins" dump on my board will change as follows: Without this commit: # head -5 pinconf-pins Pin config settings per pin Format: pin (name): configs pin 0 (ED0): input bias pull down output drive strength (8 mA) input enabled pin 1 (ED1): input bias pull down output drive strength (8 mA) input enabled pin 2 (ED2): input bias pull down output drive strength (8 mA) input enabled With this commit: # head -5 pinconf-pins Pin config settings per pin Format: pin (name): configs pin 0 (ED0): input bias pull down, output drive strength (8 mA), input enabled pin 1 (ED1): input bias pull down, output drive strength (8 mA), input enabled pin 2 (ED2): input bias pull down, output drive strength (8 mA), input enabled Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: copy per-pin driver private data to struct pin_descMasahiro Yamada2-10/+14
Currently, struct pinctrl_pin_desc can have per-pin driver private data, but it is not copied to struct pin_desc. For a driver with sparse pin space, for-loop search like below would be necessary in order to get the driver-specific data for a desired pin number. for (i = 0; i < pctldev->desc->npins; i++) if (pin_number == pctldev->desc->pins[i].number) return pctldev->desc->pins[i].drv_data; This is not efficient for a driver with a large number of pins. So, copy the data to struct pin_desc when each pin is registered for the faster radix tree lookup. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: do not care about blank pin nameMasahiro Yamada3-16/+7
If a pin name is not specified in struct pinctrl_pin_desc, pinctrl_register_one_pin() dynamically assigns its name. So, desc->name is always a valid pointer here. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31pinctrl: stm32: factorize stm32_pconf_input/output_get()Patrice Chotard1-21/+10
As these 2 functions code are 95% similar, factorize them. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-30pinctrl: samsung: Suppress unbinding to prevent theoretical attacksKrzysztof Kozlowski2-0/+2
Although unbinding a pinctrl driver requires root privileges but it still might be used theoretically in certain attacks (by triggering NULL pointer exception or memory corruption). Samsung pincontrol drivers are essential for system operation so their removal is not expected. They do not implement remove() driver callback and they are not buildable as modules. Suppression of the unbinding will prevent triggering NULL pointer exception like this (Odroid XU3): $ echo 13400000.pinctrl > /sys/bus/platform/drivers/samsung-pinctrl/unbind $ cat /sys/kernel/debug/gpio Unable to handle kernel NULL pointer dereference at virtual address 00000c44 pgd = ec41c000 [00000c44] *pgd=6d448835, *pte=00000000, *ppte=00000000 Internal error: Oops: 17 [#1] PREEMPT SMP ARM (samsung_gpio_get) from [<c034f9a0>] (gpiolib_seq_show+0x1b0/0x26c) (gpiolib_seq_show) from [<c01fb8c0>] (seq_read+0x304/0x4b8) (seq_read) from [<c02dbc78>] (full_proxy_read+0x4c/0x64) (full_proxy_read) from [<c01d9fb0>] (__vfs_read+0x2c/0x110) (__vfs_read) from [<c01db400>] (vfs_read+0x8c/0x110) (vfs_read) from [<c01db4c4>] (SyS_read+0x40/0x8c) (SyS_read) from [<c01078c0>] (ret_fast_syscall+0x0/0x3c) Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-30pinctrl: oxnas: Add GPIO get_directionNeil Armstrong1-0/+11
Implement a get_direction callback for the OXNAS GPIO driver in order to have pin output polarity in debugfs and new userspace ABI. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-30pinctrl: max77620: add pincontrol driver for MAX77620/MAX20024Laxman Dewangan3-0/+689
MAXIM Semiconductor's PMIC, MAX77620/MAX20024 has 8 GPIO pins which also act as the special function in alternate mode. Also there is configuration like push-pull, open drain, FPS timing etc for these pins. Add pin control driver to configure these parameters through pin control APIs. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-30pinctrl: add DT binding doc for pincontrol of PMIC max77620/max20024Laxman Dewangan1-0/+127
Maxim Semiconductor's PMIC MAX77620/MAX20024 has 8 GPIO pins which act as GPIO as well as special function mode. Add DT binding document to configure pins in function mode as well as pin configuration parameters. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-30pinctrl: tegra: Get rid of parked_regLaxman Dewangan1-1/+1
Remove the use of parked_reg and use parked_bit for to know whether field is supported or not. This is fix for the patch commit 1d18a3f0f0809f6c71f1f6e9e268ee904ce0b588 "pinctrl: tegra: avoid parked_reg and parked_bank Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-30Revert "Revert "pinctrl: tegra: avoid parked_reg and parked_bank""Linus Walleij7-20/+14
This reverts commit 0d5358330c20d50e52e3e65ff07a5db8007041fc.
2016-05-30dt-bindings: Add Oxford Semiconductor OXNAS pinctrl and gpio bindingsNeil Armstrong2-0/+104
Add pinctrl and gpio DT bindings for Oxford Semiconductor OXNAS SoC Family. This version supports the ARM926EJ-S based OX810SE SoC with 34 IO pins. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-30pinctrl: Add Oxford Semiconductor OXNAS pinctrl and gpio driverNeil Armstrong3-0/+847
Add pinctrl and gpio control support to Oxford Semiconductor OXNAS SoC Family. This version supports the ARM926EJ-S based OX810SE SoC with 34 IO pins. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-29Linux 4.7-rc1v4.7-rc1Linus Torvalds1-3/+3
2016-05-29hash_string: Fix zero-length case for !DCACHE_WORD_ACCESSGeorge Spelvin1-2/+2
The self-test was updated to cover zero-length strings; the function needs to be updated, too. Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: George Spelvin <linux@sciencehorizons.net> Fixes: fcfd2fbf22d2 ("fs/namei.c: Add hashlen_string() function") Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-05-29Rename other copy of hash_string to hashlen_stringGeorge Spelvin1-2/+2
The original name was simply hash_string(), but that conflicted with a function with that name in drivers/base/power/trace.c, and I decided that calling it "hashlen_" was better anyway. But you have to do it in two places. [ This caused build errors for architectures that don't define CONFIG_DCACHE_WORD_ACCESS - Linus ] Signed-off-by: George Spelvin <linux@sciencehorizons.net> Reported-by: Guenter Roeck <linux@roeck-us.net> Fixes: fcfd2fbf22d2 ("fs/namei.c: Add hashlen_string() function") Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-05-29hpfs: implement the show_options methodMikulas Patocka1-11/+32
The HPFS filesystem used generic_show_options to produce string that is displayed in /proc/mounts. However, there is a problem that the options may disappear after remount. If we mount the filesystem with option1 and then remount it with option2, /proc/mounts should show both option1 and option2, however it only shows option2 because the whole option string is replaced with replace_mount_options in hpfs_remount_fs. To fix this bug, implement the hpfs_show_options function that prints options that are currently selected. Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-05-29affs: fix remount failure when there are no options changedMikulas Patocka1-2/+3
Commit c8f33d0bec99 ("affs: kstrdup() memory handling") checks if the kstrdup function returns NULL due to out-of-memory condition. However, if we are remounting a filesystem with no change to filesystem-specific options, the parameter data is NULL. In this case, kstrdup returns NULL (because it was passed NULL parameter), although no out of memory condition exists. The mount syscall then fails with ENOMEM. This patch fixes the bug. We fail with ENOMEM only if data is non-NULL. The patch also changes the call to replace_mount_options - if we didn't pass any filesystem-specific options, we don't call replace_mount_options (thus we don't erase existing reported options). Fixes: c8f33d0bec99 ("affs: kstrdup() memory handling") Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Cc: stable@vger.kernel.org # v4.1+ Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-05-29hpfs: fix remount failure when there are no options changedMikulas Patocka1-2/+3
Commit ce657611baf9 ("hpfs: kstrdup() out of memory handling") checks if the kstrdup function returns NULL due to out-of-memory condition. However, if we are remounting a filesystem with no change to filesystem-specific options, the parameter data is NULL. In this case, kstrdup returns NULL (because it was passed NULL parameter), although no out of memory condition exists. The mount syscall then fails with ENOMEM. This patch fixes the bug. We fail with ENOMEM only if data is non-NULL. The patch also changes the call to replace_mount_options - if we didn't pass any filesystem-specific options, we don't call replace_mount_options (thus we don't erase existing reported options). Fixes: ce657611baf9 ("hpfs: kstrdup() out of memory handling") Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-05-29Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds67-258/+373
Pull more MIPS updates from Ralf Baechle: "This is the secondnd batch of MIPS patches for 4.7. Summary: CPS: - Copy EVA configuration when starting secondary VPs. EIC: - Clear Status IPL. Lasat: - Fix a few off by one bugs. lib: - Mark intrinsics notrace. Not only are the intrinsics uninteresting, it would cause infinite recursion. MAINTAINERS: - Add file patterns for MIPS BRCM device tree bindings. - Add file patterns for mips device tree bindings. MT7628: - Fix MT7628 pinmux typos. - wled_an pinmux gpio. - EPHY LEDs pinmux support. Pistachio: - Enable KASLR VDSO: - Build microMIPS VDSO for microMIPS kernels. - Fix aliasing warning by building with `-fno-strict-aliasing' for debugging but also tracing them might result in recursion. Misc: - Add missing FROZEN hotplug notifier transitions. - Fix clk binding example for varioius PIC32 devices. - Fix cpu interrupt controller node-names in the DT files. - Fix XPA CPU feature separation. - Fix write_gc0_* macros when writing zero. - Add inline asm encoding helpers. - Add missing VZ accessor microMIPS encodings. - Fix little endian microMIPS MSA encodings. - Add 64-bit HTW fields and fix its configuration. - Fix sigreturn via VDSO on microMIPS kernel. - Lots of typo fixes. - Add definitions of SegCtl registers and use them" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (49 commits) MIPS: Add missing FROZEN hotplug notifier transitions MIPS: Build microMIPS VDSO for microMIPS kernels MIPS: Fix sigreturn via VDSO on microMIPS kernel MIPS: devicetree: fix cpu interrupt controller node-names MIPS: VDSO: Build with `-fno-strict-aliasing' MIPS: Pistachio: Enable KASLR MIPS: lib: Mark intrinsics notrace MIPS: Fix 64-bit HTW configuration MIPS: Add 64-bit HTW fields MAINTAINERS: Add file patterns for mips device tree bindings MAINTAINERS: Add file patterns for mips brcm device tree bindings MIPS: Simplify DSP instruction encoding macros MIPS: Add missing tlbinvf/XPA microMIPS encodings MIPS: Fix little endian microMIPS MSA encodings MIPS: Add missing VZ accessor microMIPS encodings MIPS: Add inline asm encoding helpers MIPS: Spelling fix lets -> let's MIPS: VR41xx: Fix typo MIPS: oprofile: Fix typo MIPS: math-emu: Fix typo ...
2016-05-29fs: fix binfmt_aout.c build errorGuenter Roeck1-1/+0
Various builds (such as i386:allmodconfig) fail with fs/binfmt_aout.c:133:2: error: expected identifier or '(' before 'return' fs/binfmt_aout.c:134:1: error: expected identifier or '(' before '}' token [ Oops. My bad, I had stupidly thought that "allmodconfig" covered this on x86-64 too, but it obviously doesn't. Egg on my face. - Linus ] Fixes: 5d22fc25d4fc ("mm: remove more IS_ERR_VALUE abuses") Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-05-29Merge branch 'hash' of git://ftp.sciencehorizons.net/linuxLinus Torvalds17-150/+734
Pull string hash improvements from George Spelvin: "This series does several related things: - Makes the dcache hash (fs/namei.c) useful for general kernel use. (Thanks to Bruce for noticing the zero-length corner case) - Converts the string hashes in <linux/sunrpc/svcauth.h> to use the above. - Avoids 64-bit multiplies in hash_64() on 32-bit platforms. Two 32-bit multiplies will do well enough. - Rids the world of the bad hash multipliers in hash_32. This finishes the job started in commit 689de1d6ca95 ("Minimal fix-up of bad hashing behavior of hash_64()") The vast majority of Linux architectures have hardware support for 32x32-bit multiply and so derive no benefit from "simplified" multipliers. The few processors that do not (68000, h8/300 and some models of Microblaze) have arch-specific implementations added. Those patches are last in the series. - Overhauls the dcache hash mixing. The patch in commit 0fed3ac866ea ("namei: Improve hash mixing if CONFIG_DCACHE_WORD_ACCESS") was an off-the-cuff suggestion. Replaced with a much more careful design that's simultaneously faster and better. (My own invention, as there was noting suitable in the literature I could find. Comments welcome!) - Modify the hash_name() loop to skip the initial HASH_MIX(). This would let us salt the hash if we ever wanted to. - Sort out partial_name_hash(). The hash function is declared as using a long state, even though it's truncated to 32 bits at the end and the extra internal state contributes nothing to the result. And some callers do odd things: - fs/hfs/string.c only allocates 32 bits of state - fs/hfsplus/unicode.c uses it to hash 16-bit unicode symbols not bytes - Modify bytemask_from_count to handle inputs of 1..sizeof(long) rather than 0..sizeof(long)-1. This would simplify users other than full_name_hash" Special thanks to Bruce Fields for testing and finding bugs in v1. (I learned some humbling lessons about "obviously correct" code.) On the arch-specific front, the m68k assembly has been tested in a standalone test harness, I've been in contact with the Microblaze maintainers who mostly don't care, as the hardware multiplier is never omitted in real-world applications, and I haven't heard anything from the H8/300 world" * 'hash' of git://ftp.sciencehorizons.net/linux: h8300: Add <asm/hash.h> microblaze: Add <asm/hash.h> m68k: Add <asm/hash.h> <linux/hash.h>: Add support for architecture-specific functions fs/namei.c: Improve dcache hash function Eliminate bad hash multipliers from hash_32() and hash_64() Change hash_64() return value to 32 bits <linux/sunrpc/svcauth.h>: Define hash_str() in terms of hashlen_string() fs/namei.c: Add hashlen_string() function Pull out string hash to <linux/stringhash.h>
2016-05-28h8300: Add <asm/hash.h>George Spelvin2-0/+54
This will improve the performance of hash_32() and hash_64(), but due to complete lack of multi-bit shift instructions on H8, performance will still be bad in surrounding code. Designing H8-specific hash algorithms to work around that is a separate project. (But if the maintainers would like to get in touch...) Signed-off-by: George Spelvin <linux@sciencehorizons.net> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: uclinux-h8-devel@lists.sourceforge.jp
2016-05-28microblaze: Add <asm/hash.h>George Spelvin2-0/+82
Microblaze is an FPGA soft core that can be configured various ways. If it is configured without a multiplier, the standard __hash_32() will require a call to __mulsi3, which is a slow software loop. Instead, use a shift-and-add sequence for the constant multiply. GCC knows how to do this, but it's not as clever as some. Signed-off-by: George Spelvin <linux@sciencehorizons.net> Cc: Alistair Francis <alistair.francis@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com>
2016-05-28m68k: Add <asm/hash.h>George Spelvin2-0/+60
This provides a multiply by constant GOLDEN_RATIO_32 = 0x61C88647 for the original mc68000, which lacks a 32x32-bit multiply instruction. Yes, the amount of optimization effort put in is excessive. :-) Shift-add chain found by Yevgen Voronenko's Hcub algorithm at http://spiral.ece.cmu.edu/mcm/gen.html Signed-off-by: George Spelvin <linux@sciencehorizons.net> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Greg Ungerer <gerg@linux-m68k.org> Cc: Andreas Schwab <schwab@linux-m68k.org> Cc: Philippe De Muyter <phdm@macq.eu> Cc: linux-m68k@lists.linux-m68k.org
2016-05-28<linux/hash.h>: Add support for architecture-specific functionsGeorge Spelvin6-4/+299
This is just the infrastructure; there are no users yet. This is modelled on CONFIG_ARCH_RANDOM; a CONFIG_ symbol declares the existence of <asm/hash.h>. That file may define its own versions of various functions, and define HAVE_* symbols (no CONFIG_ prefix!) to suppress the generic ones. Included is a self-test (in lib/test_hash.c) that verifies the basics. It is NOT in general required that the arch-specific functions compute the same thing as the generic, but if a HAVE_* symbol is defined with the value 1, then equality is tested. Signed-off-by: George Spelvin <linux@sciencehorizons.net> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Greg Ungerer <gerg@linux-m68k.org> Cc: Andreas Schwab <schwab@linux-m68k.org> Cc: Philippe De Muyter <phdm@macq.eu> Cc: linux-m68k@lists.linux-m68k.org Cc: Alistair Francis <alistai@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: uclinux-h8-devel@lists.sourceforge.jp
2016-05-28fs/namei.c: Improve dcache hash functionGeorge Spelvin1-40/+81
Patch 0fed3ac866 improved the hash mixing, but the function is slower than necessary; there's a 7-instruction dependency chain (10 on x86) each loop iteration. Word-at-a-time access is a very tight loop (which is good, because link_path_walk() is one of the hottest code paths in the entire kernel), and the hash mixing function must not have a longer latency to avoid slowing it down. There do not appear to be any published fast hash functions that: 1) Operate on the input a word at a time, and 2) Don't need to know the length of the input beforehand, and 3) Have a single iterated mixing function, not needing conditional branches or unrolling to distinguish different loop iterations. One of the algorithms which comes closest is Yann Collet's xxHash, but that's two dependent multiplies per word, which is too much. The key insights in this design are: 1) Barring expensive ops like multiplies, to diffuse one input bit across 64 bits of hash state takes at least log2(64) = 6 sequentially dependent instructions. That is more cycles than we'd like. 2) An operation like "hash ^= hash << 13" requires a second temporary register anyway, and on a 2-operand machine like x86, it's three instructions. 3) A better use of a second register is to hold a two-word hash state. With careful design, no temporaries are needed at all, so it doesn't increase register pressure. And this gets rid of register copying on 2-operand machines, so the code is smaller and faster. 4) Using two words of state weakens the requirement for one-round mixing; we now have two rounds of mixing before cancellation is possible. 5) A two-word hash state also allows operations on both halves to be done in parallel, so on a superscalar processor we get more mixing in fewer cycles. I ended up using a mixing function inspired by the ChaCha and Speck round functions. It is 6 simple instructions and 3 cycles per iteration (assuming multiply by 9 can be done by an "lea" instruction): x ^= *input++; y ^= x; x = ROL(x, K1); x += y; y = ROL(y, K2); y *= 9; Not only is this reversible, two consecutive rounds are reversible: if you are given the initial and final states, but not the intermediate state, it is possible to compute both input words. This means that at least 3 words of input are required to create a collision. (It also has the property, used by hash_name() to avoid a branch, that it hashes all-zero to all-zero.) The rotate constants K1 and K2 were found by experiment. The search took a sample of random initial states (I used 1023) and considered the effect of flipping each of the 64 input bits on each of the 128 output bits two rounds later. Each of the 8192 pairs can be considered a biased coin, and adding up the Shannon entropy of all of them produces a score. The best-scoring shifts also did well in other tests (flipping bits in y, trying 3 or 4 rounds of mixing, flipping all 64*63/2 pairs of input bits), so the choice was made with the additional constraint that the sum of the shifts is odd and not too close to the word size. The final state is then folded into a 32-bit hash value by a less carefully optimized multiply-based scheme. This also has to be fast, as pathname components tend to be short (the most common case is one iteration!), but there's some room for latency, as there is a fair bit of intervening logic before the hash value is used for anything. (Performance verified with "bonnie++ -s 0 -n 1536:-2" on tmpfs. I need a better benchmark; the numbers seem to show a slight dip in performance between 4.6.0 and this patch, but they're too noisy to quote.) Special thanks to Bruce fields for diligent testing which uncovered a nasty fencepost error in an earlier version of this patch. [checkpatch.pl formatting complaints noted and respectfully disagreed with.] Signed-off-by: George Spelvin <linux@sciencehorizons.net> Tested-by: J. Bruce Fields <bfields@redhat.com>
2016-05-28Eliminate bad hash multipliers from hash_32() and hash_64()George Spelvin2-53/+36
The "simplified" prime multipliers made very bad hash functions, so get rid of them. This completes the work of 689de1d6ca. To avoid the inefficiency which was the motivation for the "simplified" multipliers, hash_64() on 32-bit systems is changed to use a different algorithm. It makes two calls to hash_32() instead. drivers/media/usb/dvb-usb-v2/af9015.c uses the old GOLDEN_RATIO_PRIME_32 for some horrible reason, so it inherits a copy of the old definition. Signed-off-by: George Spelvin <linux@sciencehorizons.net> Cc: Antti Palosaari <crope@iki.fi> Cc: Mauro Carvalho Chehab <m.chehab@samsung.com>
2016-05-28Change hash_64() return value to 32 bitsGeorge Spelvin1-3/+3
That's all that's ever asked for, and it makes the return type of hash_long() consistent. It also allows (upcoming patch) an optimized implementation of hash_64 on 32-bit machines. I tried adding a BUILD_BUG_ON to ensure the number of bits requested was never more than 32 (most callers use a compile-time constant), but adding <linux/bug.h> to <linux/hash.h> breaks the tools/perf compiler unless tools/perf/MANIFEST is updated, and understanding that code base well enough to update it is too much trouble. I did the rest of an allyesconfig build with such a check, and nothing tripped. Signed-off-by: George Spelvin <linux@sciencehorizons.net>
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