summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2014-01-18ARM: OMAP2+: clock: use driver API instead of direct memory read/writeTero Kristo7-54/+63
Clock nodes shall use the services provided by underlying drivers to access the hardware registers instead of direct memory read/write. Thus, change all the code to use the new omap2_clk_readl / omap2_clk_writel APIs for this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: OMAP2+: clock: add support for indexed memmapsTero Kristo2-1/+30
Using indexed memmaps is required for isolating the actual memory access from the clock code. Now, the driver providing the support for the clock IP block provides the low level routines for reading/writing clock registers also. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: dts: am43xx clock dataTero Kristo2-0/+684
This patch creates a unique node for each clock in the AM43xx power, reset and clock manager (PRCM). Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: dts: AM35xx: use DT clock dataTero Kristo1-0/+3
AM35xx now uses the clock data from device tree. Most of the data is shared with OMAP3xxx, but as there is some delta, a new base .dtsi file is also created for the SoC. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: dts: omap3 clock dataTero Kristo10-0/+2844
This patch creates a unique node for each clock in the OMAP3 power, reset and clock manager (PRCM). Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: dts: am33xx clock dataTero Kristo2-0/+692
This patch creates a unique node for each clock in the AM33xx power, reset and clock manager (PRCM). Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: dts: DRA7: Add PCIe related clock nodesJ Keerthy1-0/+25
This patch adds optfclk_pciephy_clk and optfclk_pciephy_div_clk which are used by PCIe phy. It also adds a mux clock to choose the source of optfclk_pciephy_div_clk clock. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: dts: DRA7: Change apll_pcie_m2_ck to fixed factor clockJ Keerthy1-6/+3
This patch changes apll_pcie_m2_ck to fixed factor clock as there are no configurable divider associated to m2. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: dts: clk: Add apll related clocksJ Keerthy1-3/+11
The patch adds a mux node to choose the parent of apll_pcie_ck node. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: dts: dra7 clock dataTero Kristo2-0/+2026
This patch creates a unique node for each clock in the DRA7 power, reset and clock manager (PRCM). TODO: apll_pcie clock node is still a dummy in this version, and proper support for the APLL should be added. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: dts: omap5 clock dataTero Kristo2-0/+1453
This patch creates a unique node for each clock in the OMAP5 power, reset and clock manager (PRCM). Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: dts: omap4 clock dataTero Kristo6-0/+1754
This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: add am43xx clock init fileTero Kristo3-0/+120
clk-43xx.c now contains the clock init functionality for am43xx, including DT clock registration and adding of static clkdev entries. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: add omap3 clock init fileTero Kristo4-2/+407
clk-3xxx.c now contains the clock init functionality for omap3, including DT clock registration and adding of static clkdev entries. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: add interface clock support for OMAP3Tero Kristo5-5/+185
OMAP3 has interface clocks in addition to functional clocks, which require special handling for the autoidle and idle status register offsets mainly. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: add am33xx clock init fileTero Kristo4-1/+164
clk-33xx.c now contains the clock init functionality for am33xx, including DT clock registration and adding of static clkdev entries. This patch also moves the omap2_clk_enable_init_clocks declaration to the driver include, as this is needed by the am33xx clock init code. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: add dra7 clock init fileTero Kristo3-0/+334
clk-7xx.c now contains the clock init functionality for dra7, including DT clock registration and adding of static clkdev entries. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: DRA7: Add APLL supportJ Keerthy3-1/+255
The patch adds support for DRA7 PCIe APLL. The APLL sources the optional functional clocks for PCIe module. APLL stands for Analog PLL. This is different when comapred with DPLL meaning Digital PLL, the phase detection is done using an analog circuit. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: omap5: Initialize USB_DPLL at bootRoger Quadros1-1/+17
USB_DPLL must be initialized and locked at boot so that USB modules can work. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: add omap5 clock init fileTero Kristo4-0/+242
clk-54xx.c now contains the clock init functionality for omap5, including DT clock registration and adding of static clkdev entries. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: add omap4 clock init fileTero Kristo4-1/+320
clk-44xx.c now contains the clock init functionality for omap4, including DT clock registration and adding of static clkdev entries. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18clk: ti: add support for basic mux clockTero Kristo5-2/+325
ti,mux-clock provides now a binding for basic mux support. This is just using the basic clock type. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: add support for clockdomain bindingTero Kristo4-1/+96
Some OMAP clocks require knowledge about their parent clockdomain for book keeping purposes. This patch creates a new DT binding for TI clockdomains, which act as a collection of device clocks. Clockdomain itself is rather misleading name for the hardware functionality, as at least on OMAP4 / OMAP5 / DRA7 the clockdomains can be collections of either clocks and/or IP blocks, thus idle-domain or such might be more appropriate. For most cases on these SoCs, the kernel doesn't even need the information and the mappings can be ignored. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: add support for gate clockTero Kristo4-1/+341
This patch adds support for TI specific gate clocks. These behave as basic gate-clock, but have different ops / hw-ops for controlling the actual gate, for example waiting until the clock is ready. Several sub-types are supported: - ti,gate-clock: basic gate clock with default ops/hwops - ti,clkdm-gate-clock: clockdomain level gate control - ti,dss-gate-clock: gate clock with DSS specific hardware handling - ti,am35xx-gate-clock: gate clock with AM35xx specific hardware handling - ti,hsdiv-gate-clock: gate clock with OMAP36xx hardware errata handling Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18clk: ti: add support for TI fixed factor clockTero Kristo3-1/+111
This behaves exactly in similar manner to basic fixed-factor-clock, but adds a few properties on top for handling clock hardware autoidling. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: ti: add support for ti divider-clockTero Kristo5-2/+605
This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18clk: ti: add composite clock supportTero Kristo5-4/+336
This is a multipurpose clock node, which contains support for multiple sub-clocks. Uses basic composite clock type to implement the actual functionality, and TI specific gate, mux and divider clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: add autoidle supportTero Kristo5-1/+188
TI clk driver now routes some of the basic clocks through own registration routine to allow autoidle support. This routine just checks a couple of device node properties and adds autoidle support if required, and just passes the registration forward to basic clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: Add DPLL clock supportTero Kristo6-165/+807
The OMAP clock driver now supports DPLL clock type. This patch also adds support for DT DPLL nodes. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: ti: add init support for clock IP blocksTero Kristo4-3/+150
ti_dt_clk_init_provider() can now be used to initialize the contents of a single clock IP block. This parses all the clocks under the IP block and calls the corresponding init function for them. This patch also introduces a helper function for the TI clock drivers to get register info from DT and append the master IP info to this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18CLK: TI: add DT alias clock registration mechanismTero Kristo4-0/+101
Some devices require their clocks to be available with a specific dev-id con-id mapping. With DT, the clocks can be found by default only with their name, or alternatively through the device node of the consumer. With drivers, that don't support DT fully yet, add mechanism to register specific clock names. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: DRA7XX: Add support for DRA7XX only buildTero Kristo2-8/+11
SOC_DRA7XX was under wrong menu within Kconfig file, which prevented DRA7XX only build. Fixed the kconfig options for this SoC as we are there. voltage.c needs to be added to the DRA7XX build also, otherwise DRA7XX only build will fail. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-18ARM: DRA7XX/AM43XX: randconfig fixesTero Kristo1-0/+3
DRA7XX and AM43XX were missing common clock code from the Makefile, which causes build breakage in DRA7XX / AM43XX only builds once clock support for these SoCs is added. Add the missing entries to the Makefile as preparation of this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17Merge remote-tracking branch 'linaro/clk-next' into clk-nextMike Turquette135-4584/+28392
2014-01-17devicetree: bindings: Document qcom,mmccStephen Boyd1-0/+21
Document the multimedia clock controller found on Qualcomm devices Cc: <devicetree@vger.kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17devicetree: bindings: Document qcom,gccStephen Boyd1-0/+21
Document the global clock controller found on Qualcomm devices. Cc: <devicetree@vger.kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17clk: qcom: Add support for MSM8660's global clock controller (GCC)Stephen Boyd5-0/+3238
Add a driver for the global clock controller found on MSM8660 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)Stephen Boyd5-0/+2858
Add a driver for the global clock controller found on MSM 8974 based platforms. This should allow most multimedia device drivers to probe and control their clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17clk: qcom: Add support for MSM8974's global clock controller (GCC)Stephen Boyd5-0/+3119
Add a driver for the global clock controller found on MSM 8974 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)Stephen Boyd5-0/+2561
Add a driver for the multimedia clock controller found on MSM 8960 based platforms. This should allow multimedia device drivers to probe and control their clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17clk: qcom: Add support for MSM8960's global clock controller (GCC)Stephen Boyd5-0/+3434
Add a driver for the global clock controller found on MSM8960 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17clk: qcom: Add reset controller supportStephen Boyd4-1/+102
Reset controllers and clock controllers are combined into one IP block on Qualcomm chipsets. Usually a reset signal is associated with each clock branch but sometimes a reset signal is associated with a handful of clocks. Either way the register interface is the same; set a bit to assert a reset and clear a bit to deassert a reset. Add support for these types of resets signals. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17clk: qcom: Add support for branches/gate clocksStephen Boyd3-0/+216
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17clk: qcom: Add support for root clock generators (RCGs)Stephen Boyd4-0/+969
Add support for the root clock generators on Qualcomm devices. RCGs are highly customizable mux/divider/counter clocks that can be used to generate almost any rate desired given some input source that is faster than the desired rate. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17clk: qcom: Add support for phase locked loops (PLLs)Stephen Boyd3-0/+289
Add support for Qualcomm's PLLs (phase locked loops). This is sufficient enough to be able to determine the rate the PLL is running at. We can add rate setting support later when it's needed. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17clk: qcom: Add a regmap type clock structStephen Boyd6-0/+170
Add a clock type that associates a regmap pointer and some enable/disable bits with a clk_hw struct. This will be the struct that a hw specific implementation wraps if it wants to use the regmap helper functions. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17clk: Add set_rate_and_parent() opStephen Boyd3-19/+77
Some of Qualcomm's clocks can change their parent and rate at the same time with a single register write. Add support for this hardware to the common clock framework by adding a new set_rate_and_parent() op. When the clock framework determines that both the parent and the rate are going to change during clk_set_rate() it will call the .set_rate_and_parent() op if available and fall back to calling .set_parent() followed by .set_rate() otherwise. Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17reset: Silence warning in reset-controller.hStephen Boyd1-0/+1
If a user of <linux/reset-controller.h> doesn't include <linux/of.h> before including reset-controller.h they'll get a warning as follows: include/linux/reset-controller.h:44:17: warning: 'struct of_phandle_args' declared inside parameter list This is because of_phandle_args is not forward declared. Add the declaration to silence this warning. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17clk: sirf: re-arch to make the codes support both prima2 and atlas6Barry Song7-172/+458
sirfprima2 and sirfatlas6 are two different SoCs in CSR SiRF series. for prima2 and atlas6, there are many shared clocks but there are still some different register layout and hardware clocks, then result in different clock table. here we re-arch the driver to 1. clk-common.c provides common clocks for prima2 and atlas6, 2. clk-prima2.h describles registers of prima2 and clk-prima2.c provides prima2 specific clocks and clock table. 3. clk-atlas6.h describles registers of atlas6 and clk-atlas6.c provides atlas6 specific clocks and clock table. 4. clk.h and clk.c expose external interfaces and provide uniform entry for both prima2 and atlas6. so both prima2 and atlas6 will get support by drivers/clk/sirf. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-15clk: composite: pass mux_hw into determine_rateMike Turquette1-1/+1
The composite clock's .determine_rate implementation can call the underyling .determine_rate callback corresponding to rate_hw or the underlying .determine_rate callback corresponding to mux_hw. In both cases we pass in rate_hw, which is wrong. Fixed by passing mux_hw into the correct callback. Reported-by: Lemon Dai <dailemon.gl@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-12-29 10:23:04 +0300