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2018-01-05x86/mm: Set MODULES_END to 0xffffffffff000000Andrey Ryabinin2-5/+2
2018-01-04x86/process: Define cpu_tss_rw in same section as declarationNick Desaulniers1-1/+1
2018-01-04x86/pti: Switch to kernel CR3 at early in entry_SYSCALL_compat()Thomas Gleixner1-7/+6
2018-01-03x86/dumpstack: Print registers for first stack frameJosh Poimboeuf1-1/+2
2018-01-03x86/dumpstack: Fix partial register dumpsJosh Poimboeuf3-13/+34
2018-01-03x86/pti: Make sure the user/kernel PTEs matchThomas Gleixner1-1/+2
2018-01-03x86/cpu, x86/pti: Do not enable PTI on AMD processorsTom Lendacky1-2/+2
2018-01-03x86/pti: Enable PTI by defaultThomas Gleixner1-0/+1
2017-12-31x86/ldt: Make LDT pgtable free conditionalThomas Gleixner1-1/+2
2017-12-31x86/ldt: Plug memory leak in error pathThomas Gleixner1-1/+7
2017-12-31x86/mm: Remove preempt_disable/enable() from __native_flush_tlb()Thomas Gleixner1-6/+8
2017-12-31x86/smpboot: Remove stale TLB flush invocationsThomas Gleixner1-9/+0
2017-12-23x86/ldt: Make the LDT mapping ROThomas Gleixner4-12/+11
2017-12-23x86/mm/dump_pagetables: Allow dumping current pagetablesThomas Gleixner3-6/+73
2017-12-23x86/mm/dump_pagetables: Check user space page table for WX pagesThomas Gleixner3-6/+27
2017-12-23x86/mm/dump_pagetables: Add page table directory to the debugfs VFS hierarchyBorislav Petkov1-5/+10
2017-12-23x86/mm/pti: Add KconfigDave Hansen1-0/+10
2017-12-23x86/dumpstack: Indicate in Oops whether PTI is configured and enabledVlastimil Babka1-2/+4
2017-12-23x86/mm: Clarify the whole ASID/kernel PCID/user PCID namingPeter Zijlstra1-12/+43
2017-12-23x86/mm: Use INVPCID for __native_flush_tlb_single()Dave Hansen3-28/+60
2017-12-23x86/mm: Optimize RESTORE_CR3Peter Zijlstra2-4/+30
2017-12-23x86/mm: Use/Fix PCID to optimize user/kernel switchesPeter Zijlstra9-33/+162
2017-12-23x86/mm: Abstract switching CR3Dave Hansen1-2/+20
2017-12-23x86/mm: Allow flushing for future ASID switchesDave Hansen2-8/+64
2017-12-23x86/pti: Map the vsyscall page if neededAndy Lutomirski3-3/+69
2017-12-23x86/pti: Put the LDT in its own PGD if PTI is onAndy Lutomirski6-17/+220
2017-12-23x86/mm/64: Make a full PGD-entry size hole in the memory mapAndy Lutomirski2-4/+4
2017-12-23x86/events/intel/ds: Map debug buffers in cpu_entry_areaHugh Dickins2-45/+82
2017-12-23x86/cpu_entry_area: Add debugstore entries to cpu_entry_areaThomas Gleixner5-21/+81
2017-12-23x86/mm/pti: Map ESPFIX into user spaceAndy Lutomirski1-0/+11
2017-12-23x86/mm/pti: Share entry text PMDThomas Gleixner1-0/+10
2017-12-23x86/entry: Align entry text section to PMD boundaryThomas Gleixner1-0/+8
2017-12-23x86/mm/pti: Share cpu_entry_area with user space page tablesAndy Lutomirski1-0/+25
2017-12-23x86/mm/pti: Force entry through trampoline when PTI activeThomas Gleixner1-1/+4
2017-12-23x86/mm/pti: Add functions to clone kernel PMDsAndy Lutomirski1-0/+127
2017-12-23x86/mm/pti: Populate user PGDDave Hansen1-1/+8
2017-12-23x86/mm/pti: Allocate a separate user PGDDave Hansen4-6/+45
2017-12-23x86/mm/pti: Allow NX poison to be set in p4d/pgdDave Hansen1-2/+12
2017-12-23x86/mm/pti: Add mapping helper functionsDave Hansen3-1/+138
2017-12-23x86/pti: Add the pti= cmdline option and documentationBorislav Petkov2-1/+31
2017-12-23x86/mm/pti: Add infrastructure for page table isolationThomas Gleixner9-3/+130
2017-12-23x86/mm/pti: Prepare the x86/entry assembly code for entry/exit CR3 switchingDave Hansen3-7/+128
2017-12-23x86/mm/pti: Disable global pages if PAGE_TABLE_ISOLATION=yDave Hansen1-3/+9
2017-12-23x86/cpufeatures: Add X86_BUG_CPU_INSECUREThomas Gleixner3-2/+13
2017-12-23x86/cpu_entry_area: Prevent wraparound in setup_cpu_entry_area_ptes() on 32bitThomas Gleixner1-1/+2
2017-12-22init: Invoke init_espfix_bsp() from mm_init()Thomas Gleixner4-12/+12
2017-12-22x86/cpu_entry_area: Move it out of the fixmapThomas Gleixner14-88/+143
2017-12-22x86/cpu_entry_area: Move it to a separate unitThomas Gleixner6-135/+159
2017-12-22x86/mm: Create asm/invpcid.hPeter Zijlstra2-48/+54
2017-12-22x86/mm: Put MMU to hardware ASID translation in one placeDave Hansen1-11/+18
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