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2013-04-25ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device treeThomas Abraham2-24/+30
On device tree enabled exynos platforms, retrieve the physical base address of the chip-id controller from device tree and create a virtual I/O mapping for the chip-id controller. This helps to remove the chip-id controller entry from the statically defined I/O mapping tables. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: add PDMA0 changes for exynos5440Subash Patel1-8/+8
PDMA0@0x121000 changes are added into the architecture DTS file. Signed-off-by: Subash Patel <subash.rp@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add cpufreq controller node for Exynos5440 SoCAmit Daniel Kachhap1-0/+12
Add cpufreq controller device node for Exynos5440 SoC for passing parameters like controller base address, interrupt and cpufreq table. This node is added outside cpu0 as this driver is now a platform driver and a new device structure is needed. Cc: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Fix gmac clock ids due to changes in Exynos5440Thomas Abraham1-1/+1
The Exynos5440 common clock driver has changed the clock ID's for some of the clocks. Fix the gmac clock entries in Exynos5440 dtsi file accordingly. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: add device tree file for SD5v1 boardKukjin Kim2-0/+40
This patch adds SD5v1.dts file for supporting SD5v1(Exynos5440) board. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: update bootargs to boot from sda2 for exynos5440-ssdk5440Subash Patel1-5/+1
Updated the bootargs to boot the system with rootfs in /dev/sda2 instead of ramdisk. Signed-off-by: Subash Patel <subash.rp@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: add PMU support in exynos5440Subash Patel1-0/+8
PMU in exynos5440 generates one interrupt per core and needs to be passed from DT to GIC to register it. Signed-off-by: Subash Patel <subash.rp@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add node for GMAC for exynos5440Byungho An1-0/+11
This patch adds node for GMAC for exynos5440 SoC supported by GMAC driver. Signed-off-by: Byungho An <bh74.an@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: list the interrupts generated by pin-controller on Exynos5440Thomas Abraham1-0/+2
Exynos5440 pin-controller generates eight interrupts to support gpio interrupts. List those interrupt numbers in the pin-controller node. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add FIMD DT binding DocumentationVikas Sajjan1-0/+65
Add DT binding documentation for the FIMD IP block found in Samsung SoCs. Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add FIMD node and display timing node to exynos4412-origen.dtsVikas Sajjan1-0/+21
This patch adds FIMD related nodes for the Origen Quad board. Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add FIMD node to exynos4Vikas Sajjan1-0/+12
This patch adds a common FIMD device node for all Exynos4 SoCs. Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add SYSREG block node for S5P/Exynos4 SoC seriesSylwester Nawrocki2-0/+12
This patch adds device tree node for the SYSREG registers block found in Samsung S5P/Exynos SoC series. The SYSREG module generates control signals for the ARM CPU and various IP blocks and buses. SYSREG block registers are exposed through APB bus interface. A sysreg device tree node is to be associated with mfd syscon driver and all SYSREG clients should use regmap interface it provides. It allows to eliminate any possible races and conflicts should different drivers attempt to concurrently access same register. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add display timing node to exynos5250-smdk5250.dtsLeela Krishna Amudala1-0/+16
Add display timing node to exynos5250-smdk5250.dts Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add FIMD node to exynos5Leela Krishna Amudala1-0/+10
This adds common FIMD device node for all Exynos5 SoCs Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add virtual GIC DT bindings for exynos5440Giridhar Maruthy1-1/+5
Exynos5440 has GIC which has virtualization support in them. These are used by KVM. Signed-off-by: Giridhar Maruthy <giridhar.m@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Document usb clocks in samsung,exynos4210-ehci/ohci bindingsDoug Anderson1-0/+10
The exynox4210-ehci and exynos4210-ohci nodes need a clock specified using the common clock framework. Document it. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: add usb 2.0 clock references to exynos5250 device treeDoug Anderson1-0/+6
This is a fixup to two device tree nodes that have already landed but without clock nodes since the transition to common clock happened at the same time. Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Jingoo Han <jg1.han@samsung.com> [gautam.vivek@samsung.com: tested on smdk5250] Tested-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add architected timer nodes for exynos5250Alexander Graf1-0/+8
The exynos 5250 SoC supports A15 style architected timers. Indicate this through the device tree. This is required by KVM. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Declare the gic as a15 compatible for exynos5250Alexander Graf1-2/+6
The GIC in the exynos5250 SoC is A15 compliant. Show this through the device tree, so that we can use the GIC for KVM. Also add the respective A15 memory regions and interrupt links. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add HDMI HPD and regulator node for Arndale boardSachin Kamat1-0/+12
Added HDMI hot plug and regulator nodes to Arndale DT file. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add MFC codec support for Arndale boardSachin Kamat1-0/+5
Added MFC codec node to Arndale DT file. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add vmmc regulator support for Arndale boardSachin Kamat1-0/+11
Added vmmc regulator node to Arndale DT file. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add PMIC node entry for Arndale boardAmit Daniel Kachhap1-1/+254
Added S5M8767 PMIC DT nodes for Arndale board. Only the used LDO's/BUCK are defined here. Also the nodes describe the default/reset state LDO's and no power mangement tuning is implemented. The usage desription can be found in s5m8767 device tree binding documentation. Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add gpio-button entries for Arndale boardTushar Behera1-0/+46
Added GPIO buttons DT node to Arndale board file. Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add disable-wp for card slot on exynos5250-arndaleSachin Kamat1-0/+1
This is required to keep the existing functionality of having no write protect pin on Arndale board. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add pin-control related changes for Arndale boardTushar Behera1-9/+4
Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: add pin state information in client nodes for Exynos5 platformsThomas Abraham5-311/+889
Add default pin state information for all client nodes that require pin configuration support using pinctrl interface. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: add pin state information in client nodes for Exynos4 platformsThomas Abraham2-29/+34
Add default pin state information for all client nodes that require pin configuration support using pinctrl interface. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add Samsung G2D DT bindings documentationSachin Kamat1-0/+20
Added documentaion about G2D bindings. Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add G2D node to exynos4412-origenSachin Kamat1-0/+4
Added G2D DT node to Origen4412 board. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add G2D node to SMDK4412Sachin Kamat1-0/+4
Added G2D DT node to SMDK4412 board. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add G2D node to exynos4x12.dtsiSachin Kamat1-0/+7
Added G2D DT node to exynos4x12.dtsi file. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add G2D node to exynos4210-origenSachin Kamat1-0/+4
Added G2D DT node to Origen4210 board. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add G2D node to SMDKV310Sachin Kamat1-0/+4
Added G2D DT node to SMDKV310 board. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08ARM: dts: Add G2D node to exynos4210.dtsiSachin Kamat1-0/+7
Added G2D DT node to Exynos4210. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08Merge commit 'v3.9-rc5' into next/clk-exynosKukjin Kim1122-6045/+12783
Conflicts: arch/arm/boot/dts/exynos4.dtsi arch/arm/boot/dts/exynos5440.dtsi
2013-04-08ARM: EXYNOS: fix compilation error introduced due to common clock migrationThomas Abraham1-0/+2
The functions exynos4_clk_init and exynos4_clk_register_fixed_ext are applicable only on Exynos4 non-dt platforms. But when building Exynos5 platforms without including Exynos4 platforms, the following errors show up. arch/arm/mach-exynos/built-in.o: In function `exynos_init_time': arch/arm/mach-exynos/common.c:446: undefined reference to `exynos4_clk_init' arch/arm/mach-exynos/common.c:447: undefined reference to `exynos4_clk_register_fixed_ext' Fix this compilation errors by marking these calls as Exynos4 specific. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3}Tushar Behera1-4/+4
In legacy setup, sclk_mmc{0,1,2,3} used PRE_RATIO bit-field (8-bit wide) instead of RATIO bit-field (4-bit wide) for dividing clock rate. With current common clock setup, we are using RATIO bit-field which is creating FIFO read errors while accessing eMMC. Changing over to use PRE_RATIO bit-field fixes this issue. dwmmc_exynos 12200000.dwmmc0: data FIFO error (status=00008020) mmcblk0: error -5 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0 end_request: I/O error, dev mmcblk0, sector 1 Signed-off-by: Tushar Behera <tushar.behera@linaro.org> CC: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08clk: exynos4: export clocks required for fimc-isSylwester Nawrocki2-21/+41
This patch adds clock indexes for ACLK_DIV0, ACLK_DIV1, ACLK_400_MCUISP, ACLK_MCUISP_DIV0, ACLK_MCUISP_DIV1, DIVACLK_400_MCUISP and DIVACLK_200 so these clocks are available to the consumers (Exynos4x12 FIMC-IS subsystem). While at it, indentation of the mux clocks table is corrected. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-08clk: samsung: Fix compilation errorSachin Kamat1-0/+2
Fixes the below compilation error during non-dt build. drivers/clk/samsung/clk.c: In function 'samsung_clk_of_register_fixed_ext': drivers/clk/samsung/clk.c:252:2: error: implicit declaration of function 'for_each_matching_node_and_match' [-Werror=implicit-function-declaration] drivers/clk/samsung/clk.c:252:60: error: expected ';' before '{' token Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos5250: register display block gate clocks to common clock frameworkLeela Krishna Amudala2-1/+15
Add gate clocks for fimd, mie, dsim, dp, mixer and hdmi. Register it to common clock framework. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add support for SoC-specific register save listTomasz Figa5-8/+39
This patch extends suspend/resume support for SoC-specific registers to handle differences in register sets on particular SoCs. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add missing registers to suspend save listTomasz Figa1-0/+33
This patch adds missing clock control registers to the list of registers that should be saved across system suspend. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Remove E4X12 prefix from SRC_DMC registerTomasz Figa1-2/+2
This register is present on all Exynos4 SoCs and so the prefix is misleading. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add E4210 prefix to GATE_IP_PERIR registerTomasz Figa1-8/+8
This definition is specific for Exynos4210 (which has another location than the same register on Exynos4x12 SoCs) and so needs appropriate prefix. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add E4210 prefix to LCD1 clock registersTomasz Figa1-11/+11
This patch adds E4210 prefix to all registers related to LCD1 clock domain, because they are present only on Exynos4210. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Remove SoC-specific registers from save listTomasz Figa1-16/+0
Current clock save list is shared for all Exynos4 SoCs, so it must contain only registers present in all supported SoCs, because accessing unavailable registers might have undefined effect. This patch removes registers specific for particular SoCs from shared save list, as they should be supported by separate SoC-specific lists. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Use SRC_MASK_PERIL{0,1} definitionsTomasz Figa1-11/+19
There are definitions of SRC_MASK_PERIL0 and SRC_MASK_PERIL1 registers, but they are not used for clock definitions. This patch modifies related clock definitions to use defined macros instead of numeric offsets. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Define {E,V}PLL registersTomasz Figa1-4/+12
This patch adds preprocessor definitions of EPLL and VPLL registers and replaces all occurences of offsets of related registers with new definitions. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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