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2014-06-11drm/nouveau/bios: extend connector table parsingBen Skeggs4-16/+79
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/disp: nothing to see hereBen Skeggs3-21/+42
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/i2c/anx9805: add debugging to aux transactionsBen Skeggs2-5/+34
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/i2c: introduce locking at a per-port levelBen Skeggs14-34/+380
There's also provisions to allow a pad to be locked with a specific routing, for an indefinite period of time. This will be used in future patches. The G94+ pad driver will now also power-down pads when not required. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/i2c: balance port acquire/releaseBen Skeggs4-14/+56
This was a half-finished hack before, just enough to handle the shared aux/i2c pad thing on G94 and up. We got lucky with locking etc up until now, as this was (generally) all protected by the DRM mode_config lock. It's about to become a lot more likely to hit the races. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/gk104/i2c: add aux channel interrupt driverBen Skeggs6-6/+79
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/g94/i2c: add aux channel interrupt driverBen Skeggs3-0/+39
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/i2c: add interfaces to support handling aux channel interruptsBen Skeggs4-0/+94
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/i2c: start hiding subdev-internal interfacesBen Skeggs21-236/+194
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/i2c: remove unnecessary i2c_set_adapdata()Ben Skeggs1-2/+0
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/i2c: properly hand aux reply back to caller, and only retry on deferBen Skeggs4-14/+20
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nv50-/mc: also pass PMGR interrupts onto I2C subdevBen Skeggs3-3/+6
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/gpio: send separate event types for high/low transitionsBen Skeggs4-14/+17
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/gpio: use base constructor for all implementationsBen Skeggs8-119/+47
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/gpio: move on-reset intr disable-and-ack to common codeBen Skeggs7-138/+80
Re-uses the implementation's accessor functions rather than requiring and init/fini implementation for each chipset. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/gpio: split "toggled" interrupt into "went high" / "went low"Ben Skeggs7-114/+156
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/gpio: split g92 class from nv50Ben Skeggs11-58/+110
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/gpio: use indirect pointer to base class definitionBen Skeggs13-75/+75
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/disp/dp: support training to highest rate, rather than a targetBen Skeggs1-23/+34
We really want this for, at least, MST devices. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/disp/dp: support postcursor in link trainingBen Skeggs2-11/+53
Not enabled at the backends yet, but will read status and send back max reached at level 0. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-11drm/nouveau/core: allow event source to handle multiple event types per indexBen Skeggs21-77/+112
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/gk208/gr: add missing registers to grctx initIlia Mirkin1-0/+2
This fixes hangs on GK208 which happen instantaneously on trying to use a geometry shader. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org # v3.14+
2014-06-10drm/nouveau/kms/nv04-nv40: fix pageflip events via special case.Mario Kleiner1-2/+8
Cards with nv04 display engine can't reliably use vblank counts and timestamps computed via drm_handle_vblank(), as the function gets invoked after sending the pageflip events. Fix this by defaulting to the old crtcid = -1 fallback path on <= NV-50 cards, and only using the precise path on NV-50 and later. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: <stable@vger.kernel.org> # 3.13+
2014-06-10drm/nv50-/mc: fix kms pageflip events by reordering irq handling order.Mario Kleiner3-3/+3
Whenever a single nouveau_mc_intr() main gpu irq-handler invocation was responsible for calling both, the vblank-irq handler (display engine irq) and kms-pageflip completion handler (from fifo irq), the order of invocation was wrong. nouveau_finish_flip() was called before drm_handle_vblank() for the vblank of pageflip completion, so the emitted pageflip event contained stale vblank count and timestamp from previous vblank. This caused failure in userspace to timestamp properly. Reorder order of invocation of engine irq handlers: Put NVDEV_ENGINE_DISP always on top, and thereby before NVDEV_ENGINE_FIFO, so that drm_handle_vblank() gets called to update vblank timestamps and count before potential pageflip events make use of that information. This works on nv-50 and later, where kms-pageflip completion triggers an irq either after a separate vblank irq, or both pageflip and vblank trigger one common irq invocation, but never before vblank irqs. v2 (Ben): - removed mods for nv04-nv40, it doesn't help there anyway - this is considered a hack, and a better solution should be found Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: <stable@vger.kernel.org> # 3.13+
2014-06-10drm/nouveau/disp/nv04-nv40: abort scanoutpos query on vga analog.Mario Kleiner1-0/+8
nv04_disp_scanoutpos() must abort to trigger simple timestamping fallback if vtotal/htotal regs return zero. This happens if the output isn't a digital output, but a vga analog output, as the regs don't get initialized in that case. Fixes timestamping failure on nv-40 and earlier with vga output. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: <stable@vger.kernel.org> # 3.14+
2014-06-10drm/nv50-/kms: wait for enough ring space in crtc_prepare()Ben Skeggs1-2/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/disp/dp: support training pattern 3Ben Skeggs2-2/+8
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/disp/dp: support aux read interval during link trainingBen Skeggs2-6/+8
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/gk104/gpio: fix incorrect interrupt register usageBen Skeggs1-5/+5
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/core: punt all object state change messages to trace levelBen Skeggs1-5/+5
Leave debug for the more interesting bits of info. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/clk: allow end-user reclocking for nv40, nvaa, and nve0 clock typesIlia Mirkin9-12/+23
Use with caution. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/fb: default NvMemExec to on, turning it off is used for ↵Ilia Mirkin4-4/+4
debugging only Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/bios: fix a potential NULL deref in the PROM shadowing functionMartin Peres1-4/+5
Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/i2c: bump the i2c delay for the adt7473Martin Peres1-3/+3
Some adt7473 can't manage the 20µs delay we use for the bitbanging, bumping it to 40µs seem to do the trick. Signed-off-by: Martin Peres <martin.peres@free.fr> Tested-by: Marcel Dopita <mdop@seznam.cz>
2014-06-10drm/nouveau/therm/fan/tach: default to 2 pulses per revolutionMartin Peres1-1/+1
I spent some time this weekend trying to find in the vbios the number of pulses per revolutions in the vbios but couldn't find it. It would seem all my cards have 2 pulses per revolution so let's stick to that until further notice. Thermal table's id 0x48 may indicate this information but it would seem that changing the value results in the blob power or clock gating the RPM counter... We should ask NVIDIA about that, should be trivial-enough for them to answer. Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nvf0/device: enable video decoding engines on gk110/gk208John Rowley1-6/+0
Only tested on nvf1, was advised to enable on all. Signed-off-by: John Rowley <john.rowley08@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nvf1/device: add support for 0xf1 (gk110b)John Rowley1-0/+35
Signed-off-by: John Rowley <john.rowley08@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/device: support for probing GK20AAlexandre Courbot1-0/+17
Set the correct subdev/engine classes when GK20A (0xea) is probed. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/graph: add GK20A supportAlexandre Courbot8-9/+123
Add a GR device for GK20A based on NVE4, with the correct classes definitions (GK20A's 3D class is 0xa297). Most of the NVE4 code can be used on GK20A, so make relevant bits of NVE4 available to other chips as well. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/graph: pad firmware code at load timeAlexandre Courbot1-0/+4
Pad the microcode to a multiple of 0x40 words, otherwise firmware will fail to run from non-prepadded firmware files. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/graph: enable when using external fwAlexandre Courbot1-3/+7
nvc0_graph_ctor() would only let the graphics engine be enabled if its oclass has a proper microcode linked to it. This prevents GR from being enabled at all on chips that rely exclusively on external firmware, even though such a use-case is valid. Relax the conditions enabling the GR engine to also include the case where an external firmware has also been loaded. Also switch to external firmware if the graph class has no microcode linked to it. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/fifo: add GK20A supportAlexandre Courbot4-0/+38
GK20A's FIFO is compatible with NVE0, but only features 128 channels and 1 runlist. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/fb: add GK20A supportAlexandre Courbot5-0/+212
Add a simple FB device for GK20A, as well as a RAM implementation suitable for chips that use system memory as video RAM. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/ibus: add GK20A supportAlexandre Courbot3-0/+105
Add support for initializing the priv ring of GK20A. This is done by the BIOS on desktop GPUs, but needs to be done by hand on Tegra. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nvc0/bar: support chips without BAR3Alexandre Courbot1-55/+59
Adapt the NVC0 BAR driver to make it able to support chips that do not expose a BAR3. When this happens, BAR1 is then used for USERD mapping and the BAR alloc() functions is disabled, making GPU objects unable to rely on BAR for data access and falling back to PRAMIN. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/nouveau/bar: only ioremap BAR3 if it existsAlexandre Courbot1-2/+4
Some chips that use system memory exclusively (e.g. GK20A) do not expose 2 BAR regions. For them only BAR1 exists, and it should be used for USERD mapping. Do not map BAR3 if its resource does not exist. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-06-10drm/doc: Fix nouveau typoDamien Lespiau1-1/+1
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-10Merge tag 'drm/panel/for-3.16-rc1' of ↵Dave Airlie9-0/+149
git://anongit.freedesktop.org/tegra/linux into drm-next drm/panel: Changes for v3.16-rc1 This set of commits contains a couple of fixes to existing panel drivers and support for some new panels. One commit touches the DRM core in that in modifies the MIPI DSI support to hook up the shutdown function so that drivers can provide code that's run on shutdown. This is used by a subsequent commit to make the simple panel driver power off the backlight on shutdown. * tag 'drm/panel/for-3.16-rc1' of git://anongit.freedesktop.org/tegra/linux: drm/panel: simple - Add AUO B133XTN01 panel support drm/panel: simple - Disable panel on shutdown drm/panel: add support for EDT ET057090DHU panel drm/panel: Add support for EDT ETM0700G0DH6 and ET070080DH6 panels drm/panel: ld9040: add power control sequence drm/panel: s6e8aa0: silence array overflow warning drm/dsi: Support device shutdown
2014-06-10Merge tag 'drm/tegra/for-3.16-rc1' of ↵Dave Airlie26-680/+1438
git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v3.16-rc1 The majority of these changes are a slew of cleanups across the board. A more noteworthy change is the addition of drm_dev_set_unique() and the conversion of the Tegra DRM driver to use it. This allows us to get rid of the host1x drm_bus implementation. Other USB and platform drivers can be changed in a similar way. Unfortunately for most PCI devices there is some userspace that relies on the old functionality and cannot be as easily converted. HDMI and hardware cursor support is added for Tegra124. The SOR output gains support for exposing CRCs via debugfs, which can be used for automated testing. Many values that were hardcoded in the SOR/eDP code are now computed at runtime to increase compatibility with more devices. * tag 'drm/tegra/for-3.16-rc1' of git://anongit.freedesktop.org/tegra/linux: (47 commits) drm/tegra: sor - Remove obsolete comment drm/tegra: sor - Enable only the necessary number of lanes drm/tegra: sor - Power on only the necessary lanes drm/tegra: sor - Do not program interlaced mode registers drm/tegra: sor - Do not hardcode link speed drm/tegra: sor - Do not hardcode number of blank symbols drm/tegra: sor - Don't hardcode link parameters drm/tegra: sor - Change power down ordering drm/tegra: sor - Fix copy/paste error drm/tegra: sor - Remove pixel clock rounding drm/tegra: sor - Make debugfs setup consistent drm/tegra: sor - Recursively remove debugfs tree drm/tegra: dp - Mark the connector as hotplug capable drm/tegra: dp - Implement hotplug detection in work queue drm/tegra: Add hardware cursor support drm/tegra: Remove host1x drm_bus implementation drm: Document how to register devices without struct drm_bus drm: Add device registration documentation drm: Introduce drm_dev_set_unique() gpu: host1x: Rename internal functions for clarity ...
2014-06-09drm/panel: simple - Add AUO B133XTN01 panel supportStéphane Marchesin2-0/+32
This panel is used by nyan-big and can be supported by the simple-panel driver. Signed-off-by: Stéphane Marchesin <marcheu@chromium.org> [treding@nvidia.com: add device tree binding document] Signed-off-by: Thierry Reding <treding@nvidia.com>
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