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2016-03-17mmc: sdhci-of-arasan: add phy support for sdhci-of-arasanShawn Lin1-1/+56
This patch adds Generic PHY access for sdhci-of-arasan. Driver can get PHY handler from dt-binding, and power-on/init the PHY. Currently, it's just mandatory for arasan,sdhci-5.1. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: sdhci-of-arasan: fix missing sdhci_pltfm_free for err handlingShawn Lin1-7/+8
Currently, some err handling of sdhci_arasan_probe return directly without calling sdhci_pltfm_free. This patch fixes them. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: sdhci-of-arasan: remove disable clk_ahb from sdhci_arasan_resumeShawn Lin1-1/+0
We don't really need disable clk_ahb when failing to resume. Otherwise we may take risk of bus error for accessing register without clk_ahb. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17Documentation: bindings: add description of phy for sdhci-of-arasanShawn Lin1-2/+18
This patch adds phys and phy-names for sdhci-of-arasan as required properties for arasan,sdhci-5.1, and details the example as well. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: sdhci: Fix override of timeout clk wrt max_busy_timeoutAdrian Hunter1-3/+3
Normally the timeout clock frequency is read from the capabilities register. It is also possible to set the value prior to calling sdhci_add_host() in which case that value will override the capabilities register value. However that was being done after calculating max_busy_timeout so that max_busy_timeout was being calculated using the wrong value of timeout_clk. Fix that by moving the override before max_busy_timeout is calculated. The result is that the max_busy_timeout and max_discard increase for BSW devices so that, for example, the time for mkfs.ext4 on a 64GB eMMC drops from about 1 minute 40 seconds to about 20 seconds. Note, in the future, the capabilities setting will be tidied up and this override won't be used anymore. However this fix is needed for stable. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v3.18+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: mmci: Remove unnecessary header fileWang Hongcheng1-1/+0
The header file asm/sizes.h is unnecessary, let's remove it. This also allows to compile under X86 arch. Signed-off-by: Wang Hongcheng <annie.wang@amd.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: sdhci-acpi: add QCOM controllersPhilip Elcan1-0/+15
This adds the HIDs for Qualcomm Technologies Inc SDHC controllers: QCOM8051: non-removable device that does not support 1.8v QCOM8052: non-removable device that does support 1.8v Signed-off-by: Philip Elcan <pelcan@codeaurora.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: tegra: implement memcomp pad calibrationLucas Stach1-3/+44
The Tegra30+ SDMMC module has memcomp pads that are used to automatically find and set the correct drive strength settings to the sdmmc pads. The calibration needs to be manually kicked off when the card signal voltage is changed, after the card clock is supplied again. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> [Ulf: Rebased to fix a trivial compile error] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: mediatek: Use mmc_regulator_set_vqmmc in start_signal_voltage_switchNicolas Boichat1-12/+5
We've introduced a new helper in the MMC core: mmc_regulator_set_vqmmc(). Let's use this in mtk-sd. Using this new helper has some advantages: 1. We get the mmc_regulator_set_vqmmc() behavior of trying to match VQMMC and VMMC when the signal voltage is 3.3V. This ensures max compatibility. 2. We get rid of a few more warnings when probing unsupported voltages. 3. We get rid of some non-mediatek specific code in mtk-sd. Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: mediatek: Change signal voltage error to dev_dbg()Nicolas Boichat1-1/+1
In commit ceae98f20e36 ("mmc: core: Try other signal levels during power up") we can see that there are times when it's valid to try several signal voltages. Don't print an ugly error in the logs when that happens. Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: sh_mmcif, tmio: Use ARCH_RENESASSimon Horman1-2/+2
Make use of ARCH_RENESAS in place of ARCH_SHMOBILE. This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS the motivation for which being that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-17mmc: tegra: properly disable card clockLucas Stach1-1/+1
The new code to do the clock rate setting externally to the SDMMC module has a shortcut to not propagate changes with a 0 rate to the CAR by simply bailing out. This breaks proper cutting of the card clock. Fix it by directly calling the correct sdhci function. Fixes: a8e326a911d3 "mmc: tegra: implement module external clock change" Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-16mmc: mmc_spi: Add Card Detect comments and fix CD GPIO caseMagnus Damm1-0/+6
This patch fixes the MMC SPI driver from doing polling card detect when a CD GPIO that supports interrupts is specified using the gpios DT property. Without this patch the DT node below results in the following output: spi_gpio: spi-gpio { /* SD2 @ CN12 */ compatible = "spi-gpio"; #address-cells = <1>; #size-cells = <0>; gpio-sck = <&gpio6 16 GPIO_ACTIVE_HIGH>; gpio-mosi = <&gpio6 17 GPIO_ACTIVE_HIGH>; gpio-miso = <&gpio6 18 GPIO_ACTIVE_HIGH>; num-chipselects = <1>; cs-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>; status = "okay"; spi@0 { compatible = "mmc-spi-slot"; reg = <0>; voltage-ranges = <3200 3400>; spi-max-frequency = <25000000>; gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; /* CD */ }; }; # dmesg | grep mmc mmc_spi spi32766.0: SD/MMC host mmc0, no WP, no poweroff, cd polling mmc0: host does not support reading read-only switch, assuming write-enable mmc0: new SDHC card on SPI mmcblk0: mmc0:0000 SU04G 3.69 GiB mmcblk0: p1 With this patch applied the "cd polling" portion above disappears. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Cc: stable@vger.kernel.org # v3.18+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-03-16mmc: tegra: Disable UHS-I modes for tegra114Jon Hunter1-1/+11
SD card support for Tegra114 started failing after commit a8e326a911d3 ("mmc: tegra: implement module external clock change") was merged. This commit was part of a series to enable UHS-I modes for Tegra. To workaround this problem for now, disable UHS-I modes for Tegra114 by separating the soc data structures for Tegra114 and Tegra124 so that UHS-I is still enabled for Tegra124 but not Tegra114. Fixes: a8e326a911d3 ("mmc: tegra: implement module external clock change") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Lucas Stach <dev@lynxeye.de> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-pltfm: remove priv variable from sdhci_pltfm_hostJisheng Zhang1-1/+0
Now all clients migration to use sdhci_pltfm_init for private allocation is done and there's no users of the priv variable, so we can remove it from the sdhci_pltfm_host structure. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-pxav2: remove unnecessary assignment of pltfm_host->privJisheng Zhang1-1/+0
The sdhci_pltfm_init() function has initialized the priv member as NULL, so there's no need to do it again. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-tegra: use sdhci_pltfm_init for private allocationJisheng Zhang1-14/+7
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-tegra to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-st: use sdhci_pltfm_init for private allocationJisheng Zhang1-20/+20
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-st to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-pxav3: use sdhci_pltfm_init for private allocationJisheng Zhang1-12/+8
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-pxav3 to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-of-esdhc: use sdhci_pltfm_init for private allocationJisheng Zhang1-10/+9
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-esdhc driver to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-of-at91: use sdhci_pltfm_init for private allocationJisheng Zhang1-18/+15
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-at91 driver to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-of-arasan: use sdhci_pltfm_init for private allocationJisheng Zhang1-16/+12
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci-of-arasan driver to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-of-arasan: fix clk issue in sdhci_arasan_remove()Jisheng Zhang1-1/+4
sdhci_pltfm_unregister() could operate host's registers, it will cause problems if the clk is already disabled and unprepared. Fix this issue by moving the clk_disable_unprepare() call to the end of remove function. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-msm: use sdhci_pltfm_init for private allocationJisheng Zhang1-8/+4
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-msm to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-msm: factorise sdhci_msm_pdata outisde of sdhci_msm_hostJisheng Zhang1-7/+8
There's no need to allocate one sdhci_msm_pdata for each sdhci_msm_host. This patch removes the sdhci_msm_pdata member from sdhci_msm_host and uses one static global sdhci_msm_pdata for all sdhci msm hosts. It also marks sdhci_msm_ops as const. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-esdhc-imx: use sdhci_pltfm_init for private allocationJisheng Zhang1-21/+17
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci esdhc-imx driver to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-bcm2835: use sdhci_pltfm_init for private allocationJisheng Zhang1-11/+3
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register") allows users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-bcm2835 to this allocation. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Eric Anholt <eric@anholt.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: mediatek: add SD write protect supportChaotian Jing1-0/+2
use mmc core layer's API to support sd write protect Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhi: Add r8a7795 supportWolfram Sang3-14/+36
Registers are 64bit apart, so we refactor bus_shift handling a little and set it based on the DT compatible. Also, EXT_ACC is different. It has been tested on a Salvator-X (Gen3) and, to check for regressions, on a Lager (Gen2). Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: further code simplicationRussell King1-11/+10
Further simplify the code in sdhci_prepare_data() - we don't set SDHCI_REQ_USE_DMA anywhere else in the driver, so there is no need to set it, and then immediately test it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: consolidate the DMA/ADMA size/address quicksRussell King1-32/+16
Rather than scanning the scatterlist multiple times for each quirk, scan it once, checking for each possible quirk. This should be cheaper due to the length and offset members commonly sharing the same cache line than scanning the scatterlist multiple times. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: prepare DMA address/size quirk handling consolidationRussell King1-13/+15
Prepare to consolidate the DMA address/size quirk handling into one single loop. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: cleanup DMA un-mappingRussell King1-11/+3
The patch "mmc: sdhci: plug DMA mapping leak on error" added un-mapping logic to sdhci_tasklet_finish() where it is always called, thereby preventing the mapping leaking. Consequently the un-mapping code in sdhci_finish_data() is no longer needed. Remove it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [ Split from original "mmc: sdhci: plug DMA mapping leak on error" patch ] Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: clean up host cookie handlingRussell King2-8/+8
Commit d31911b9374a ("mmc: sdhci: fix dma memory leak in sdhci_pre_req()") added a complicated method to manage the DMA map state for the data transfer, but this complexity is not required. There are three states: * Unmapped * Mapped by sdhci_pre_req() * Mapped by sdhci_prepare_data() sdhci_prepare_data() needs to know when the data buffers have been successfully mapped by sdhci_pre_req(), and if so, there is no need to map them a second time. When we come to tear down the mapping, we want to know whether sdhci_post_req() will be called (which is determined by sdhci_pre_req() having been previously called) so that we can postpone the unmap operation. Hence, it makes sense to simply record when the successful DMA map happened (via COOKIE_PRE_MAPPED vs COOKIE_MAPPED) rather than having the complex mechanics involving COOKIE_MAPPED vs COOKIE_GIVEN. If a mapping is created by sdhci_prepare_data(), we must tear it down ourselves, without waiting for sdhci_post_req() (hence, the new COOKIE_MAPPED case). If the mapping is created by sdhci_pre_req() then sdhci_post_req() is responsible for tearing the mapping down. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: always unmap a mapped data transfer in sdhci_post_req()Russell King1-2/+1
If the host cookie indicates that the data buffers of a request are mapped at sdhci_post_req() time, always unmap the data buffers. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: pass the cookie into sdhci_pre_dma_transfer()Russell King1-4/+4
Pass the desired cookie for a successful map. This is in preparation to clean up the MAPPED/GIVEN states. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: factor out sdhci_pre_dma_transfer() from sdhci_adma_table_pre()Russell King1-39/+23
In sdhci_prepare_data(), when SDHCI_REQ_USE_DMA is set, there are two paths that prepare the data buffers for transfer. One is when SDHCI_USE_ADMA is set, and is located inside sdhci_adma_table_pre(). The other is when SDHCI_USE_ADMA is clear, in the else clause of the above. Factor out the call to sdhci_pre_dma_transfer() along with its error checking. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: move sdhci_pre_dma_transfer()Russell King1-27/+25
Move sdhci_pre_dma_transfer() to avoid needing to declare this function before use. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: factor out common DMA cleanup in sdhci_finish_data()Russell King1-22/+7
sdhci_finish_data() has two paths which result in identical DMA cleanup. One is when SDHCI_USE_ADMA is clear, and the other is just before when SDHCI_USE_ADMA is set, and is performed within sdhci_adma_table_post(). Simplify the code by removing the 'else' and eliminating the duplicate inside sdhci_adma_table_post(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: avoid walking SG list for writesRussell King1-20/+22
If we are writing data to the card, there is no point in walking the scatterlist to find out if there are any unaligned entries; this is a needless waste of CPU cycles. Avoid this by checking for a non-read tranfer first. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: clean up coding style in sdhci_adma_table_pre()Russell King1-20/+9
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: allocate alignment and DMA descriptor buffer togetherRussell King1-36/+20
Allocate both the alignment and DMA descriptor buffers together. The size of the alignment buffer will always be aligned to the hosts required alignment, which gives appropriate alignment to the DMA descriptors. We have a maximum of 128 segments, and a maximum alignment of 64 bits. This gives a maximum alignment buffer size of 1024 bytes. The DMA descriptors are a maximum of 12 bytes, and we allocate 128 * 2 + 1 of these, which gives a maximum DMA descriptor buffer size of 3084 bytes. This means the allocation for a 4K page sized system will be an order-1 allocation, since the resulting overall size is 4108. This is more prone to failure than page-sized allocations, but since this allocation commonly occurs at startup, the chances of failure are small. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [ Changed to check ADMA table alignment ] Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: fix data timeout (part 2)Russell King1-2/+13
The calculation for the timeout based on the number of card clocks is incorrect. The calculation assumed: timeout in microseconds = clock cycles / clock in Hz which is clearly a several orders of magnitude wrong. Fix this by multiplying the clock cycles by 1000000 prior to dividing by the Hz based clock. Also, as per part 1, ensure that the division rounds up. As this needs 64-bit math via do_div(), avoid it if the clock cycles is zero. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v3.15+ Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: fix data timeout (part 1)Russell King1-1/+1
The data timeout gives the minimum amount of time that should be waited before timing out if no data is received from the card. Simply dividing the nanosecond part by 1000 does not give this required guarantee, since such a division rounds down. Use DIV_ROUND_UP() to give the desired timeout. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v3.15+ Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: further fix for DMA unmapping in sdhci_post_req()Russell King1-8/+7
sdhci_post_req() exists to unmap a previously mapped but already finished request, while the next request is in progress. However, the state of the SDHCI_REQ_USE_DMA flag depends on the last submitted request. This means we can end up clearing the flag due to a quirk, which then means that sdhci_post_req() fails to unmap the DMA buffer, potentially leading to data corruption. We can safely ignore the SDHCI_REQ_USE_DMA here, as testing data->host_cookie is entirely sufficient. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [ Re-based to apply as a separate fix ] Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v4.5+ Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci-pxav3: fix higher speed mode capabilitiesRussell King1-2/+4
Commit 1140011ee9d9 ("mmc: sdhci-pxav3: Modify clock settings for the SDR50 and DDR50 modes") broke any chance of the SDR50 or DDR50 modes being used. The commit claims that SDR50 and DDR50 require clock adjustments in the SDIO3 Configuration register, which is located via the "conf-sdio3" resource. However, when this resource is given, we fail to read the host capabilities 1 register, resulting in host->caps1 being zero. Hence, both SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50 bits remain zero, disabling the SDR50 and DDR50 modes. The underlying idea in this function appears to be to read the device capabilities, modify them, and set SDHCI_QUIRK_MISSING_CAPS to cause our modified capabilities to be used. Implement exactly that. Fixes: 1140011ee9d9 ("mmc: sdhci-pxav3: Modify clock settings for the SDR50 and DDR50 modes") Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: stable@vger.kernel.org # v4.5+ Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: plug DMA mapping leak on errorRussell King1-0/+16
If we terminate a command early, we fail to properly clean up the DMA mappings for the data part of the request. Put this clean up to the tasklet, which is the common path for finishing a request so we always clean up after ourselves. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [ Split original patch so that it now contains only the fix ] Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v4.5+ Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: avoid unnecessary mapping/unmapping of align bufferRussell King1-36/+18
Unnecessarily mapping and unmapping the align buffer for SD cards is expensive: performance measurements on iMX6 show that this gives a hit of 10% on hdparm buffered disk reads. MMC/SD card IO comes from the mm/vfs which gives us page based IO, so for this case, the align buffer is not going to be used. However, we still map and unmap this buffer. Eliminate this by switching the align buffer to be a DMA coherent buffer, which needs no DMA maintenance to access the buffer. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v4.5+ Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: fix command response CRC error handlingRussell King1-0/+17
When we get a response CRC error on a command, it means that the response we received back from the card was not correct. It does not mean that the card did not receive the command correctly. If the command is one which initiates a data transfer, the card can enter the data transfer state, and start sending data. Moreover, if the request contained a data phase, we do not clean this up, and this results in the driver triggering DMA API debug warnings, and also creates a race condition in the driver, between running the finish_tasklet and the data transfer interrupts, which can trigger a "Got data interrupt" state dump. Fix this by handing a response CRC error slightly differently: record the failure of the data initiating command, but allow the remainder of the request to be processed normally. This is safe as core MMC checks the status of all commands and data transfer phases of the request. If the card does not initiate a data transfer, then we should time out according to the data transfer parameters. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [ Fix missing parenthesis around bitwise-AND expression, and tweak subject ] Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v4.5+ Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-02-29mmc: sdhci: clean up command error handlingRussell King1-6/+6
Avoid multiple tests while handling a command error; simplify the code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> [ Goes with "mmc: sdhci: fix command response CRC error handling" ] Cc: stable@vger.kernel.org # v4.5+ Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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